44x_tlb.c 6.0 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or modify
  3. * it under the terms of the GNU General Public License, version 2, as
  4. * published by the Free Software Foundation.
  5. *
  6. * This program is distributed in the hope that it will be useful,
  7. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  8. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  9. * GNU General Public License for more details.
  10. *
  11. * You should have received a copy of the GNU General Public License
  12. * along with this program; if not, write to the Free Software
  13. * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  14. *
  15. * Copyright IBM Corp. 2007
  16. *
  17. * Authors: Hollis Blanchard <hollisb@us.ibm.com>
  18. */
  19. #include <linux/types.h>
  20. #include <linux/string.h>
  21. #include <linux/kvm_host.h>
  22. #include <linux/highmem.h>
  23. #include <asm/mmu-44x.h>
  24. #include <asm/kvm_ppc.h>
  25. #include "44x_tlb.h"
  26. #define PPC44x_TLB_USER_PERM_MASK (PPC44x_TLB_UX|PPC44x_TLB_UR|PPC44x_TLB_UW)
  27. #define PPC44x_TLB_SUPER_PERM_MASK (PPC44x_TLB_SX|PPC44x_TLB_SR|PPC44x_TLB_SW)
  28. static unsigned int kvmppc_tlb_44x_pos;
  29. static u32 kvmppc_44x_tlb_shadow_attrib(u32 attrib, int usermode)
  30. {
  31. /* Mask off reserved bits. */
  32. attrib &= PPC44x_TLB_PERM_MASK|PPC44x_TLB_ATTR_MASK;
  33. if (!usermode) {
  34. /* Guest is in supervisor mode, so we need to translate guest
  35. * supervisor permissions into user permissions. */
  36. attrib &= ~PPC44x_TLB_USER_PERM_MASK;
  37. attrib |= (attrib & PPC44x_TLB_SUPER_PERM_MASK) << 3;
  38. }
  39. /* Make sure host can always access this memory. */
  40. attrib |= PPC44x_TLB_SX|PPC44x_TLB_SR|PPC44x_TLB_SW;
  41. return attrib;
  42. }
  43. /* Search the guest TLB for a matching entry. */
  44. int kvmppc_44x_tlb_index(struct kvm_vcpu *vcpu, gva_t eaddr, unsigned int pid,
  45. unsigned int as)
  46. {
  47. int i;
  48. /* XXX Replace loop with fancy data structures. */
  49. for (i = 0; i < PPC44x_TLB_SIZE; i++) {
  50. struct tlbe *tlbe = &vcpu->arch.guest_tlb[i];
  51. unsigned int tid;
  52. if (eaddr < get_tlb_eaddr(tlbe))
  53. continue;
  54. if (eaddr > get_tlb_end(tlbe))
  55. continue;
  56. tid = get_tlb_tid(tlbe);
  57. if (tid && (tid != pid))
  58. continue;
  59. if (!get_tlb_v(tlbe))
  60. continue;
  61. if (get_tlb_ts(tlbe) != as)
  62. continue;
  63. return i;
  64. }
  65. return -1;
  66. }
  67. struct tlbe *kvmppc_44x_itlb_search(struct kvm_vcpu *vcpu, gva_t eaddr)
  68. {
  69. unsigned int as = !!(vcpu->arch.msr & MSR_IS);
  70. unsigned int index;
  71. index = kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as);
  72. if (index == -1)
  73. return NULL;
  74. return &vcpu->arch.guest_tlb[index];
  75. }
  76. struct tlbe *kvmppc_44x_dtlb_search(struct kvm_vcpu *vcpu, gva_t eaddr)
  77. {
  78. unsigned int as = !!(vcpu->arch.msr & MSR_DS);
  79. unsigned int index;
  80. index = kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as);
  81. if (index == -1)
  82. return NULL;
  83. return &vcpu->arch.guest_tlb[index];
  84. }
  85. static int kvmppc_44x_tlbe_is_writable(struct tlbe *tlbe)
  86. {
  87. return tlbe->word2 & (PPC44x_TLB_SW|PPC44x_TLB_UW);
  88. }
  89. /* Must be called with mmap_sem locked for writing. */
  90. static void kvmppc_44x_shadow_release(struct kvm_vcpu *vcpu,
  91. unsigned int index)
  92. {
  93. struct tlbe *stlbe = &vcpu->arch.shadow_tlb[index];
  94. struct page *page = vcpu->arch.shadow_pages[index];
  95. if (get_tlb_v(stlbe)) {
  96. if (kvmppc_44x_tlbe_is_writable(stlbe))
  97. kvm_release_page_dirty(page);
  98. else
  99. kvm_release_page_clean(page);
  100. }
  101. }
  102. /* Caller must ensure that the specified guest TLB entry is safe to insert into
  103. * the shadow TLB. */
  104. void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gfn_t gfn, u64 asid,
  105. u32 flags)
  106. {
  107. struct page *new_page;
  108. struct tlbe *stlbe;
  109. hpa_t hpaddr;
  110. unsigned int victim;
  111. /* Future optimization: don't overwrite the TLB entry containing the
  112. * current PC (or stack?). */
  113. victim = kvmppc_tlb_44x_pos++;
  114. if (kvmppc_tlb_44x_pos > tlb_44x_hwater)
  115. kvmppc_tlb_44x_pos = 0;
  116. stlbe = &vcpu->arch.shadow_tlb[victim];
  117. /* Get reference to new page. */
  118. down_read(&current->mm->mmap_sem);
  119. new_page = gfn_to_page(vcpu->kvm, gfn);
  120. if (is_error_page(new_page)) {
  121. printk(KERN_ERR "Couldn't get guest page for gfn %lx!\n", gfn);
  122. kvm_release_page_clean(new_page);
  123. up_read(&current->mm->mmap_sem);
  124. return;
  125. }
  126. hpaddr = page_to_phys(new_page);
  127. /* Drop reference to old page. */
  128. kvmppc_44x_shadow_release(vcpu, victim);
  129. up_read(&current->mm->mmap_sem);
  130. vcpu->arch.shadow_pages[victim] = new_page;
  131. /* XXX Make sure (va, size) doesn't overlap any other
  132. * entries. 440x6 user manual says the result would be
  133. * "undefined." */
  134. /* XXX what about AS? */
  135. stlbe->tid = asid & 0xff;
  136. /* Force TS=1 for all guest mappings. */
  137. /* For now we hardcode 4KB mappings, but it will be important to
  138. * use host large pages in the future. */
  139. stlbe->word0 = (gvaddr & PAGE_MASK) | PPC44x_TLB_VALID | PPC44x_TLB_TS
  140. | PPC44x_TLB_4K;
  141. stlbe->word1 = (hpaddr & 0xfffffc00) | ((hpaddr >> 32) & 0xf);
  142. stlbe->word2 = kvmppc_44x_tlb_shadow_attrib(flags,
  143. vcpu->arch.msr & MSR_PR);
  144. }
  145. void kvmppc_mmu_invalidate(struct kvm_vcpu *vcpu, gva_t eaddr,
  146. gva_t eend, u32 asid)
  147. {
  148. unsigned int pid = asid & 0xff;
  149. int i;
  150. /* XXX Replace loop with fancy data structures. */
  151. down_write(&current->mm->mmap_sem);
  152. for (i = 0; i <= tlb_44x_hwater; i++) {
  153. struct tlbe *stlbe = &vcpu->arch.shadow_tlb[i];
  154. unsigned int tid;
  155. if (!get_tlb_v(stlbe))
  156. continue;
  157. if (eend < get_tlb_eaddr(stlbe))
  158. continue;
  159. if (eaddr > get_tlb_end(stlbe))
  160. continue;
  161. tid = get_tlb_tid(stlbe);
  162. if (tid && (tid != pid))
  163. continue;
  164. kvmppc_44x_shadow_release(vcpu, i);
  165. stlbe->word0 = 0;
  166. }
  167. up_write(&current->mm->mmap_sem);
  168. }
  169. /* Invalidate all mappings, so that when they fault back in they will get the
  170. * proper permission bits. */
  171. void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode)
  172. {
  173. int i;
  174. /* XXX Replace loop with fancy data structures. */
  175. down_write(&current->mm->mmap_sem);
  176. for (i = 0; i <= tlb_44x_hwater; i++) {
  177. kvmppc_44x_shadow_release(vcpu, i);
  178. vcpu->arch.shadow_tlb[i].word0 = 0;
  179. }
  180. up_write(&current->mm->mmap_sem);
  181. }