mpc8536ds.dts 9.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433
  1. /*
  2. * MPC8536 DS Device Tree Source
  3. *
  4. * Copyright 2008 Freescale Semiconductor, Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. /dts-v1/;
  12. / {
  13. model = "fsl,mpc8536ds";
  14. compatible = "fsl,mpc8536ds";
  15. #address-cells = <1>;
  16. #size-cells = <1>;
  17. aliases {
  18. ethernet0 = &enet0;
  19. ethernet1 = &enet1;
  20. serial0 = &serial0;
  21. serial1 = &serial1;
  22. pci0 = &pci0;
  23. pci1 = &pci1;
  24. pci2 = &pci2;
  25. pci3 = &pci3;
  26. };
  27. cpus {
  28. #cpus = <1>;
  29. #address-cells = <1>;
  30. #size-cells = <0>;
  31. PowerPC,8536@0 {
  32. device_type = "cpu";
  33. reg = <0>;
  34. next-level-cache = <&L2>;
  35. };
  36. };
  37. memory {
  38. device_type = "memory";
  39. reg = <00000000 00000000>; // Filled by U-Boot
  40. };
  41. soc@ffe00000 {
  42. #address-cells = <1>;
  43. #size-cells = <1>;
  44. device_type = "soc";
  45. compatible = "simple-bus";
  46. ranges = <0x0 0xffe00000 0x100000>;
  47. reg = <0xffe00000 0x1000>;
  48. bus-frequency = <0>; // Filled out by uboot.
  49. memory-controller@2000 {
  50. compatible = "fsl,mpc8536-memory-controller";
  51. reg = <0x2000 0x1000>;
  52. interrupt-parent = <&mpic>;
  53. interrupts = <18 0x2>;
  54. };
  55. L2: l2-cache-controller@20000 {
  56. compatible = "fsl,mpc8536-l2-cache-controller";
  57. reg = <0x20000 0x1000>;
  58. interrupt-parent = <&mpic>;
  59. interrupts = <16 0x2>;
  60. };
  61. i2c@3000 {
  62. #address-cells = <1>;
  63. #size-cells = <0>;
  64. cell-index = <0>;
  65. compatible = "fsl-i2c";
  66. reg = <0x3000 0x100>;
  67. interrupts = <43 0x2>;
  68. interrupt-parent = <&mpic>;
  69. dfsrr;
  70. };
  71. i2c@3100 {
  72. #address-cells = <1>;
  73. #size-cells = <0>;
  74. cell-index = <1>;
  75. compatible = "fsl-i2c";
  76. reg = <0x3100 0x100>;
  77. interrupts = <43 0x2>;
  78. interrupt-parent = <&mpic>;
  79. dfsrr;
  80. rtc@68 {
  81. compatible = "dallas,ds3232";
  82. reg = <0x68>;
  83. };
  84. };
  85. dma@21300 {
  86. #address-cells = <1>;
  87. #size-cells = <1>;
  88. compatible = "fsl,mpc8536-dma", "fsl,eloplus-dma";
  89. reg = <0x21300 4>;
  90. ranges = <0 0x21100 0x200>;
  91. cell-index = <0>;
  92. dma-channel@0 {
  93. compatible = "fsl,mpc8536-dma-channel",
  94. "fsl,eloplus-dma-channel";
  95. reg = <0x0 0x80>;
  96. cell-index = <0>;
  97. interrupt-parent = <&mpic>;
  98. interrupts = <14 0x2>;
  99. };
  100. dma-channel@80 {
  101. compatible = "fsl,mpc8536-dma-channel",
  102. "fsl,eloplus-dma-channel";
  103. reg = <0x80 0x80>;
  104. cell-index = <1>;
  105. interrupt-parent = <&mpic>;
  106. interrupts = <15 0x2>;
  107. };
  108. dma-channel@100 {
  109. compatible = "fsl,mpc8536-dma-channel",
  110. "fsl,eloplus-dma-channel";
  111. reg = <0x100 0x80>;
  112. cell-index = <2>;
  113. interrupt-parent = <&mpic>;
  114. interrupts = <16 0x2>;
  115. };
  116. dma-channel@180 {
  117. compatible = "fsl,mpc8536-dma-channel",
  118. "fsl,eloplus-dma-channel";
  119. reg = <0x180 0x80>;
  120. cell-index = <3>;
  121. interrupt-parent = <&mpic>;
  122. interrupts = <17 0x2>;
  123. };
  124. };
  125. mdio@24520 {
  126. #address-cells = <1>;
  127. #size-cells = <0>;
  128. compatible = "fsl,gianfar-mdio";
  129. reg = <0x24520 0x20>;
  130. phy0: ethernet-phy@0 {
  131. interrupt-parent = <&mpic>;
  132. interrupts = <10 0x1>;
  133. reg = <0>;
  134. device_type = "ethernet-phy";
  135. };
  136. phy1: ethernet-phy@1 {
  137. interrupt-parent = <&mpic>;
  138. interrupts = <10 0x1>;
  139. reg = <1>;
  140. device_type = "ethernet-phy";
  141. };
  142. };
  143. usb@22000 {
  144. compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
  145. reg = <0x22000 0x1000>;
  146. #address-cells = <1>;
  147. #size-cells = <0>;
  148. interrupt-parent = <&mpic>;
  149. interrupts = <28 0x2>;
  150. phy_type = "ulpi";
  151. };
  152. usb@23000 {
  153. compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
  154. reg = <0x23000 0x1000>;
  155. #address-cells = <1>;
  156. #size-cells = <0>;
  157. interrupt-parent = <&mpic>;
  158. interrupts = <46 0x2>;
  159. phy_type = "ulpi";
  160. };
  161. enet0: ethernet@24000 {
  162. cell-index = <0>;
  163. device_type = "network";
  164. model = "TSEC";
  165. compatible = "gianfar";
  166. reg = <0x24000 0x1000>;
  167. local-mac-address = [ 00 00 00 00 00 00 ];
  168. interrupts = <29 2 30 2 34 2>;
  169. interrupt-parent = <&mpic>;
  170. phy-handle = <&phy1>;
  171. phy-connection-type = "rgmii-id";
  172. };
  173. enet1: ethernet@26000 {
  174. cell-index = <1>;
  175. device_type = "network";
  176. model = "TSEC";
  177. compatible = "gianfar";
  178. reg = <0x26000 0x1000>;
  179. local-mac-address = [ 00 00 00 00 00 00 ];
  180. interrupts = <31 2 32 2 33 2>;
  181. interrupt-parent = <&mpic>;
  182. phy-handle = <&phy0>;
  183. phy-connection-type = "rgmii-id";
  184. };
  185. usb@2b000 {
  186. compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr";
  187. reg = <0x2b000 0x1000>;
  188. #address-cells = <1>;
  189. #size-cells = <0>;
  190. interrupt-parent = <&mpic>;
  191. interrupts = <60 0x2>;
  192. dr_mode = "peripheral";
  193. phy_type = "ulpi";
  194. };
  195. serial0: serial@4500 {
  196. cell-index = <0>;
  197. device_type = "serial";
  198. compatible = "ns16550";
  199. reg = <0x4500 0x100>;
  200. clock-frequency = <0>;
  201. interrupts = <42 0x2>;
  202. interrupt-parent = <&mpic>;
  203. };
  204. serial1: serial@4600 {
  205. cell-index = <1>;
  206. device_type = "serial";
  207. compatible = "ns16550";
  208. reg = <0x4600 0x100>;
  209. clock-frequency = <0>;
  210. interrupts = <42 0x2>;
  211. interrupt-parent = <&mpic>;
  212. };
  213. crypto@30000 {
  214. compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
  215. "fsl,sec2.1", "fsl,sec2.0";
  216. reg = <0x30000 0x10000>;
  217. interrupts = <45 2 58 2>;
  218. interrupt-parent = <&mpic>;
  219. fsl,num-channels = <4>;
  220. fsl,channel-fifo-len = <24>;
  221. fsl,exec-units-mask = <0x9fe>;
  222. fsl,descriptor-types-mask = <0x3ab0ebf>;
  223. };
  224. sata@18000 {
  225. compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
  226. reg = <0x18000 0x1000>;
  227. cell-index = <1>;
  228. interrupts = <74 0x2>;
  229. interrupt-parent = <&mpic>;
  230. };
  231. sata@19000 {
  232. compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
  233. reg = <0x19000 0x1000>;
  234. cell-index = <2>;
  235. interrupts = <41 0x2>;
  236. interrupt-parent = <&mpic>;
  237. };
  238. global-utilities@e0000 { //global utilities block
  239. compatible = "fsl,mpc8548-guts";
  240. reg = <0xe0000 0x1000>;
  241. fsl,has-rstcr;
  242. };
  243. mpic: pic@40000 {
  244. clock-frequency = <0>;
  245. interrupt-controller;
  246. #address-cells = <0>;
  247. #interrupt-cells = <2>;
  248. reg = <0x40000 0x40000>;
  249. compatible = "chrp,open-pic";
  250. device_type = "open-pic";
  251. big-endian;
  252. };
  253. msi@41600 {
  254. compatible = "fsl,mpc8536-msi", "fsl,mpic-msi";
  255. reg = <0x41600 0x80>;
  256. msi-available-ranges = <0 0x100>;
  257. interrupts = <
  258. 0xe0 0
  259. 0xe1 0
  260. 0xe2 0
  261. 0xe3 0
  262. 0xe4 0
  263. 0xe5 0
  264. 0xe6 0
  265. 0xe7 0>;
  266. interrupt-parent = <&mpic>;
  267. };
  268. };
  269. pci0: pci@ffe08000 {
  270. cell-index = <0>;
  271. compatible = "fsl,mpc8540-pci";
  272. device_type = "pci";
  273. interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  274. interrupt-map = <
  275. /* IDSEL 0x11 J17 Slot 1 */
  276. 0x8800 0 0 1 &mpic 1 1
  277. 0x8800 0 0 2 &mpic 2 1
  278. 0x8800 0 0 3 &mpic 3 1
  279. 0x8800 0 0 4 &mpic 4 1>;
  280. interrupt-parent = <&mpic>;
  281. interrupts = <24 0x2>;
  282. bus-range = <0 0xff>;
  283. ranges = <0x02000000 0 0x80000000 0x80000000 0 0x10000000
  284. 0x01000000 0 0x00000000 0xffc00000 0 0x00010000>;
  285. clock-frequency = <66666666>;
  286. #interrupt-cells = <1>;
  287. #size-cells = <2>;
  288. #address-cells = <3>;
  289. reg = <0xffe08000 0x1000>;
  290. };
  291. pci1: pcie@ffe09000 {
  292. cell-index = <1>;
  293. compatible = "fsl,mpc8548-pcie";
  294. device_type = "pci";
  295. #interrupt-cells = <1>;
  296. #size-cells = <2>;
  297. #address-cells = <3>;
  298. reg = <0xffe09000 0x1000>;
  299. bus-range = <0 0xff>;
  300. ranges = <0x02000000 0 0x98000000 0x98000000 0 0x08000000
  301. 0x01000000 0 0x00000000 0xffc20000 0 0x00010000>;
  302. clock-frequency = <33333333>;
  303. interrupt-parent = <&mpic>;
  304. interrupts = <25 0x2>;
  305. interrupt-map-mask = <0xf800 0 0 7>;
  306. interrupt-map = <
  307. /* IDSEL 0x0 */
  308. 0000 0 0 1 &mpic 4 1
  309. 0000 0 0 2 &mpic 5 1
  310. 0000 0 0 3 &mpic 6 1
  311. 0000 0 0 4 &mpic 7 1
  312. >;
  313. pcie@0 {
  314. reg = <0 0 0 0 0>;
  315. #size-cells = <2>;
  316. #address-cells = <3>;
  317. device_type = "pci";
  318. ranges = <0x02000000 0 0x98000000
  319. 0x02000000 0 0x98000000
  320. 0 0x08000000
  321. 0x01000000 0 0x00000000
  322. 0x01000000 0 0x00000000
  323. 0 0x00010000>;
  324. };
  325. };
  326. pci2: pcie@ffe0a000 {
  327. cell-index = <2>;
  328. compatible = "fsl,mpc8548-pcie";
  329. device_type = "pci";
  330. #interrupt-cells = <1>;
  331. #size-cells = <2>;
  332. #address-cells = <3>;
  333. reg = <0xffe0a000 0x1000>;
  334. bus-range = <0 0xff>;
  335. ranges = <0x02000000 0 0x90000000 0x90000000 0 0x08000000
  336. 0x01000000 0 0x00000000 0xffc10000 0 0x00010000>;
  337. clock-frequency = <33333333>;
  338. interrupt-parent = <&mpic>;
  339. interrupts = <26 0x2>;
  340. interrupt-map-mask = <0xf800 0 0 7>;
  341. interrupt-map = <
  342. /* IDSEL 0x0 */
  343. 0000 0 0 1 &mpic 0 1
  344. 0000 0 0 2 &mpic 1 1
  345. 0000 0 0 3 &mpic 2 1
  346. 0000 0 0 4 &mpic 3 1
  347. >;
  348. pcie@0 {
  349. reg = <0 0 0 0 0>;
  350. #size-cells = <2>;
  351. #address-cells = <3>;
  352. device_type = "pci";
  353. ranges = <0x02000000 0 0x90000000
  354. 0x02000000 0 0x90000000
  355. 0 0x08000000
  356. 0x01000000 0 0x00000000
  357. 0x01000000 0 0x00000000
  358. 0 0x00010000>;
  359. };
  360. };
  361. pci3: pcie@ffe0b000 {
  362. cell-index = <3>;
  363. compatible = "fsl,mpc8548-pcie";
  364. device_type = "pci";
  365. #interrupt-cells = <1>;
  366. #size-cells = <2>;
  367. #address-cells = <3>;
  368. reg = <0xffe0b000 0x1000>;
  369. bus-range = <0 0xff>;
  370. ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x20000000
  371. 0x01000000 0 0x00000000 0xffc30000 0 0x00010000>;
  372. clock-frequency = <33333333>;
  373. interrupt-parent = <&mpic>;
  374. interrupts = <27 0x2>;
  375. interrupt-map-mask = <0xf800 0 0 7>;
  376. interrupt-map = <
  377. /* IDSEL 0x0 */
  378. 0000 0 0 1 &mpic 8 1
  379. 0000 0 0 2 &mpic 9 1
  380. 0000 0 0 3 &mpic 10 1
  381. 0000 0 0 4 &mpic 11 1
  382. >;
  383. pcie@0 {
  384. reg = <0 0 0 0 0>;
  385. #size-cells = <2>;
  386. #address-cells = <3>;
  387. device_type = "pci";
  388. ranges = <0x02000000 0 0xa0000000
  389. 0x02000000 0 0xa0000000
  390. 0 0x20000000
  391. 0x01000000 0 0x00000000
  392. 0x01000000 0 0x00000000
  393. 0 0x00100000>;
  394. };
  395. };
  396. };