mpc8349emitxgp.dts 5.2 KB

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  1. /*
  2. * MPC8349E-mITX-GP Device Tree Source
  3. *
  4. * Copyright 2007 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. /dts-v1/;
  12. / {
  13. model = "MPC8349EMITXGP";
  14. compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX";
  15. #address-cells = <1>;
  16. #size-cells = <1>;
  17. aliases {
  18. ethernet0 = &enet0;
  19. serial0 = &serial0;
  20. serial1 = &serial1;
  21. pci0 = &pci0;
  22. };
  23. cpus {
  24. #address-cells = <1>;
  25. #size-cells = <0>;
  26. PowerPC,8349@0 {
  27. device_type = "cpu";
  28. reg = <0x0>;
  29. d-cache-line-size = <32>;
  30. i-cache-line-size = <32>;
  31. d-cache-size = <32768>;
  32. i-cache-size = <32768>;
  33. timebase-frequency = <0>; // from bootloader
  34. bus-frequency = <0>; // from bootloader
  35. clock-frequency = <0>; // from bootloader
  36. };
  37. };
  38. memory {
  39. device_type = "memory";
  40. reg = <0x00000000 0x10000000>;
  41. };
  42. soc8349@e0000000 {
  43. #address-cells = <1>;
  44. #size-cells = <1>;
  45. device_type = "soc";
  46. compatible = "simple-bus";
  47. ranges = <0x0 0xe0000000 0x00100000>;
  48. reg = <0xe0000000 0x00000200>;
  49. bus-frequency = <0>; // from bootloader
  50. wdt@200 {
  51. device_type = "watchdog";
  52. compatible = "mpc83xx_wdt";
  53. reg = <0x200 0x100>;
  54. };
  55. i2c@3000 {
  56. #address-cells = <1>;
  57. #size-cells = <0>;
  58. cell-index = <0>;
  59. compatible = "fsl-i2c";
  60. reg = <0x3000 0x100>;
  61. interrupts = <14 0x8>;
  62. interrupt-parent = <&ipic>;
  63. dfsrr;
  64. };
  65. i2c@3100 {
  66. #address-cells = <1>;
  67. #size-cells = <0>;
  68. cell-index = <1>;
  69. compatible = "fsl-i2c";
  70. reg = <0x3100 0x100>;
  71. interrupts = <15 0x8>;
  72. interrupt-parent = <&ipic>;
  73. dfsrr;
  74. };
  75. spi@7000 {
  76. cell-index = <0>;
  77. compatible = "fsl,spi";
  78. reg = <0x7000 0x1000>;
  79. interrupts = <16 0x8>;
  80. interrupt-parent = <&ipic>;
  81. mode = "cpu";
  82. };
  83. dma@82a8 {
  84. #address-cells = <1>;
  85. #size-cells = <1>;
  86. compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
  87. reg = <0x82a8 4>;
  88. ranges = <0 0x8100 0x1a8>;
  89. interrupt-parent = <&ipic>;
  90. interrupts = <71 8>;
  91. cell-index = <0>;
  92. dma-channel@0 {
  93. compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
  94. reg = <0 0x80>;
  95. interrupt-parent = <&ipic>;
  96. interrupts = <71 8>;
  97. };
  98. dma-channel@80 {
  99. compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
  100. reg = <0x80 0x80>;
  101. interrupt-parent = <&ipic>;
  102. interrupts = <71 8>;
  103. };
  104. dma-channel@100 {
  105. compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
  106. reg = <0x100 0x80>;
  107. interrupt-parent = <&ipic>;
  108. interrupts = <71 8>;
  109. };
  110. dma-channel@180 {
  111. compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
  112. reg = <0x180 0x28>;
  113. interrupt-parent = <&ipic>;
  114. interrupts = <71 8>;
  115. };
  116. };
  117. usb@23000 {
  118. compatible = "fsl-usb2-dr";
  119. reg = <0x23000 0x1000>;
  120. #address-cells = <1>;
  121. #size-cells = <0>;
  122. interrupt-parent = <&ipic>;
  123. interrupts = <38 0x8>;
  124. dr_mode = "otg";
  125. phy_type = "ulpi";
  126. };
  127. mdio@24520 {
  128. #address-cells = <1>;
  129. #size-cells = <0>;
  130. compatible = "fsl,gianfar-mdio";
  131. reg = <0x24520 0x20>;
  132. /* Vitesse 8201 */
  133. phy1c: ethernet-phy@1c {
  134. interrupt-parent = <&ipic>;
  135. interrupts = <18 0x8>;
  136. reg = <0x1c>;
  137. device_type = "ethernet-phy";
  138. };
  139. };
  140. enet0: ethernet@24000 {
  141. cell-index = <0>;
  142. device_type = "network";
  143. model = "TSEC";
  144. compatible = "gianfar";
  145. reg = <0x24000 0x1000>;
  146. local-mac-address = [ 00 00 00 00 00 00 ];
  147. interrupts = <32 0x8 33 0x8 34 0x8>;
  148. interrupt-parent = <&ipic>;
  149. phy-handle = <&phy1c>;
  150. linux,network-index = <0>;
  151. };
  152. serial0: serial@4500 {
  153. cell-index = <0>;
  154. device_type = "serial";
  155. compatible = "ns16550";
  156. reg = <0x4500 0x100>;
  157. clock-frequency = <0>; // from bootloader
  158. interrupts = <9 0x8>;
  159. interrupt-parent = <&ipic>;
  160. };
  161. serial1: serial@4600 {
  162. cell-index = <1>;
  163. device_type = "serial";
  164. compatible = "ns16550";
  165. reg = <0x4600 0x100>;
  166. clock-frequency = <0>; // from bootloader
  167. interrupts = <10 0x8>;
  168. interrupt-parent = <&ipic>;
  169. };
  170. crypto@30000 {
  171. compatible = "fsl,sec2.0";
  172. reg = <0x30000 0x10000>;
  173. interrupts = <11 0x8>;
  174. interrupt-parent = <&ipic>;
  175. fsl,num-channels = <4>;
  176. fsl,channel-fifo-len = <24>;
  177. fsl,exec-units-mask = <0x7e>;
  178. fsl,descriptor-types-mask = <0x01010ebf>;
  179. };
  180. ipic: pic@700 {
  181. interrupt-controller;
  182. #address-cells = <0>;
  183. #interrupt-cells = <2>;
  184. reg = <0x700 0x100>;
  185. device_type = "ipic";
  186. };
  187. };
  188. pci0: pci@e0008600 {
  189. cell-index = <2>;
  190. interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  191. interrupt-map = <
  192. /* IDSEL 0x0F - PCI Slot */
  193. 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
  194. 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
  195. >;
  196. interrupt-parent = <&ipic>;
  197. interrupts = <67 0x8>;
  198. bus-range = <0x1 0x1>;
  199. ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
  200. 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
  201. 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
  202. clock-frequency = <66666666>;
  203. #interrupt-cells = <1>;
  204. #size-cells = <2>;
  205. #address-cells = <3>;
  206. reg = <0xe0008600 0x100>;
  207. compatible = "fsl,mpc8349-pci";
  208. device_type = "pci";
  209. };
  210. };