ksi8560.dts 6.9 KB

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  1. /*
  2. * Device Tree Source for Emerson KSI8560
  3. *
  4. * Author: Alexandr Smirnov <asmirnov@ru.mvista.com>
  5. *
  6. * Based on mpc8560ads.dts
  7. *
  8. * 2008 (c) MontaVista, Software, Inc. This file is licensed under
  9. * the terms of the GNU General Public License version 2. This program
  10. * is licensed "as is" without any warranty of any kind, whether express
  11. * or implied.
  12. *
  13. */
  14. /dts-v1/;
  15. / {
  16. model = "KSI8560";
  17. compatible = "emerson,KSI8560";
  18. #address-cells = <1>;
  19. #size-cells = <1>;
  20. aliases {
  21. ethernet0 = &enet0;
  22. ethernet1 = &enet1;
  23. ethernet2 = &enet2;
  24. };
  25. cpus {
  26. #address-cells = <1>;
  27. #size-cells = <0>;
  28. PowerPC,8560@0 {
  29. device_type = "cpu";
  30. reg = <0>;
  31. d-cache-line-size = <32>;
  32. i-cache-line-size = <32>;
  33. d-cache-size = <0x8000>; /* L1, 32K */
  34. i-cache-size = <0x8000>; /* L1, 32K */
  35. timebase-frequency = <0>; /* From U-boot */
  36. bus-frequency = <0>; /* From U-boot */
  37. clock-frequency = <0>; /* From U-boot */
  38. next-level-cache = <&L2>;
  39. };
  40. };
  41. memory {
  42. device_type = "memory";
  43. reg = <0x00000000 0x10000000>; /* Fixed by bootwrapper */
  44. };
  45. soc@fdf00000 {
  46. #address-cells = <1>;
  47. #size-cells = <1>;
  48. device_type = "soc";
  49. ranges = <0x00000000 0xfdf00000 0x00100000>;
  50. bus-frequency = <0>; /* Fixed by bootwrapper */
  51. memory-controller@2000 {
  52. compatible = "fsl,8540-memory-controller";
  53. reg = <0x2000 0x1000>;
  54. interrupt-parent = <&mpic>;
  55. interrupts = <0x12 0x2>;
  56. };
  57. L2: l2-cache-controller@20000 {
  58. compatible = "fsl,8540-l2-cache-controller";
  59. reg = <0x20000 0x1000>;
  60. cache-line-size = <0x20>; /* 32 bytes */
  61. cache-size = <0x40000>; /* L2, 256K */
  62. interrupt-parent = <&mpic>;
  63. interrupts = <0x10 0x2>;
  64. };
  65. i2c@3000 {
  66. #address-cells = <1>;
  67. #size-cells = <0>;
  68. cell-index = <0>;
  69. compatible = "fsl-i2c";
  70. reg = <0x3000 0x100>;
  71. interrupts = <0x2b 0x2>;
  72. interrupt-parent = <&mpic>;
  73. dfsrr;
  74. };
  75. dma@21300 {
  76. #address-cells = <1>;
  77. #size-cells = <1>;
  78. compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
  79. reg = <0x21300 0x4>;
  80. ranges = <0x0 0x21100 0x200>;
  81. cell-index = <0>;
  82. dma-channel@0 {
  83. compatible = "fsl,mpc8560-dma-channel",
  84. "fsl,eloplus-dma-channel";
  85. reg = <0x0 0x80>;
  86. cell-index = <0>;
  87. interrupt-parent = <&mpic>;
  88. interrupts = <20 2>;
  89. };
  90. dma-channel@80 {
  91. compatible = "fsl,mpc8560-dma-channel",
  92. "fsl,eloplus-dma-channel";
  93. reg = <0x80 0x80>;
  94. cell-index = <1>;
  95. interrupt-parent = <&mpic>;
  96. interrupts = <21 2>;
  97. };
  98. dma-channel@100 {
  99. compatible = "fsl,mpc8560-dma-channel",
  100. "fsl,eloplus-dma-channel";
  101. reg = <0x100 0x80>;
  102. cell-index = <2>;
  103. interrupt-parent = <&mpic>;
  104. interrupts = <22 2>;
  105. };
  106. dma-channel@180 {
  107. compatible = "fsl,mpc8560-dma-channel",
  108. "fsl,eloplus-dma-channel";
  109. reg = <0x180 0x80>;
  110. cell-index = <3>;
  111. interrupt-parent = <&mpic>;
  112. interrupts = <23 2>;
  113. };
  114. };
  115. mdio@24520 { /* For TSECs */
  116. #address-cells = <1>;
  117. #size-cells = <0>;
  118. compatible = "fsl,gianfar-mdio";
  119. reg = <0x24520 0x20>;
  120. PHY1: ethernet-phy@1 {
  121. interrupt-parent = <&mpic>;
  122. reg = <0x1>;
  123. device_type = "ethernet-phy";
  124. };
  125. PHY2: ethernet-phy@2 {
  126. interrupt-parent = <&mpic>;
  127. reg = <0x2>;
  128. device_type = "ethernet-phy";
  129. };
  130. };
  131. enet0: ethernet@24000 {
  132. device_type = "network";
  133. model = "TSEC";
  134. compatible = "gianfar";
  135. reg = <0x24000 0x1000>;
  136. /* Mac address filled in by bootwrapper */
  137. local-mac-address = [ 00 00 00 00 00 00 ];
  138. interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
  139. interrupt-parent = <&mpic>;
  140. phy-handle = <&PHY1>;
  141. };
  142. enet1: ethernet@25000 {
  143. device_type = "network";
  144. model = "TSEC";
  145. compatible = "gianfar";
  146. reg = <0x25000 0x1000>;
  147. /* Mac address filled in by bootwrapper */
  148. local-mac-address = [ 00 00 00 00 00 00 ];
  149. interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
  150. interrupt-parent = <&mpic>;
  151. phy-handle = <&PHY2>;
  152. };
  153. mpic: pic@40000 {
  154. #address-cells = <0>;
  155. #interrupt-cells = <2>;
  156. interrupt-controller;
  157. reg = <0x40000 0x40000>;
  158. device_type = "open-pic";
  159. };
  160. cpm@919c0 {
  161. #address-cells = <1>;
  162. #size-cells = <1>;
  163. compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
  164. reg = <0x919c0 0x30>;
  165. ranges;
  166. muram@80000 {
  167. #address-cells = <1>;
  168. #size-cells = <1>;
  169. ranges = <0x0 0x80000 0x10000>;
  170. data@0 {
  171. compatible = "fsl,cpm-muram-data";
  172. reg = <0x0 0x4000 0x9000 0x2000>;
  173. };
  174. };
  175. brg@919f0 {
  176. compatible = "fsl,mpc8560-brg",
  177. "fsl,cpm2-brg",
  178. "fsl,cpm-brg";
  179. reg = <0x919f0 0x10 0x915f0 0x10>;
  180. clock-frequency = <165000000>; /* 166MHz */
  181. };
  182. CPMPIC: pic@90c00 {
  183. #address-cells = <0>;
  184. #interrupt-cells = <2>;
  185. interrupt-controller;
  186. interrupts = <0x2e 0x2>;
  187. interrupt-parent = <&mpic>;
  188. reg = <0x90c00 0x80>;
  189. compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
  190. };
  191. serial@91a00 {
  192. device_type = "serial";
  193. compatible = "fsl,mpc8560-scc-uart",
  194. "fsl,cpm2-scc-uart";
  195. reg = <0x91a00 0x20 0x88000 0x100>;
  196. fsl,cpm-brg = <1>;
  197. fsl,cpm-command = <0x800000>;
  198. current-speed = <0x1c200>;
  199. interrupts = <0x28 0x8>;
  200. interrupt-parent = <&CPMPIC>;
  201. };
  202. serial@91a20 {
  203. device_type = "serial";
  204. compatible = "fsl,mpc8560-scc-uart",
  205. "fsl,cpm2-scc-uart";
  206. reg = <0x91a20 0x20 0x88100 0x100>;
  207. fsl,cpm-brg = <2>;
  208. fsl,cpm-command = <0x4a00000>;
  209. current-speed = <0x1c200>;
  210. interrupts = <0x29 0x8>;
  211. interrupt-parent = <&CPMPIC>;
  212. };
  213. mdio@90d00 { /* For FCCs */
  214. #address-cells = <1>;
  215. #size-cells = <0>;
  216. compatible = "fsl,cpm2-mdio-bitbang";
  217. reg = <0x90d00 0x14>;
  218. fsl,mdio-pin = <24>;
  219. fsl,mdc-pin = <25>;
  220. PHY0: ethernet-phy@0 {
  221. interrupt-parent = <&mpic>;
  222. reg = <0x0>;
  223. device_type = "ethernet-phy";
  224. };
  225. };
  226. enet2: ethernet@91300 {
  227. device_type = "network";
  228. compatible = "fsl,mpc8560-fcc-enet",
  229. "fsl,cpm2-fcc-enet";
  230. reg = <0x91300 0x20 0x88400 0x100 0x91390 0x1>;
  231. /* Mac address filled in by bootwrapper */
  232. local-mac-address = [ 00 00 00 00 00 00 ];
  233. fsl,cpm-command = <0x12000300>;
  234. interrupts = <0x20 0x8>;
  235. interrupt-parent = <&CPMPIC>;
  236. phy-handle = <&PHY0>;
  237. };
  238. };
  239. };
  240. localbus@fdf05000 {
  241. #address-cells = <2>;
  242. #size-cells = <1>;
  243. compatible = "fsl,mpc8560-localbus";
  244. reg = <0xfdf05000 0x68>;
  245. ranges = <0x0 0x0 0xe0000000 0x00800000
  246. 0x4 0x0 0xe8080000 0x00080000>;
  247. flash@0,0 {
  248. #address-cells = <1>;
  249. #size-cells = <1>;
  250. compatible = "jedec-flash";
  251. reg = <0x0 0x0 0x800000>;
  252. bank-width = <0x2>;
  253. partition@0 {
  254. label = "Primary Kernel";
  255. reg = <0x0 0x180000>;
  256. };
  257. partition@180000 {
  258. label = "Primary Filesystem";
  259. reg = <0x180000 0x580000>;
  260. };
  261. partition@700000 {
  262. label = "Monitor";
  263. reg = <0x300000 0x100000>;
  264. read-only;
  265. };
  266. };
  267. cpld@4,0 {
  268. compatible = "emerson,KSI8560-cpld";
  269. reg = <0x4 0x0 0x80000>;
  270. };
  271. };
  272. chosen {
  273. linux,stdout-path = "/soc/cpm/serial@91a00";
  274. };
  275. };