mn10300-serial.c 36 KB

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  1. /* MN10300 On-chip serial port UART driver
  2. *
  3. * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
  4. * Written by David Howells (dhowells@redhat.com)
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public Licence
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the Licence, or (at your option) any later version.
  10. */
  11. static const char serial_name[] = "MN10300 Serial driver";
  12. static const char serial_version[] = "mn10300_serial-1.0";
  13. static const char serial_revdate[] = "2007-11-06";
  14. #if defined(CONFIG_MN10300_TTYSM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  15. #define SUPPORT_SYSRQ
  16. #endif
  17. #include <linux/module.h>
  18. #include <linux/serial.h>
  19. #include <linux/circ_buf.h>
  20. #include <linux/errno.h>
  21. #include <linux/signal.h>
  22. #include <linux/sched.h>
  23. #include <linux/timer.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/tty.h>
  26. #include <linux/tty_flip.h>
  27. #include <linux/major.h>
  28. #include <linux/string.h>
  29. #include <linux/ioport.h>
  30. #include <linux/mm.h>
  31. #include <linux/slab.h>
  32. #include <linux/init.h>
  33. #include <linux/console.h>
  34. #include <linux/sysrq.h>
  35. #include <asm/system.h>
  36. #include <asm/io.h>
  37. #include <asm/irq.h>
  38. #include <asm/bitops.h>
  39. #include <asm/serial-regs.h>
  40. #include <asm/unit/timex.h>
  41. #include "mn10300-serial.h"
  42. static inline __attribute__((format(printf, 1, 2)))
  43. void no_printk(const char *fmt, ...)
  44. {
  45. }
  46. #define kenter(FMT, ...) \
  47. printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__)
  48. #define _enter(FMT, ...) \
  49. no_printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__)
  50. #define kdebug(FMT, ...) \
  51. printk(KERN_DEBUG "--- " FMT "\n", ##__VA_ARGS__)
  52. #define _debug(FMT, ...) \
  53. no_printk(KERN_DEBUG "--- " FMT "\n", ##__VA_ARGS__)
  54. #define kproto(FMT, ...) \
  55. printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__)
  56. #define _proto(FMT, ...) \
  57. no_printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__)
  58. #define NR_UARTS 3
  59. #ifdef CONFIG_MN10300_TTYSM_CONSOLE
  60. static void mn10300_serial_console_write(struct console *co,
  61. const char *s, unsigned count);
  62. static int __init mn10300_serial_console_setup(struct console *co,
  63. char *options);
  64. static struct uart_driver mn10300_serial_driver;
  65. static struct console mn10300_serial_console = {
  66. .name = "ttySM",
  67. .write = mn10300_serial_console_write,
  68. .device = uart_console_device,
  69. .setup = mn10300_serial_console_setup,
  70. .flags = CON_PRINTBUFFER,
  71. .index = -1,
  72. .data = &mn10300_serial_driver,
  73. };
  74. #endif
  75. static struct uart_driver mn10300_serial_driver = {
  76. .owner = NULL,
  77. .driver_name = "mn10300-serial",
  78. .dev_name = "ttySM",
  79. .major = TTY_MAJOR,
  80. .minor = 128,
  81. .nr = NR_UARTS,
  82. #ifdef CONFIG_MN10300_TTYSM_CONSOLE
  83. .cons = &mn10300_serial_console,
  84. #endif
  85. };
  86. static unsigned int mn10300_serial_tx_empty(struct uart_port *);
  87. static void mn10300_serial_set_mctrl(struct uart_port *, unsigned int mctrl);
  88. static unsigned int mn10300_serial_get_mctrl(struct uart_port *);
  89. static void mn10300_serial_stop_tx(struct uart_port *);
  90. static void mn10300_serial_start_tx(struct uart_port *);
  91. static void mn10300_serial_send_xchar(struct uart_port *, char ch);
  92. static void mn10300_serial_stop_rx(struct uart_port *);
  93. static void mn10300_serial_enable_ms(struct uart_port *);
  94. static void mn10300_serial_break_ctl(struct uart_port *, int ctl);
  95. static int mn10300_serial_startup(struct uart_port *);
  96. static void mn10300_serial_shutdown(struct uart_port *);
  97. static void mn10300_serial_set_termios(struct uart_port *,
  98. struct ktermios *new,
  99. struct ktermios *old);
  100. static const char *mn10300_serial_type(struct uart_port *);
  101. static void mn10300_serial_release_port(struct uart_port *);
  102. static int mn10300_serial_request_port(struct uart_port *);
  103. static void mn10300_serial_config_port(struct uart_port *, int);
  104. static int mn10300_serial_verify_port(struct uart_port *,
  105. struct serial_struct *);
  106. static const struct uart_ops mn10300_serial_ops = {
  107. .tx_empty = mn10300_serial_tx_empty,
  108. .set_mctrl = mn10300_serial_set_mctrl,
  109. .get_mctrl = mn10300_serial_get_mctrl,
  110. .stop_tx = mn10300_serial_stop_tx,
  111. .start_tx = mn10300_serial_start_tx,
  112. .send_xchar = mn10300_serial_send_xchar,
  113. .stop_rx = mn10300_serial_stop_rx,
  114. .enable_ms = mn10300_serial_enable_ms,
  115. .break_ctl = mn10300_serial_break_ctl,
  116. .startup = mn10300_serial_startup,
  117. .shutdown = mn10300_serial_shutdown,
  118. .set_termios = mn10300_serial_set_termios,
  119. .type = mn10300_serial_type,
  120. .release_port = mn10300_serial_release_port,
  121. .request_port = mn10300_serial_request_port,
  122. .config_port = mn10300_serial_config_port,
  123. .verify_port = mn10300_serial_verify_port,
  124. };
  125. static irqreturn_t mn10300_serial_interrupt(int irq, void *dev_id);
  126. /*
  127. * the first on-chip serial port: ttySM0 (aka SIF0)
  128. */
  129. #ifdef CONFIG_MN10300_TTYSM0
  130. struct mn10300_serial_port mn10300_serial_port_sif0 = {
  131. .uart.ops = &mn10300_serial_ops,
  132. .uart.membase = (void __iomem *) &SC0CTR,
  133. .uart.mapbase = (unsigned long) &SC0CTR,
  134. .uart.iotype = UPIO_MEM,
  135. .uart.irq = 0,
  136. .uart.uartclk = 0, /* MN10300_IOCLK, */
  137. .uart.fifosize = 1,
  138. .uart.flags = UPF_BOOT_AUTOCONF,
  139. .uart.line = 0,
  140. .uart.type = PORT_MN10300,
  141. .uart.lock =
  142. __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif0.uart.lock),
  143. .name = "ttySM0",
  144. ._iobase = &SC0CTR,
  145. ._control = &SC0CTR,
  146. ._status = (volatile u8 *) &SC0STR,
  147. ._intr = &SC0ICR,
  148. ._rxb = &SC0RXB,
  149. ._txb = &SC0TXB,
  150. .rx_name = "ttySM0/Rx",
  151. .tx_name = "ttySM0/Tx",
  152. #ifdef CONFIG_MN10300_TTYSM0_TIMER8
  153. .tm_name = "ttySM0/Timer8",
  154. ._tmxmd = &TM8MD,
  155. ._tmxbr = &TM8BR,
  156. ._tmicr = &TM8ICR,
  157. .tm_irq = TM8IRQ,
  158. .div_timer = MNSCx_DIV_TIMER_16BIT,
  159. #else /* CONFIG_MN10300_TTYSM0_TIMER2 */
  160. .tm_name = "ttySM0/Timer2",
  161. ._tmxmd = &TM2MD,
  162. ._tmxbr = (volatile u16 *) &TM2BR,
  163. ._tmicr = &TM2ICR,
  164. .tm_irq = TM2IRQ,
  165. .div_timer = MNSCx_DIV_TIMER_8BIT,
  166. #endif
  167. .rx_irq = SC0RXIRQ,
  168. .tx_irq = SC0TXIRQ,
  169. .rx_icr = &GxICR(SC0RXIRQ),
  170. .tx_icr = &GxICR(SC0TXIRQ),
  171. .clock_src = MNSCx_CLOCK_SRC_IOCLK,
  172. .options = 0,
  173. #ifdef CONFIG_GDBSTUB_ON_TTYSM0
  174. .gdbstub = 1,
  175. #endif
  176. };
  177. #endif /* CONFIG_MN10300_TTYSM0 */
  178. /*
  179. * the second on-chip serial port: ttySM1 (aka SIF1)
  180. */
  181. #ifdef CONFIG_MN10300_TTYSM1
  182. struct mn10300_serial_port mn10300_serial_port_sif1 = {
  183. .uart.ops = &mn10300_serial_ops,
  184. .uart.membase = (void __iomem *) &SC1CTR,
  185. .uart.mapbase = (unsigned long) &SC1CTR,
  186. .uart.iotype = UPIO_MEM,
  187. .uart.irq = 0,
  188. .uart.uartclk = 0, /* MN10300_IOCLK, */
  189. .uart.fifosize = 1,
  190. .uart.flags = UPF_BOOT_AUTOCONF,
  191. .uart.line = 1,
  192. .uart.type = PORT_MN10300,
  193. .uart.lock =
  194. __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif1.uart.lock),
  195. .name = "ttySM1",
  196. ._iobase = &SC1CTR,
  197. ._control = &SC1CTR,
  198. ._status = (volatile u8 *) &SC1STR,
  199. ._intr = &SC1ICR,
  200. ._rxb = &SC1RXB,
  201. ._txb = &SC1TXB,
  202. .rx_name = "ttySM1/Rx",
  203. .tx_name = "ttySM1/Tx",
  204. #ifdef CONFIG_MN10300_TTYSM1_TIMER9
  205. .tm_name = "ttySM1/Timer9",
  206. ._tmxmd = &TM9MD,
  207. ._tmxbr = &TM9BR,
  208. ._tmicr = &TM9ICR,
  209. .tm_irq = TM9IRQ,
  210. .div_timer = MNSCx_DIV_TIMER_16BIT,
  211. #else /* CONFIG_MN10300_TTYSM1_TIMER3 */
  212. .tm_name = "ttySM1/Timer3",
  213. ._tmxmd = &TM3MD,
  214. ._tmxbr = (volatile u16 *) &TM3BR,
  215. ._tmicr = &TM3ICR,
  216. .tm_irq = TM3IRQ,
  217. .div_timer = MNSCx_DIV_TIMER_8BIT,
  218. #endif
  219. .rx_irq = SC1RXIRQ,
  220. .tx_irq = SC1TXIRQ,
  221. .rx_icr = &GxICR(SC1RXIRQ),
  222. .tx_icr = &GxICR(SC1TXIRQ),
  223. .clock_src = MNSCx_CLOCK_SRC_IOCLK,
  224. .options = 0,
  225. #ifdef CONFIG_GDBSTUB_ON_TTYSM1
  226. .gdbstub = 1,
  227. #endif
  228. };
  229. #endif /* CONFIG_MN10300_TTYSM1 */
  230. /*
  231. * the third on-chip serial port: ttySM2 (aka SIF2)
  232. */
  233. #ifdef CONFIG_MN10300_TTYSM2
  234. struct mn10300_serial_port mn10300_serial_port_sif2 = {
  235. .uart.ops = &mn10300_serial_ops,
  236. .uart.membase = (void __iomem *) &SC2CTR,
  237. .uart.mapbase = (unsigned long) &SC2CTR,
  238. .uart.iotype = UPIO_MEM,
  239. .uart.irq = 0,
  240. .uart.uartclk = 0, /* MN10300_IOCLK, */
  241. .uart.fifosize = 1,
  242. .uart.flags = UPF_BOOT_AUTOCONF,
  243. .uart.line = 2,
  244. #ifdef CONFIG_MN10300_TTYSM2_CTS
  245. .uart.type = PORT_MN10300_CTS,
  246. #else
  247. .uart.type = PORT_MN10300,
  248. #endif
  249. .uart.lock =
  250. __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif2.uart.lock),
  251. .name = "ttySM2",
  252. .rx_name = "ttySM2/Rx",
  253. .tx_name = "ttySM2/Tx",
  254. .tm_name = "ttySM2/Timer10",
  255. ._iobase = &SC2CTR,
  256. ._control = &SC2CTR,
  257. ._status = &SC2STR,
  258. ._intr = &SC2ICR,
  259. ._rxb = &SC2RXB,
  260. ._txb = &SC2TXB,
  261. ._tmxmd = &TM10MD,
  262. ._tmxbr = &TM10BR,
  263. ._tmicr = &TM10ICR,
  264. .tm_irq = TM10IRQ,
  265. .div_timer = MNSCx_DIV_TIMER_16BIT,
  266. .rx_irq = SC2RXIRQ,
  267. .tx_irq = SC2TXIRQ,
  268. .rx_icr = &GxICR(SC2RXIRQ),
  269. .tx_icr = &GxICR(SC2TXIRQ),
  270. .clock_src = MNSCx_CLOCK_SRC_IOCLK,
  271. #ifdef CONFIG_MN10300_TTYSM2_CTS
  272. .options = MNSCx_OPT_CTS,
  273. #else
  274. .options = 0,
  275. #endif
  276. #ifdef CONFIG_GDBSTUB_ON_TTYSM2
  277. .gdbstub = 1,
  278. #endif
  279. };
  280. #endif /* CONFIG_MN10300_TTYSM2 */
  281. /*
  282. * list of available serial ports
  283. */
  284. struct mn10300_serial_port *mn10300_serial_ports[NR_UARTS + 1] = {
  285. #ifdef CONFIG_MN10300_TTYSM0
  286. [0] = &mn10300_serial_port_sif0,
  287. #endif
  288. #ifdef CONFIG_MN10300_TTYSM1
  289. [1] = &mn10300_serial_port_sif1,
  290. #endif
  291. #ifdef CONFIG_MN10300_TTYSM2
  292. [2] = &mn10300_serial_port_sif2,
  293. #endif
  294. [NR_UARTS] = NULL,
  295. };
  296. /*
  297. * we abuse the serial ports' baud timers' interrupt lines to get the ability
  298. * to deliver interrupts to userspace as we use the ports' interrupt lines to
  299. * do virtual DMA on account of the ports having no hardware FIFOs
  300. *
  301. * we can generate an interrupt manually in the assembly stubs by writing to
  302. * the enable and detect bits in the interrupt control register, so all we need
  303. * to do here is disable the interrupt line
  304. *
  305. * note that we can't just leave the line enabled as the baud rate timer *also*
  306. * generates interrupts
  307. */
  308. static void mn10300_serial_mask_ack(unsigned int irq)
  309. {
  310. u16 tmp;
  311. GxICR(irq) = GxICR_LEVEL_6;
  312. tmp = GxICR(irq); /* flush write buffer */
  313. }
  314. static void mn10300_serial_nop(unsigned int irq)
  315. {
  316. }
  317. static struct irq_chip mn10300_serial_pic = {
  318. .name = "mnserial",
  319. .ack = mn10300_serial_mask_ack,
  320. .mask = mn10300_serial_mask_ack,
  321. .mask_ack = mn10300_serial_mask_ack,
  322. .unmask = mn10300_serial_nop,
  323. .end = mn10300_serial_nop,
  324. };
  325. /*
  326. * serial virtual DMA interrupt jump table
  327. */
  328. struct mn10300_serial_int mn10300_serial_int_tbl[NR_IRQS];
  329. static void mn10300_serial_dis_tx_intr(struct mn10300_serial_port *port)
  330. {
  331. u16 x;
  332. *port->tx_icr = GxICR_LEVEL_1 | GxICR_DETECT;
  333. x = *port->tx_icr;
  334. }
  335. static void mn10300_serial_en_tx_intr(struct mn10300_serial_port *port)
  336. {
  337. u16 x;
  338. *port->tx_icr = GxICR_LEVEL_1 | GxICR_ENABLE;
  339. x = *port->tx_icr;
  340. }
  341. static void mn10300_serial_dis_rx_intr(struct mn10300_serial_port *port)
  342. {
  343. u16 x;
  344. *port->rx_icr = GxICR_LEVEL_1 | GxICR_DETECT;
  345. x = *port->rx_icr;
  346. }
  347. /*
  348. * multi-bit equivalent of test_and_clear_bit()
  349. */
  350. static int mask_test_and_clear(volatile u8 *ptr, u8 mask)
  351. {
  352. u32 epsw;
  353. asm volatile(" bclr %1,(%2) \n"
  354. " mov epsw,%0 \n"
  355. : "=d"(epsw) : "d"(mask), "a"(ptr));
  356. return !(epsw & EPSW_FLAG_Z);
  357. }
  358. /*
  359. * receive chars from the ring buffer for this serial port
  360. * - must do break detection here (not done in the UART)
  361. */
  362. static void mn10300_serial_receive_interrupt(struct mn10300_serial_port *port)
  363. {
  364. struct uart_icount *icount = &port->uart.icount;
  365. struct tty_struct *tty = port->uart.info->port.tty;
  366. unsigned ix;
  367. int count;
  368. u8 st, ch, push, status, overrun;
  369. _enter("%s", port->name);
  370. push = 0;
  371. count = CIRC_CNT(port->rx_inp, port->rx_outp, MNSC_BUFFER_SIZE);
  372. count = tty_buffer_request_room(tty, count);
  373. if (count == 0) {
  374. if (!tty->low_latency)
  375. tty_flip_buffer_push(tty);
  376. return;
  377. }
  378. try_again:
  379. /* pull chars out of the hat */
  380. ix = port->rx_outp;
  381. if (ix == port->rx_inp) {
  382. if (push && !tty->low_latency)
  383. tty_flip_buffer_push(tty);
  384. return;
  385. }
  386. ch = port->rx_buffer[ix++];
  387. st = port->rx_buffer[ix++];
  388. smp_rmb();
  389. port->rx_outp = ix & (MNSC_BUFFER_SIZE - 1);
  390. port->uart.icount.rx++;
  391. st &= SC01STR_FEF | SC01STR_PEF | SC01STR_OEF;
  392. status = 0;
  393. overrun = 0;
  394. /* the UART doesn't detect BREAK, so we have to do that ourselves
  395. * - it starts as a framing error on a NUL character
  396. * - then we count another two NUL characters before issuing TTY_BREAK
  397. * - then we end on a normal char or one that has all the bottom bits
  398. * zero and the top bits set
  399. */
  400. switch (port->rx_brk) {
  401. case 0:
  402. /* not breaking at the moment */
  403. break;
  404. case 1:
  405. if (st & SC01STR_FEF && ch == 0) {
  406. port->rx_brk = 2;
  407. goto try_again;
  408. }
  409. goto not_break;
  410. case 2:
  411. if (st & SC01STR_FEF && ch == 0) {
  412. port->rx_brk = 3;
  413. _proto("Rx Break Detected");
  414. icount->brk++;
  415. if (uart_handle_break(&port->uart))
  416. goto ignore_char;
  417. status |= 1 << TTY_BREAK;
  418. goto insert;
  419. }
  420. goto not_break;
  421. default:
  422. if (st & (SC01STR_FEF | SC01STR_PEF | SC01STR_OEF))
  423. goto try_again; /* still breaking */
  424. port->rx_brk = 0; /* end of the break */
  425. switch (ch) {
  426. case 0xFF:
  427. case 0xFE:
  428. case 0xFC:
  429. case 0xF8:
  430. case 0xF0:
  431. case 0xE0:
  432. case 0xC0:
  433. case 0x80:
  434. case 0x00:
  435. /* discard char at probable break end */
  436. goto try_again;
  437. }
  438. break;
  439. }
  440. process_errors:
  441. /* handle framing error */
  442. if (st & SC01STR_FEF) {
  443. if (ch == 0) {
  444. /* framing error with NUL char is probably a BREAK */
  445. port->rx_brk = 1;
  446. goto try_again;
  447. }
  448. _proto("Rx Framing Error");
  449. icount->frame++;
  450. status |= 1 << TTY_FRAME;
  451. }
  452. /* handle parity error */
  453. if (st & SC01STR_PEF) {
  454. _proto("Rx Parity Error");
  455. icount->parity++;
  456. status = TTY_PARITY;
  457. }
  458. /* handle normal char */
  459. if (status == 0) {
  460. if (uart_handle_sysrq_char(&port->uart, ch))
  461. goto ignore_char;
  462. status = (1 << TTY_NORMAL);
  463. }
  464. /* handle overrun error */
  465. if (st & SC01STR_OEF) {
  466. if (port->rx_brk)
  467. goto try_again;
  468. _proto("Rx Overrun Error");
  469. icount->overrun++;
  470. overrun = 1;
  471. }
  472. insert:
  473. status &= port->uart.read_status_mask;
  474. if (!overrun && !(status & port->uart.ignore_status_mask)) {
  475. int flag;
  476. if (status & (1 << TTY_BREAK))
  477. flag = TTY_BREAK;
  478. else if (status & (1 << TTY_PARITY))
  479. flag = TTY_PARITY;
  480. else if (status & (1 << TTY_FRAME))
  481. flag = TTY_FRAME;
  482. else
  483. flag = TTY_NORMAL;
  484. tty_insert_flip_char(tty, ch, flag);
  485. }
  486. /* overrun is special, since it's reported immediately, and doesn't
  487. * affect the current character
  488. */
  489. if (overrun)
  490. tty_insert_flip_char(tty, 0, TTY_OVERRUN);
  491. count--;
  492. if (count <= 0) {
  493. if (!tty->low_latency)
  494. tty_flip_buffer_push(tty);
  495. return;
  496. }
  497. ignore_char:
  498. push = 1;
  499. goto try_again;
  500. not_break:
  501. port->rx_brk = 0;
  502. goto process_errors;
  503. }
  504. /*
  505. * handle an interrupt from the serial transmission "virtual DMA" driver
  506. * - note: the interrupt routine will disable its own interrupts when the Tx
  507. * buffer is empty
  508. */
  509. static void mn10300_serial_transmit_interrupt(struct mn10300_serial_port *port)
  510. {
  511. _enter("%s", port->name);
  512. if (uart_tx_stopped(&port->uart) ||
  513. uart_circ_empty(&port->uart.info->xmit))
  514. mn10300_serial_dis_tx_intr(port);
  515. if (uart_circ_chars_pending(&port->uart.info->xmit) < WAKEUP_CHARS)
  516. uart_write_wakeup(&port->uart);
  517. }
  518. /*
  519. * deal with a change in the status of the CTS line
  520. */
  521. static void mn10300_serial_cts_changed(struct mn10300_serial_port *port, u8 st)
  522. {
  523. u16 ctr;
  524. port->tx_cts = st;
  525. port->uart.icount.cts++;
  526. /* flip the CTS state selector flag to interrupt when it changes
  527. * back */
  528. ctr = *port->_control;
  529. ctr ^= SC2CTR_TWS;
  530. *port->_control = ctr;
  531. uart_handle_cts_change(&port->uart, st & SC2STR_CTS);
  532. wake_up_interruptible(&port->uart.info->delta_msr_wait);
  533. }
  534. /*
  535. * handle a virtual interrupt generated by the lower level "virtual DMA"
  536. * routines (irq is the baud timer interrupt)
  537. */
  538. static irqreturn_t mn10300_serial_interrupt(int irq, void *dev_id)
  539. {
  540. struct mn10300_serial_port *port = dev_id;
  541. u8 st;
  542. spin_lock(&port->uart.lock);
  543. if (port->intr_flags) {
  544. _debug("INT %s: %x", port->name, port->intr_flags);
  545. if (mask_test_and_clear(&port->intr_flags, MNSCx_RX_AVAIL))
  546. mn10300_serial_receive_interrupt(port);
  547. if (mask_test_and_clear(&port->intr_flags,
  548. MNSCx_TX_SPACE | MNSCx_TX_EMPTY))
  549. mn10300_serial_transmit_interrupt(port);
  550. }
  551. /* the only modem control line amongst the whole lot is CTS on
  552. * serial port 2 */
  553. if (port->type == PORT_MN10300_CTS) {
  554. st = *port->_status;
  555. if ((port->tx_cts ^ st) & SC2STR_CTS)
  556. mn10300_serial_cts_changed(port, st);
  557. }
  558. spin_unlock(&port->uart.lock);
  559. return IRQ_HANDLED;
  560. }
  561. /*
  562. * return indication of whether the hardware transmit buffer is empty
  563. */
  564. static unsigned int mn10300_serial_tx_empty(struct uart_port *_port)
  565. {
  566. struct mn10300_serial_port *port =
  567. container_of(_port, struct mn10300_serial_port, uart);
  568. _enter("%s", port->name);
  569. return (*port->_status & (SC01STR_TXF | SC01STR_TBF)) ?
  570. 0 : TIOCSER_TEMT;
  571. }
  572. /*
  573. * set the modem control lines (we don't have any)
  574. */
  575. static void mn10300_serial_set_mctrl(struct uart_port *_port,
  576. unsigned int mctrl)
  577. {
  578. struct mn10300_serial_port *port =
  579. container_of(_port, struct mn10300_serial_port, uart);
  580. _enter("%s,%x", port->name, mctrl);
  581. }
  582. /*
  583. * get the modem control line statuses
  584. */
  585. static unsigned int mn10300_serial_get_mctrl(struct uart_port *_port)
  586. {
  587. struct mn10300_serial_port *port =
  588. container_of(_port, struct mn10300_serial_port, uart);
  589. _enter("%s", port->name);
  590. if (port->type == PORT_MN10300_CTS && !(*port->_status & SC2STR_CTS))
  591. return TIOCM_CAR | TIOCM_DSR;
  592. return TIOCM_CAR | TIOCM_CTS | TIOCM_DSR;
  593. }
  594. /*
  595. * stop transmitting characters
  596. */
  597. static void mn10300_serial_stop_tx(struct uart_port *_port)
  598. {
  599. struct mn10300_serial_port *port =
  600. container_of(_port, struct mn10300_serial_port, uart);
  601. _enter("%s", port->name);
  602. /* disable the virtual DMA */
  603. mn10300_serial_dis_tx_intr(port);
  604. }
  605. /*
  606. * start transmitting characters
  607. * - jump-start transmission if it has stalled
  608. * - enable the serial Tx interrupt (used by the virtual DMA controller)
  609. * - force an interrupt to happen if necessary
  610. */
  611. static void mn10300_serial_start_tx(struct uart_port *_port)
  612. {
  613. struct mn10300_serial_port *port =
  614. container_of(_port, struct mn10300_serial_port, uart);
  615. u16 x;
  616. _enter("%s{%lu}",
  617. port->name,
  618. CIRC_CNT(&port->uart.info->xmit.head,
  619. &port->uart.info->xmit.tail,
  620. UART_XMIT_SIZE));
  621. /* kick the virtual DMA controller */
  622. x = *port->tx_icr;
  623. x |= GxICR_ENABLE;
  624. if (*port->_status & SC01STR_TBF)
  625. x &= ~(GxICR_REQUEST | GxICR_DETECT);
  626. else
  627. x |= GxICR_REQUEST | GxICR_DETECT;
  628. _debug("CTR=%04hx ICR=%02hx STR=%04x TMD=%02hx TBR=%04hx ICR=%04hx",
  629. *port->_control, *port->_intr, *port->_status,
  630. *port->_tmxmd, *port->_tmxbr, *port->tx_icr);
  631. *port->tx_icr = x;
  632. x = *port->tx_icr;
  633. }
  634. /*
  635. * transmit a high-priority XON/XOFF character
  636. */
  637. static void mn10300_serial_send_xchar(struct uart_port *_port, char ch)
  638. {
  639. struct mn10300_serial_port *port =
  640. container_of(_port, struct mn10300_serial_port, uart);
  641. _enter("%s,%02x", port->name, ch);
  642. if (likely(port->gdbstub)) {
  643. port->tx_xchar = ch;
  644. if (ch)
  645. mn10300_serial_en_tx_intr(port);
  646. }
  647. }
  648. /*
  649. * stop receiving characters
  650. * - called whilst the port is being closed
  651. */
  652. static void mn10300_serial_stop_rx(struct uart_port *_port)
  653. {
  654. struct mn10300_serial_port *port =
  655. container_of(_port, struct mn10300_serial_port, uart);
  656. u16 ctr;
  657. _enter("%s", port->name);
  658. ctr = *port->_control;
  659. ctr &= ~SC01CTR_RXE;
  660. *port->_control = ctr;
  661. mn10300_serial_dis_rx_intr(port);
  662. }
  663. /*
  664. * enable modem status interrupts
  665. */
  666. static void mn10300_serial_enable_ms(struct uart_port *_port)
  667. {
  668. struct mn10300_serial_port *port =
  669. container_of(_port, struct mn10300_serial_port, uart);
  670. u16 ctr, cts;
  671. _enter("%s", port->name);
  672. if (port->type == PORT_MN10300_CTS) {
  673. /* want to interrupt when CTS goes low if CTS is now high and
  674. * vice versa
  675. */
  676. port->tx_cts = *port->_status;
  677. cts = (port->tx_cts & SC2STR_CTS) ?
  678. SC2CTR_TWE : SC2CTR_TWE | SC2CTR_TWS;
  679. ctr = *port->_control;
  680. ctr &= ~SC2CTR_TWS;
  681. ctr |= cts;
  682. *port->_control = ctr;
  683. mn10300_serial_en_tx_intr(port);
  684. }
  685. }
  686. /*
  687. * transmit or cease transmitting a break signal
  688. */
  689. static void mn10300_serial_break_ctl(struct uart_port *_port, int ctl)
  690. {
  691. struct mn10300_serial_port *port =
  692. container_of(_port, struct mn10300_serial_port, uart);
  693. _enter("%s,%d", port->name, ctl);
  694. if (ctl) {
  695. /* tell the virtual DMA handler to assert BREAK */
  696. port->tx_break = 1;
  697. mn10300_serial_en_tx_intr(port);
  698. } else {
  699. port->tx_break = 0;
  700. *port->_control &= ~SC01CTR_BKE;
  701. mn10300_serial_en_tx_intr(port);
  702. }
  703. }
  704. /*
  705. * grab the interrupts and enable the port for reception
  706. */
  707. static int mn10300_serial_startup(struct uart_port *_port)
  708. {
  709. struct mn10300_serial_port *port =
  710. container_of(_port, struct mn10300_serial_port, uart);
  711. struct mn10300_serial_int *pint;
  712. _enter("%s{%d}", port->name, port->gdbstub);
  713. if (unlikely(port->gdbstub))
  714. return -EBUSY;
  715. /* allocate an Rx buffer for the virtual DMA handler */
  716. port->rx_buffer = kmalloc(MNSC_BUFFER_SIZE, GFP_KERNEL);
  717. if (!port->rx_buffer)
  718. return -ENOMEM;
  719. port->rx_inp = port->rx_outp = 0;
  720. /* finally, enable the device */
  721. *port->_intr = SC01ICR_TI;
  722. *port->_control |= SC01CTR_TXE | SC01CTR_RXE;
  723. pint = &mn10300_serial_int_tbl[port->rx_irq];
  724. pint->port = port;
  725. pint->vdma = mn10300_serial_vdma_rx_handler;
  726. pint = &mn10300_serial_int_tbl[port->tx_irq];
  727. pint->port = port;
  728. pint->vdma = mn10300_serial_vdma_tx_handler;
  729. set_intr_level(port->rx_irq, GxICR_LEVEL_1);
  730. set_intr_level(port->tx_irq, GxICR_LEVEL_1);
  731. set_irq_chip(port->tm_irq, &mn10300_serial_pic);
  732. if (request_irq(port->rx_irq, mn10300_serial_interrupt,
  733. IRQF_DISABLED, port->rx_name, port) < 0)
  734. goto error;
  735. if (request_irq(port->tx_irq, mn10300_serial_interrupt,
  736. IRQF_DISABLED, port->tx_name, port) < 0)
  737. goto error2;
  738. if (request_irq(port->tm_irq, mn10300_serial_interrupt,
  739. IRQF_DISABLED, port->tm_name, port) < 0)
  740. goto error3;
  741. mn10300_serial_mask_ack(port->tm_irq);
  742. return 0;
  743. error3:
  744. free_irq(port->tx_irq, port);
  745. error2:
  746. free_irq(port->rx_irq, port);
  747. error:
  748. kfree(port->rx_buffer);
  749. port->rx_buffer = NULL;
  750. return -EBUSY;
  751. }
  752. /*
  753. * shutdown the port and release interrupts
  754. */
  755. static void mn10300_serial_shutdown(struct uart_port *_port)
  756. {
  757. struct mn10300_serial_port *port =
  758. container_of(_port, struct mn10300_serial_port, uart);
  759. _enter("%s", port->name);
  760. /* disable the serial port and its baud rate timer */
  761. port->tx_break = 0;
  762. *port->_control &= ~(SC01CTR_TXE | SC01CTR_RXE | SC01CTR_BKE);
  763. *port->_tmxmd = 0;
  764. if (port->rx_buffer) {
  765. void *buf = port->rx_buffer;
  766. port->rx_buffer = NULL;
  767. kfree(buf);
  768. }
  769. /* disable all intrs */
  770. free_irq(port->tm_irq, port);
  771. free_irq(port->rx_irq, port);
  772. free_irq(port->tx_irq, port);
  773. *port->rx_icr = GxICR_LEVEL_1;
  774. *port->tx_icr = GxICR_LEVEL_1;
  775. }
  776. /*
  777. * this routine is called to set the UART divisor registers to match the
  778. * specified baud rate for a serial port.
  779. */
  780. static void mn10300_serial_change_speed(struct mn10300_serial_port *port,
  781. struct ktermios *new,
  782. struct ktermios *old)
  783. {
  784. unsigned long flags;
  785. unsigned long ioclk = port->ioclk;
  786. unsigned cflag;
  787. int baud, bits, xdiv, tmp;
  788. u16 tmxbr, scxctr;
  789. u8 tmxmd, battempt;
  790. u8 div_timer = port->div_timer;
  791. _enter("%s{%lu}", port->name, ioclk);
  792. /* byte size and parity */
  793. cflag = new->c_cflag;
  794. switch (cflag & CSIZE) {
  795. case CS7: scxctr = SC01CTR_CLN_7BIT; bits = 9; break;
  796. case CS8: scxctr = SC01CTR_CLN_8BIT; bits = 10; break;
  797. default: scxctr = SC01CTR_CLN_8BIT; bits = 10; break;
  798. }
  799. if (cflag & CSTOPB) {
  800. scxctr |= SC01CTR_STB_2BIT;
  801. bits++;
  802. }
  803. if (cflag & PARENB) {
  804. bits++;
  805. if (cflag & PARODD)
  806. scxctr |= SC01CTR_PB_ODD;
  807. #ifdef CMSPAR
  808. else if (cflag & CMSPAR)
  809. scxctr |= SC01CTR_PB_FIXED0;
  810. #endif
  811. else
  812. scxctr |= SC01CTR_PB_EVEN;
  813. }
  814. /* Determine divisor based on baud rate */
  815. battempt = 0;
  816. if (div_timer == MNSCx_DIV_TIMER_16BIT)
  817. scxctr |= SC0CTR_CK_TM8UFLOW_8; /* ( == SC1CTR_CK_TM9UFLOW_8
  818. * == SC2CTR_CK_TM10UFLOW) */
  819. else if (div_timer == MNSCx_DIV_TIMER_8BIT)
  820. scxctr |= SC0CTR_CK_TM2UFLOW_8;
  821. try_alternative:
  822. baud = uart_get_baud_rate(&port->uart, new, old, 0,
  823. port->ioclk / 8);
  824. _debug("ALT %d [baud %d]", battempt, baud);
  825. if (!baud)
  826. baud = 9600; /* B0 transition handled in rs_set_termios */
  827. xdiv = 1;
  828. if (baud == 134) {
  829. baud = 269; /* 134 is really 134.5 */
  830. xdiv = 2;
  831. }
  832. if (baud == 38400 &&
  833. (port->uart.flags & UPF_SPD_MASK) == UPF_SPD_CUST
  834. ) {
  835. _debug("CUSTOM %u", port->uart.custom_divisor);
  836. if (div_timer == MNSCx_DIV_TIMER_16BIT) {
  837. if (port->uart.custom_divisor <= 65535) {
  838. tmxmd = TM8MD_SRC_IOCLK;
  839. tmxbr = port->uart.custom_divisor;
  840. port->uart.uartclk = ioclk;
  841. goto timer_okay;
  842. }
  843. if (port->uart.custom_divisor / 8 <= 65535) {
  844. tmxmd = TM8MD_SRC_IOCLK_8;
  845. tmxbr = port->uart.custom_divisor / 8;
  846. port->uart.custom_divisor = tmxbr * 8;
  847. port->uart.uartclk = ioclk / 8;
  848. goto timer_okay;
  849. }
  850. if (port->uart.custom_divisor / 32 <= 65535) {
  851. tmxmd = TM8MD_SRC_IOCLK_32;
  852. tmxbr = port->uart.custom_divisor / 32;
  853. port->uart.custom_divisor = tmxbr * 32;
  854. port->uart.uartclk = ioclk / 32;
  855. goto timer_okay;
  856. }
  857. } else if (div_timer == MNSCx_DIV_TIMER_8BIT) {
  858. if (port->uart.custom_divisor <= 255) {
  859. tmxmd = TM2MD_SRC_IOCLK;
  860. tmxbr = port->uart.custom_divisor;
  861. port->uart.uartclk = ioclk;
  862. goto timer_okay;
  863. }
  864. if (port->uart.custom_divisor / 8 <= 255) {
  865. tmxmd = TM2MD_SRC_IOCLK_8;
  866. tmxbr = port->uart.custom_divisor / 8;
  867. port->uart.custom_divisor = tmxbr * 8;
  868. port->uart.uartclk = ioclk / 8;
  869. goto timer_okay;
  870. }
  871. if (port->uart.custom_divisor / 32 <= 255) {
  872. tmxmd = TM2MD_SRC_IOCLK_32;
  873. tmxbr = port->uart.custom_divisor / 32;
  874. port->uart.custom_divisor = tmxbr * 32;
  875. port->uart.uartclk = ioclk / 32;
  876. goto timer_okay;
  877. }
  878. }
  879. }
  880. switch (div_timer) {
  881. case MNSCx_DIV_TIMER_16BIT:
  882. port->uart.uartclk = ioclk;
  883. tmxmd = TM8MD_SRC_IOCLK;
  884. tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
  885. if (tmp > 0 && tmp <= 65535)
  886. goto timer_okay;
  887. port->uart.uartclk = ioclk / 8;
  888. tmxmd = TM8MD_SRC_IOCLK_8;
  889. tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
  890. if (tmp > 0 && tmp <= 65535)
  891. goto timer_okay;
  892. port->uart.uartclk = ioclk / 32;
  893. tmxmd = TM8MD_SRC_IOCLK_32;
  894. tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
  895. if (tmp > 0 && tmp <= 65535)
  896. goto timer_okay;
  897. break;
  898. case MNSCx_DIV_TIMER_8BIT:
  899. port->uart.uartclk = ioclk;
  900. tmxmd = TM2MD_SRC_IOCLK;
  901. tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
  902. if (tmp > 0 && tmp <= 255)
  903. goto timer_okay;
  904. port->uart.uartclk = ioclk / 8;
  905. tmxmd = TM2MD_SRC_IOCLK_8;
  906. tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
  907. if (tmp > 0 && tmp <= 255)
  908. goto timer_okay;
  909. port->uart.uartclk = ioclk / 32;
  910. tmxmd = TM2MD_SRC_IOCLK_32;
  911. tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
  912. if (tmp > 0 && tmp <= 255)
  913. goto timer_okay;
  914. break;
  915. default:
  916. BUG();
  917. return;
  918. }
  919. /* refuse to change to a baud rate we can't support */
  920. _debug("CAN'T SUPPORT");
  921. switch (battempt) {
  922. case 0:
  923. if (old) {
  924. new->c_cflag &= ~CBAUD;
  925. new->c_cflag |= (old->c_cflag & CBAUD);
  926. battempt = 1;
  927. goto try_alternative;
  928. }
  929. case 1:
  930. /* as a last resort, if the quotient is zero, default to 9600
  931. * bps */
  932. new->c_cflag &= ~CBAUD;
  933. new->c_cflag |= B9600;
  934. battempt = 2;
  935. goto try_alternative;
  936. default:
  937. /* hmmm... can't seem to support 9600 either
  938. * - we could try iterating through the speeds we know about to
  939. * find the lowest
  940. */
  941. new->c_cflag &= ~CBAUD;
  942. new->c_cflag |= B0;
  943. if (div_timer == MNSCx_DIV_TIMER_16BIT)
  944. tmxmd = TM8MD_SRC_IOCLK_32;
  945. else if (div_timer == MNSCx_DIV_TIMER_8BIT)
  946. tmxmd = TM2MD_SRC_IOCLK_32;
  947. tmxbr = 1;
  948. port->uart.uartclk = ioclk / 32;
  949. break;
  950. }
  951. timer_okay:
  952. _debug("UARTCLK: %u / %hu", port->uart.uartclk, tmxbr);
  953. /* make the changes */
  954. spin_lock_irqsave(&port->uart.lock, flags);
  955. uart_update_timeout(&port->uart, new->c_cflag, baud);
  956. /* set the timer to produce the required baud rate */
  957. switch (div_timer) {
  958. case MNSCx_DIV_TIMER_16BIT:
  959. *port->_tmxmd = 0;
  960. *port->_tmxbr = tmxbr;
  961. *port->_tmxmd = TM8MD_INIT_COUNTER;
  962. *port->_tmxmd = tmxmd | TM8MD_COUNT_ENABLE;
  963. break;
  964. case MNSCx_DIV_TIMER_8BIT:
  965. *port->_tmxmd = 0;
  966. *(volatile u8 *) port->_tmxbr = (u8) tmxbr;
  967. *port->_tmxmd = TM2MD_INIT_COUNTER;
  968. *port->_tmxmd = tmxmd | TM2MD_COUNT_ENABLE;
  969. break;
  970. }
  971. /* CTS flow control flag and modem status interrupts */
  972. scxctr &= ~(SC2CTR_TWE | SC2CTR_TWS);
  973. if (port->type == PORT_MN10300_CTS && cflag & CRTSCTS) {
  974. /* want to interrupt when CTS goes low if CTS is now
  975. * high and vice versa
  976. */
  977. port->tx_cts = *port->_status;
  978. if (port->tx_cts & SC2STR_CTS)
  979. scxctr |= SC2CTR_TWE;
  980. else
  981. scxctr |= SC2CTR_TWE | SC2CTR_TWS;
  982. }
  983. /* set up parity check flag */
  984. port->uart.read_status_mask = (1 << TTY_NORMAL) | (1 << TTY_OVERRUN);
  985. if (new->c_iflag & INPCK)
  986. port->uart.read_status_mask |=
  987. (1 << TTY_PARITY) | (1 << TTY_FRAME);
  988. if (new->c_iflag & (BRKINT | PARMRK))
  989. port->uart.read_status_mask |= (1 << TTY_BREAK);
  990. /* characters to ignore */
  991. port->uart.ignore_status_mask = 0;
  992. if (new->c_iflag & IGNPAR)
  993. port->uart.ignore_status_mask |=
  994. (1 << TTY_PARITY) | (1 << TTY_FRAME);
  995. if (new->c_iflag & IGNBRK) {
  996. port->uart.ignore_status_mask |= (1 << TTY_BREAK);
  997. /*
  998. * If we're ignoring parity and break indicators,
  999. * ignore overruns to (for real raw support).
  1000. */
  1001. if (new->c_iflag & IGNPAR)
  1002. port->uart.ignore_status_mask |= (1 << TTY_OVERRUN);
  1003. }
  1004. /* Ignore all characters if CREAD is not set */
  1005. if ((new->c_cflag & CREAD) == 0)
  1006. port->uart.ignore_status_mask |= (1 << TTY_NORMAL);
  1007. scxctr |= *port->_control & (SC01CTR_TXE | SC01CTR_RXE | SC01CTR_BKE);
  1008. *port->_control = scxctr;
  1009. spin_unlock_irqrestore(&port->uart.lock, flags);
  1010. }
  1011. /*
  1012. * set the terminal I/O parameters
  1013. */
  1014. static void mn10300_serial_set_termios(struct uart_port *_port,
  1015. struct ktermios *new,
  1016. struct ktermios *old)
  1017. {
  1018. struct mn10300_serial_port *port =
  1019. container_of(_port, struct mn10300_serial_port, uart);
  1020. _enter("%s,%p,%p", port->name, new, old);
  1021. mn10300_serial_change_speed(port, new, old);
  1022. /* handle turning off CRTSCTS */
  1023. if (!(new->c_cflag & CRTSCTS)) {
  1024. u16 ctr = *port->_control;
  1025. ctr &= ~SC2CTR_TWE;
  1026. *port->_control = ctr;
  1027. }
  1028. }
  1029. /*
  1030. * return description of port type
  1031. */
  1032. static const char *mn10300_serial_type(struct uart_port *_port)
  1033. {
  1034. struct mn10300_serial_port *port =
  1035. container_of(_port, struct mn10300_serial_port, uart);
  1036. if (port->uart.type == PORT_MN10300_CTS)
  1037. return "MN10300 SIF_CTS";
  1038. return "MN10300 SIF";
  1039. }
  1040. /*
  1041. * release I/O and memory regions in use by port
  1042. */
  1043. static void mn10300_serial_release_port(struct uart_port *_port)
  1044. {
  1045. struct mn10300_serial_port *port =
  1046. container_of(_port, struct mn10300_serial_port, uart);
  1047. _enter("%s", port->name);
  1048. release_mem_region((unsigned long) port->_iobase, 16);
  1049. }
  1050. /*
  1051. * request I/O and memory regions for port
  1052. */
  1053. static int mn10300_serial_request_port(struct uart_port *_port)
  1054. {
  1055. struct mn10300_serial_port *port =
  1056. container_of(_port, struct mn10300_serial_port, uart);
  1057. _enter("%s", port->name);
  1058. request_mem_region((unsigned long) port->_iobase, 16, port->name);
  1059. return 0;
  1060. }
  1061. /*
  1062. * configure the type and reserve the ports
  1063. */
  1064. static void mn10300_serial_config_port(struct uart_port *_port, int type)
  1065. {
  1066. struct mn10300_serial_port *port =
  1067. container_of(_port, struct mn10300_serial_port, uart);
  1068. _enter("%s", port->name);
  1069. port->uart.type = PORT_MN10300;
  1070. if (port->options & MNSCx_OPT_CTS)
  1071. port->uart.type = PORT_MN10300_CTS;
  1072. mn10300_serial_request_port(_port);
  1073. }
  1074. /*
  1075. * verify serial parameters are suitable for this port type
  1076. */
  1077. static int mn10300_serial_verify_port(struct uart_port *_port,
  1078. struct serial_struct *ss)
  1079. {
  1080. struct mn10300_serial_port *port =
  1081. container_of(_port, struct mn10300_serial_port, uart);
  1082. void *mapbase = (void *) (unsigned long) port->uart.mapbase;
  1083. _enter("%s", port->name);
  1084. /* these things may not be changed */
  1085. if (ss->irq != port->uart.irq ||
  1086. ss->port != port->uart.iobase ||
  1087. ss->io_type != port->uart.iotype ||
  1088. ss->iomem_base != mapbase ||
  1089. ss->iomem_reg_shift != port->uart.regshift ||
  1090. ss->hub6 != port->uart.hub6 ||
  1091. ss->xmit_fifo_size != port->uart.fifosize)
  1092. return -EINVAL;
  1093. /* type may be changed on a port that supports CTS */
  1094. if (ss->type != port->uart.type) {
  1095. if (!(port->options & MNSCx_OPT_CTS))
  1096. return -EINVAL;
  1097. if (ss->type != PORT_MN10300 &&
  1098. ss->type != PORT_MN10300_CTS)
  1099. return -EINVAL;
  1100. }
  1101. return 0;
  1102. }
  1103. /*
  1104. * initialise the MN10300 on-chip UARTs
  1105. */
  1106. static int __init mn10300_serial_init(void)
  1107. {
  1108. struct mn10300_serial_port *port;
  1109. int ret, i;
  1110. printk(KERN_INFO "%s version %s (%s)\n",
  1111. serial_name, serial_version, serial_revdate);
  1112. #ifdef CONFIG_MN10300_TTYSM2
  1113. SC2TIM = 8; /* make the baud base of timer 2 IOCLK/8 */
  1114. #endif
  1115. set_intr_stub(EXCEP_IRQ_LEVEL1, mn10300_serial_vdma_interrupt);
  1116. ret = uart_register_driver(&mn10300_serial_driver);
  1117. if (!ret) {
  1118. for (i = 0 ; i < NR_PORTS ; i++) {
  1119. port = mn10300_serial_ports[i];
  1120. if (!port || port->gdbstub)
  1121. continue;
  1122. switch (port->clock_src) {
  1123. case MNSCx_CLOCK_SRC_IOCLK:
  1124. port->ioclk = MN10300_IOCLK;
  1125. break;
  1126. #ifdef MN10300_IOBCLK
  1127. case MNSCx_CLOCK_SRC_IOBCLK:
  1128. port->ioclk = MN10300_IOBCLK;
  1129. break;
  1130. #endif
  1131. default:
  1132. BUG();
  1133. }
  1134. ret = uart_add_one_port(&mn10300_serial_driver,
  1135. &port->uart);
  1136. if (ret < 0) {
  1137. _debug("ERROR %d", -ret);
  1138. break;
  1139. }
  1140. }
  1141. if (ret)
  1142. uart_unregister_driver(&mn10300_serial_driver);
  1143. }
  1144. return ret;
  1145. }
  1146. __initcall(mn10300_serial_init);
  1147. #ifdef CONFIG_MN10300_TTYSM_CONSOLE
  1148. /*
  1149. * print a string to the serial port without disturbing the real user of the
  1150. * port too much
  1151. * - the console must be locked by the caller
  1152. */
  1153. static void mn10300_serial_console_write(struct console *co,
  1154. const char *s, unsigned count)
  1155. {
  1156. struct mn10300_serial_port *port;
  1157. unsigned i;
  1158. u16 scxctr, txicr, tmp;
  1159. u8 tmxmd;
  1160. port = mn10300_serial_ports[co->index];
  1161. /* firstly hijack the serial port from the "virtual DMA" controller */
  1162. txicr = *port->tx_icr;
  1163. *port->tx_icr = GxICR_LEVEL_1;
  1164. tmp = *port->tx_icr;
  1165. /* the transmitter may be disabled */
  1166. scxctr = *port->_control;
  1167. if (!(scxctr & SC01CTR_TXE)) {
  1168. /* restart the UART clock */
  1169. tmxmd = *port->_tmxmd;
  1170. switch (port->div_timer) {
  1171. case MNSCx_DIV_TIMER_16BIT:
  1172. *port->_tmxmd = 0;
  1173. *port->_tmxmd = TM8MD_INIT_COUNTER;
  1174. *port->_tmxmd = tmxmd | TM8MD_COUNT_ENABLE;
  1175. break;
  1176. case MNSCx_DIV_TIMER_8BIT:
  1177. *port->_tmxmd = 0;
  1178. *port->_tmxmd = TM2MD_INIT_COUNTER;
  1179. *port->_tmxmd = tmxmd | TM2MD_COUNT_ENABLE;
  1180. break;
  1181. }
  1182. /* enable the transmitter */
  1183. *port->_control = (scxctr & ~SC01CTR_BKE) | SC01CTR_TXE;
  1184. } else if (scxctr & SC01CTR_BKE) {
  1185. /* stop transmitting BREAK */
  1186. *port->_control = (scxctr & ~SC01CTR_BKE);
  1187. }
  1188. /* send the chars into the serial port (with LF -> LFCR conversion) */
  1189. for (i = 0; i < count; i++) {
  1190. char ch = *s++;
  1191. while (*port->_status & SC01STR_TBF)
  1192. continue;
  1193. *(u8 *) port->_txb = ch;
  1194. if (ch == 0x0a) {
  1195. while (*port->_status & SC01STR_TBF)
  1196. continue;
  1197. *(u8 *) port->_txb = 0xd;
  1198. }
  1199. }
  1200. /* can't let the transmitter be turned off if it's actually
  1201. * transmitting */
  1202. while (*port->_status & (SC01STR_TXF | SC01STR_TBF))
  1203. continue;
  1204. /* disable the transmitter if we re-enabled it */
  1205. if (!(scxctr & SC01CTR_TXE))
  1206. *port->_control = scxctr;
  1207. *port->tx_icr = txicr;
  1208. tmp = *port->tx_icr;
  1209. }
  1210. /*
  1211. * set up a serial port as a console
  1212. * - construct a cflag setting for the first rs_open()
  1213. * - initialize the serial port
  1214. * - return non-zero if we didn't find a serial port.
  1215. */
  1216. static int __init mn10300_serial_console_setup(struct console *co,
  1217. char *options)
  1218. {
  1219. struct mn10300_serial_port *port;
  1220. int i, parity = 'n', baud = 9600, bits = 8, flow = 0;
  1221. for (i = 0 ; i < NR_PORTS ; i++) {
  1222. port = mn10300_serial_ports[i];
  1223. if (port && !port->gdbstub && port->uart.line == co->index)
  1224. goto found_device;
  1225. }
  1226. return -ENODEV;
  1227. found_device:
  1228. switch (port->clock_src) {
  1229. case MNSCx_CLOCK_SRC_IOCLK:
  1230. port->ioclk = MN10300_IOCLK;
  1231. break;
  1232. #ifdef MN10300_IOBCLK
  1233. case MNSCx_CLOCK_SRC_IOBCLK:
  1234. port->ioclk = MN10300_IOBCLK;
  1235. break;
  1236. #endif
  1237. default:
  1238. BUG();
  1239. }
  1240. if (options)
  1241. uart_parse_options(options, &baud, &parity, &bits, &flow);
  1242. return uart_set_options(&port->uart, co, baud, parity, bits, flow);
  1243. }
  1244. /*
  1245. * register console
  1246. */
  1247. static int __init mn10300_serial_console_init(void)
  1248. {
  1249. register_console(&mn10300_serial_console);
  1250. return 0;
  1251. }
  1252. console_initcall(mn10300_serial_console_init);
  1253. #endif