setup.c 8.0 KB

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  1. /*
  2. * Toshiba RBTX4939 setup routines.
  3. * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
  4. * and RBTX49xx patch from CELF patch archive.
  5. *
  6. * Copyright (C) 2000-2001,2005-2007 Toshiba Corporation
  7. * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
  8. * terms of the GNU General Public License version 2. This program is
  9. * licensed "as is" without any warranty of any kind, whether express
  10. * or implied.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/types.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/leds.h>
  17. #include <asm/reboot.h>
  18. #include <asm/txx9/generic.h>
  19. #include <asm/txx9/pci.h>
  20. #include <asm/txx9/rbtx4939.h>
  21. static void rbtx4939_machine_restart(char *command)
  22. {
  23. local_irq_disable();
  24. writeb(1, rbtx4939_reseten_addr);
  25. writeb(1, rbtx4939_softreset_addr);
  26. while (1)
  27. ;
  28. }
  29. static void __init rbtx4939_time_init(void)
  30. {
  31. tx4939_time_init(0);
  32. }
  33. static void __init rbtx4939_pci_setup(void)
  34. {
  35. #ifdef CONFIG_PCI
  36. int extarb = !(__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCIARB);
  37. struct pci_controller *c = &txx9_primary_pcic;
  38. register_pci_controller(c);
  39. tx4939_report_pciclk();
  40. tx4927_pcic_setup(tx4939_pcicptr, c, extarb);
  41. if (!(__raw_readq(&tx4939_ccfgptr->pcfg) & TX4939_PCFG_ATA1MODE) &&
  42. (__raw_readq(&tx4939_ccfgptr->pcfg) &
  43. (TX4939_PCFG_ET0MODE | TX4939_PCFG_ET1MODE))) {
  44. tx4939_report_pci1clk();
  45. /* mem:64K(max), io:64K(max) (enough for ETH0,ETH1) */
  46. c = txx9_alloc_pci_controller(NULL, 0, 0x10000, 0, 0x10000);
  47. register_pci_controller(c);
  48. tx4927_pcic_setup(tx4939_pcic1ptr, c, 0);
  49. }
  50. tx4939_setup_pcierr_irq();
  51. #endif /* CONFIG_PCI */
  52. }
  53. static unsigned long long default_ebccr[] __initdata = {
  54. 0x01c0000000007608ULL, /* 64M ROM */
  55. 0x017f000000007049ULL, /* 1M IOC */
  56. 0x0180000000408608ULL, /* ISA */
  57. 0,
  58. };
  59. static void __init rbtx4939_ebusc_setup(void)
  60. {
  61. int i;
  62. unsigned int sp;
  63. /* use user-configured speed */
  64. sp = TX4939_EBUSC_CR(0) & 0x30;
  65. default_ebccr[0] |= sp;
  66. default_ebccr[1] |= sp;
  67. default_ebccr[2] |= sp;
  68. /* initialise by myself */
  69. for (i = 0; i < ARRAY_SIZE(default_ebccr); i++) {
  70. if (default_ebccr[i])
  71. ____raw_writeq(default_ebccr[i],
  72. &tx4939_ebuscptr->cr[i]);
  73. else
  74. ____raw_writeq(____raw_readq(&tx4939_ebuscptr->cr[i])
  75. & ~8,
  76. &tx4939_ebuscptr->cr[i]);
  77. }
  78. }
  79. static void __init rbtx4939_update_ioc_pen(void)
  80. {
  81. __u64 pcfg = ____raw_readq(&tx4939_ccfgptr->pcfg);
  82. __u64 ccfg = ____raw_readq(&tx4939_ccfgptr->ccfg);
  83. __u8 pe1 = readb(rbtx4939_pe1_addr);
  84. __u8 pe2 = readb(rbtx4939_pe2_addr);
  85. __u8 pe3 = readb(rbtx4939_pe3_addr);
  86. if (pcfg & TX4939_PCFG_ATA0MODE)
  87. pe1 |= RBTX4939_PE1_ATA(0);
  88. else
  89. pe1 &= ~RBTX4939_PE1_ATA(0);
  90. if (pcfg & TX4939_PCFG_ATA1MODE) {
  91. pe1 |= RBTX4939_PE1_ATA(1);
  92. pe1 &= ~(RBTX4939_PE1_RMII(0) | RBTX4939_PE1_RMII(1));
  93. } else {
  94. pe1 &= ~RBTX4939_PE1_ATA(1);
  95. if (pcfg & TX4939_PCFG_ET0MODE)
  96. pe1 |= RBTX4939_PE1_RMII(0);
  97. else
  98. pe1 &= ~RBTX4939_PE1_RMII(0);
  99. if (pcfg & TX4939_PCFG_ET1MODE)
  100. pe1 |= RBTX4939_PE1_RMII(1);
  101. else
  102. pe1 &= ~RBTX4939_PE1_RMII(1);
  103. }
  104. if (ccfg & TX4939_CCFG_PTSEL)
  105. pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_P |
  106. RBTX4939_PE3_VP_S);
  107. else {
  108. __u64 vmode = pcfg &
  109. (TX4939_PCFG_VSSMODE | TX4939_PCFG_VPSMODE);
  110. if (vmode == 0)
  111. pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_P |
  112. RBTX4939_PE3_VP_S);
  113. else if (vmode == TX4939_PCFG_VPSMODE) {
  114. pe3 |= RBTX4939_PE3_VP_P;
  115. pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_S);
  116. } else if (vmode == TX4939_PCFG_VSSMODE) {
  117. pe3 |= RBTX4939_PE3_VP | RBTX4939_PE3_VP_S;
  118. pe3 &= ~RBTX4939_PE3_VP_P;
  119. } else {
  120. pe3 |= RBTX4939_PE3_VP | RBTX4939_PE3_VP_P;
  121. pe3 &= ~RBTX4939_PE3_VP_S;
  122. }
  123. }
  124. if (pcfg & TX4939_PCFG_SPIMODE) {
  125. if (pcfg & TX4939_PCFG_SIO2MODE_GPIO)
  126. pe2 &= ~(RBTX4939_PE2_SIO2 | RBTX4939_PE2_SIO0);
  127. else {
  128. if (pcfg & TX4939_PCFG_SIO2MODE_SIO2) {
  129. pe2 |= RBTX4939_PE2_SIO2;
  130. pe2 &= ~RBTX4939_PE2_SIO0;
  131. } else {
  132. pe2 |= RBTX4939_PE2_SIO0;
  133. pe2 &= ~RBTX4939_PE2_SIO2;
  134. }
  135. }
  136. if (pcfg & TX4939_PCFG_SIO3MODE)
  137. pe2 |= RBTX4939_PE2_SIO3;
  138. else
  139. pe2 &= ~RBTX4939_PE2_SIO3;
  140. pe2 &= ~RBTX4939_PE2_SPI;
  141. } else {
  142. pe2 |= RBTX4939_PE2_SPI;
  143. pe2 &= ~(RBTX4939_PE2_SIO3 | RBTX4939_PE2_SIO2 |
  144. RBTX4939_PE2_SIO0);
  145. }
  146. if ((pcfg & TX4939_PCFG_I2SMODE_MASK) == TX4939_PCFG_I2SMODE_GPIO)
  147. pe2 |= RBTX4939_PE2_GPIO;
  148. else
  149. pe2 &= ~RBTX4939_PE2_GPIO;
  150. writeb(pe1, rbtx4939_pe1_addr);
  151. writeb(pe2, rbtx4939_pe2_addr);
  152. writeb(pe3, rbtx4939_pe3_addr);
  153. }
  154. #define RBTX4939_MAX_7SEGLEDS 8
  155. #if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE)
  156. static u8 led_val[RBTX4939_MAX_7SEGLEDS];
  157. struct rbtx4939_led_data {
  158. struct led_classdev cdev;
  159. char name[32];
  160. unsigned int num;
  161. };
  162. /* Use "dot" in 7seg LEDs */
  163. static void rbtx4939_led_brightness_set(struct led_classdev *led_cdev,
  164. enum led_brightness value)
  165. {
  166. struct rbtx4939_led_data *led_dat =
  167. container_of(led_cdev, struct rbtx4939_led_data, cdev);
  168. unsigned int num = led_dat->num;
  169. unsigned long flags;
  170. local_irq_save(flags);
  171. led_val[num] = (led_val[num] & 0x7f) | (value ? 0x80 : 0);
  172. writeb(led_val[num], rbtx4939_7seg_addr(num / 4, num % 4));
  173. local_irq_restore(flags);
  174. }
  175. static int __init rbtx4939_led_probe(struct platform_device *pdev)
  176. {
  177. struct rbtx4939_led_data *leds_data;
  178. int i;
  179. static char *default_triggers[] __initdata = {
  180. "heartbeat",
  181. "ide-disk",
  182. "nand-disk",
  183. };
  184. leds_data = kzalloc(sizeof(*leds_data) * RBTX4939_MAX_7SEGLEDS,
  185. GFP_KERNEL);
  186. if (!leds_data)
  187. return -ENOMEM;
  188. for (i = 0; i < RBTX4939_MAX_7SEGLEDS; i++) {
  189. int rc;
  190. struct rbtx4939_led_data *led_dat = &leds_data[i];
  191. led_dat->num = i;
  192. led_dat->cdev.brightness_set = rbtx4939_led_brightness_set;
  193. sprintf(led_dat->name, "rbtx4939:amber:%u", i);
  194. led_dat->cdev.name = led_dat->name;
  195. if (i < ARRAY_SIZE(default_triggers))
  196. led_dat->cdev.default_trigger = default_triggers[i];
  197. rc = led_classdev_register(&pdev->dev, &led_dat->cdev);
  198. if (rc < 0)
  199. return rc;
  200. led_dat->cdev.brightness_set(&led_dat->cdev, 0);
  201. }
  202. return 0;
  203. }
  204. static struct platform_driver rbtx4939_led_driver = {
  205. .driver = {
  206. .name = "rbtx4939-led",
  207. .owner = THIS_MODULE,
  208. },
  209. };
  210. static void __init rbtx4939_led_setup(void)
  211. {
  212. platform_device_register_simple("rbtx4939-led", -1, NULL, 0);
  213. platform_driver_probe(&rbtx4939_led_driver, rbtx4939_led_probe);
  214. }
  215. #else
  216. static inline void rbtx4939_led_setup(void)
  217. {
  218. }
  219. #endif
  220. static void __init rbtx4939_arch_init(void)
  221. {
  222. rbtx4939_pci_setup();
  223. }
  224. static void __init rbtx4939_device_init(void)
  225. {
  226. #if defined(CONFIG_TC35815) || defined(CONFIG_TC35815_MODULE)
  227. int i, j;
  228. unsigned char ethaddr[2][6];
  229. for (i = 0; i < 2; i++) {
  230. unsigned long area = CKSEG1 + 0x1fff0000 + (i * 0x10);
  231. if (readb(rbtx4939_bdipsw_addr) & 8) {
  232. u16 buf[3];
  233. area -= 0x03000000;
  234. for (j = 0; j < 3; j++)
  235. buf[j] = le16_to_cpup((u16 *)(area + j * 2));
  236. memcpy(ethaddr[i], buf, 6);
  237. } else
  238. memcpy(ethaddr[i], (void *)area, 6);
  239. }
  240. tx4939_ethaddr_init(ethaddr[0], ethaddr[1]);
  241. #endif
  242. rbtx4939_led_setup();
  243. tx4939_wdt_init();
  244. tx4939_ata_init();
  245. }
  246. static void __init rbtx4939_setup(void)
  247. {
  248. rbtx4939_ebusc_setup();
  249. /* always enable ATA0 */
  250. txx9_set64(&tx4939_ccfgptr->pcfg, TX4939_PCFG_ATA0MODE);
  251. rbtx4939_update_ioc_pen();
  252. if (txx9_master_clock == 0)
  253. txx9_master_clock = 20000000;
  254. tx4939_setup();
  255. _machine_restart = rbtx4939_machine_restart;
  256. pr_info("RBTX4939 (Rev %02x) --- FPGA(Rev %02x) DIPSW:%02x,%02x\n",
  257. readb(rbtx4939_board_rev_addr), readb(rbtx4939_ioc_rev_addr),
  258. readb(rbtx4939_udipsw_addr), readb(rbtx4939_bdipsw_addr));
  259. #ifdef CONFIG_PCI
  260. txx9_alloc_pci_controller(&txx9_primary_pcic, 0, 0, 0, 0);
  261. txx9_board_pcibios_setup = tx4927_pcibios_setup;
  262. #else
  263. set_io_port_base(RBTX4939_ETHER_BASE);
  264. #endif
  265. tx4939_sio_init(TX4939_SCLK0(txx9_master_clock), 0);
  266. }
  267. struct txx9_board_vec rbtx4939_vec __initdata = {
  268. .system = "Tothiba RBTX4939",
  269. .prom_init = rbtx4939_prom_init,
  270. .mem_setup = rbtx4939_setup,
  271. .irq_setup = rbtx4939_irq_setup,
  272. .time_init = rbtx4939_time_init,
  273. .device_init = rbtx4939_device_init,
  274. .arch_init = rbtx4939_arch_init,
  275. #ifdef CONFIG_PCI
  276. .pci_map_irq = tx4939_pci_map_irq,
  277. #endif
  278. };