setup.c 18 KB

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  1. /*
  2. * linux/arch/mips/txx9/generic/setup.c
  3. *
  4. * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
  5. * and RBTX49xx patch from CELF patch archive.
  6. *
  7. * 2003-2005 (c) MontaVista Software, Inc.
  8. * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
  9. *
  10. * This file is subject to the terms and conditions of the GNU General Public
  11. * License. See the file "COPYING" in the main directory of this archive
  12. * for more details.
  13. */
  14. #include <linux/init.h>
  15. #include <linux/kernel.h>
  16. #include <linux/types.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/string.h>
  19. #include <linux/module.h>
  20. #include <linux/clk.h>
  21. #include <linux/err.h>
  22. #include <linux/gpio.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/serial_core.h>
  25. #include <linux/mtd/physmap.h>
  26. #include <linux/leds.h>
  27. #include <asm/bootinfo.h>
  28. #include <asm/time.h>
  29. #include <asm/reboot.h>
  30. #include <asm/r4kcache.h>
  31. #include <asm/sections.h>
  32. #include <asm/txx9/generic.h>
  33. #include <asm/txx9/pci.h>
  34. #include <asm/txx9tmr.h>
  35. #ifdef CONFIG_CPU_TX49XX
  36. #include <asm/txx9/tx4938.h>
  37. #endif
  38. /* EBUSC settings of TX4927, etc. */
  39. struct resource txx9_ce_res[8];
  40. static char txx9_ce_res_name[8][4]; /* "CEn" */
  41. /* pcode, internal register */
  42. unsigned int txx9_pcode;
  43. char txx9_pcode_str[8];
  44. static struct resource txx9_reg_res = {
  45. .name = txx9_pcode_str,
  46. .flags = IORESOURCE_MEM,
  47. };
  48. void __init
  49. txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size)
  50. {
  51. int i;
  52. for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) {
  53. sprintf(txx9_ce_res_name[i], "CE%d", i);
  54. txx9_ce_res[i].flags = IORESOURCE_MEM;
  55. txx9_ce_res[i].name = txx9_ce_res_name[i];
  56. }
  57. txx9_pcode = pcode;
  58. sprintf(txx9_pcode_str, "TX%x", pcode);
  59. if (base) {
  60. txx9_reg_res.start = base & 0xfffffffffULL;
  61. txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1);
  62. request_resource(&iomem_resource, &txx9_reg_res);
  63. }
  64. }
  65. /* clocks */
  66. unsigned int txx9_master_clock;
  67. unsigned int txx9_cpu_clock;
  68. unsigned int txx9_gbus_clock;
  69. #ifdef CONFIG_CPU_TX39XX
  70. /* don't enable by default - see errata */
  71. int txx9_ccfg_toeon __initdata;
  72. #else
  73. int txx9_ccfg_toeon __initdata = 1;
  74. #endif
  75. /* Minimum CLK support */
  76. struct clk *clk_get(struct device *dev, const char *id)
  77. {
  78. if (!strcmp(id, "spi-baseclk"))
  79. return (struct clk *)((unsigned long)txx9_gbus_clock / 2 / 4);
  80. if (!strcmp(id, "imbus_clk"))
  81. return (struct clk *)((unsigned long)txx9_gbus_clock / 2);
  82. return ERR_PTR(-ENOENT);
  83. }
  84. EXPORT_SYMBOL(clk_get);
  85. int clk_enable(struct clk *clk)
  86. {
  87. return 0;
  88. }
  89. EXPORT_SYMBOL(clk_enable);
  90. void clk_disable(struct clk *clk)
  91. {
  92. }
  93. EXPORT_SYMBOL(clk_disable);
  94. unsigned long clk_get_rate(struct clk *clk)
  95. {
  96. return (unsigned long)clk;
  97. }
  98. EXPORT_SYMBOL(clk_get_rate);
  99. void clk_put(struct clk *clk)
  100. {
  101. }
  102. EXPORT_SYMBOL(clk_put);
  103. /* GPIO support */
  104. #ifdef CONFIG_GENERIC_GPIO
  105. int gpio_to_irq(unsigned gpio)
  106. {
  107. return -EINVAL;
  108. }
  109. EXPORT_SYMBOL(gpio_to_irq);
  110. int irq_to_gpio(unsigned irq)
  111. {
  112. return -EINVAL;
  113. }
  114. EXPORT_SYMBOL(irq_to_gpio);
  115. #endif
  116. #define BOARD_VEC(board) extern struct txx9_board_vec board;
  117. #include <asm/txx9/boards.h>
  118. #undef BOARD_VEC
  119. struct txx9_board_vec *txx9_board_vec __initdata;
  120. static char txx9_system_type[32];
  121. static struct txx9_board_vec *board_vecs[] __initdata = {
  122. #define BOARD_VEC(board) &board,
  123. #include <asm/txx9/boards.h>
  124. #undef BOARD_VEC
  125. };
  126. static struct txx9_board_vec *__init find_board_byname(const char *name)
  127. {
  128. int i;
  129. /* search board_vecs table */
  130. for (i = 0; i < ARRAY_SIZE(board_vecs); i++) {
  131. if (strstr(board_vecs[i]->system, name))
  132. return board_vecs[i];
  133. }
  134. return NULL;
  135. }
  136. static void __init prom_init_cmdline(void)
  137. {
  138. int argc = (int)fw_arg0;
  139. int *argv32 = (int *)fw_arg1;
  140. int i; /* Always ignore the "-c" at argv[0] */
  141. char builtin[CL_SIZE];
  142. /* ignore all built-in args if any f/w args given */
  143. /*
  144. * But if built-in strings was started with '+', append them
  145. * to command line args. If built-in was started with '-',
  146. * ignore all f/w args.
  147. */
  148. builtin[0] = '\0';
  149. if (arcs_cmdline[0] == '+')
  150. strcpy(builtin, arcs_cmdline + 1);
  151. else if (arcs_cmdline[0] == '-') {
  152. strcpy(builtin, arcs_cmdline + 1);
  153. argc = 0;
  154. } else if (argc <= 1)
  155. strcpy(builtin, arcs_cmdline);
  156. arcs_cmdline[0] = '\0';
  157. for (i = 1; i < argc; i++) {
  158. char *str = (char *)(long)argv32[i];
  159. if (i != 1)
  160. strcat(arcs_cmdline, " ");
  161. if (strchr(str, ' ')) {
  162. strcat(arcs_cmdline, "\"");
  163. strcat(arcs_cmdline, str);
  164. strcat(arcs_cmdline, "\"");
  165. } else
  166. strcat(arcs_cmdline, str);
  167. }
  168. /* append saved builtin args */
  169. if (builtin[0]) {
  170. if (arcs_cmdline[0])
  171. strcat(arcs_cmdline, " ");
  172. strcat(arcs_cmdline, builtin);
  173. }
  174. }
  175. static int txx9_ic_disable __initdata;
  176. static int txx9_dc_disable __initdata;
  177. #if defined(CONFIG_CPU_TX49XX)
  178. /* flush all cache on very early stage (before 4k_cache_init) */
  179. static void __init early_flush_dcache(void)
  180. {
  181. unsigned int conf = read_c0_config();
  182. unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6));
  183. unsigned int linesz = 32;
  184. unsigned long addr, end;
  185. end = INDEX_BASE + dc_size / 4;
  186. /* 4way, waybit=0 */
  187. for (addr = INDEX_BASE; addr < end; addr += linesz) {
  188. cache_op(Index_Writeback_Inv_D, addr | 0);
  189. cache_op(Index_Writeback_Inv_D, addr | 1);
  190. cache_op(Index_Writeback_Inv_D, addr | 2);
  191. cache_op(Index_Writeback_Inv_D, addr | 3);
  192. }
  193. }
  194. static void __init txx9_cache_fixup(void)
  195. {
  196. unsigned int conf;
  197. conf = read_c0_config();
  198. /* flush and disable */
  199. if (txx9_ic_disable) {
  200. conf |= TX49_CONF_IC;
  201. write_c0_config(conf);
  202. }
  203. if (txx9_dc_disable) {
  204. early_flush_dcache();
  205. conf |= TX49_CONF_DC;
  206. write_c0_config(conf);
  207. }
  208. /* enable cache */
  209. conf = read_c0_config();
  210. if (!txx9_ic_disable)
  211. conf &= ~TX49_CONF_IC;
  212. if (!txx9_dc_disable)
  213. conf &= ~TX49_CONF_DC;
  214. write_c0_config(conf);
  215. if (conf & TX49_CONF_IC)
  216. pr_info("TX49XX I-Cache disabled.\n");
  217. if (conf & TX49_CONF_DC)
  218. pr_info("TX49XX D-Cache disabled.\n");
  219. }
  220. #elif defined(CONFIG_CPU_TX39XX)
  221. /* flush all cache on very early stage (before tx39_cache_init) */
  222. static void __init early_flush_dcache(void)
  223. {
  224. unsigned int conf = read_c0_config();
  225. unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >>
  226. TX39_CONF_DCS_SHIFT));
  227. unsigned int linesz = 16;
  228. unsigned long addr, end;
  229. end = INDEX_BASE + dc_size / 2;
  230. /* 2way, waybit=0 */
  231. for (addr = INDEX_BASE; addr < end; addr += linesz) {
  232. cache_op(Index_Writeback_Inv_D, addr | 0);
  233. cache_op(Index_Writeback_Inv_D, addr | 1);
  234. }
  235. }
  236. static void __init txx9_cache_fixup(void)
  237. {
  238. unsigned int conf;
  239. conf = read_c0_config();
  240. /* flush and disable */
  241. if (txx9_ic_disable) {
  242. conf &= ~TX39_CONF_ICE;
  243. write_c0_config(conf);
  244. }
  245. if (txx9_dc_disable) {
  246. early_flush_dcache();
  247. conf &= ~TX39_CONF_DCE;
  248. write_c0_config(conf);
  249. }
  250. /* enable cache */
  251. conf = read_c0_config();
  252. if (!txx9_ic_disable)
  253. conf |= TX39_CONF_ICE;
  254. if (!txx9_dc_disable)
  255. conf |= TX39_CONF_DCE;
  256. write_c0_config(conf);
  257. if (!(conf & TX39_CONF_ICE))
  258. pr_info("TX39XX I-Cache disabled.\n");
  259. if (!(conf & TX39_CONF_DCE))
  260. pr_info("TX39XX D-Cache disabled.\n");
  261. }
  262. #else
  263. static inline void txx9_cache_fixup(void)
  264. {
  265. }
  266. #endif
  267. static void __init preprocess_cmdline(void)
  268. {
  269. char cmdline[CL_SIZE];
  270. char *s;
  271. strcpy(cmdline, arcs_cmdline);
  272. s = cmdline;
  273. arcs_cmdline[0] = '\0';
  274. while (s && *s) {
  275. char *str = strsep(&s, " ");
  276. if (strncmp(str, "board=", 6) == 0) {
  277. txx9_board_vec = find_board_byname(str + 6);
  278. continue;
  279. } else if (strncmp(str, "masterclk=", 10) == 0) {
  280. unsigned long val;
  281. if (strict_strtoul(str + 10, 10, &val) == 0)
  282. txx9_master_clock = val;
  283. continue;
  284. } else if (strcmp(str, "icdisable") == 0) {
  285. txx9_ic_disable = 1;
  286. continue;
  287. } else if (strcmp(str, "dcdisable") == 0) {
  288. txx9_dc_disable = 1;
  289. continue;
  290. } else if (strcmp(str, "toeoff") == 0) {
  291. txx9_ccfg_toeon = 0;
  292. continue;
  293. } else if (strcmp(str, "toeon") == 0) {
  294. txx9_ccfg_toeon = 1;
  295. continue;
  296. }
  297. if (arcs_cmdline[0])
  298. strcat(arcs_cmdline, " ");
  299. strcat(arcs_cmdline, str);
  300. }
  301. txx9_cache_fixup();
  302. }
  303. static void __init select_board(void)
  304. {
  305. const char *envstr;
  306. /* first, determine by "board=" argument in preprocess_cmdline() */
  307. if (txx9_board_vec)
  308. return;
  309. /* next, determine by "board" envvar */
  310. envstr = prom_getenv("board");
  311. if (envstr) {
  312. txx9_board_vec = find_board_byname(envstr);
  313. if (txx9_board_vec)
  314. return;
  315. }
  316. /* select "default" board */
  317. #ifdef CONFIG_CPU_TX39XX
  318. txx9_board_vec = &jmr3927_vec;
  319. #endif
  320. #ifdef CONFIG_CPU_TX49XX
  321. switch (TX4938_REV_PCODE()) {
  322. #ifdef CONFIG_TOSHIBA_RBTX4927
  323. case 0x4927:
  324. txx9_board_vec = &rbtx4927_vec;
  325. break;
  326. case 0x4937:
  327. txx9_board_vec = &rbtx4937_vec;
  328. break;
  329. #endif
  330. #ifdef CONFIG_TOSHIBA_RBTX4938
  331. case 0x4938:
  332. txx9_board_vec = &rbtx4938_vec;
  333. break;
  334. #endif
  335. #ifdef CONFIG_TOSHIBA_RBTX4939
  336. case 0x4939:
  337. txx9_board_vec = &rbtx4939_vec;
  338. break;
  339. #endif
  340. }
  341. #endif
  342. }
  343. void __init prom_init(void)
  344. {
  345. prom_init_cmdline();
  346. preprocess_cmdline();
  347. select_board();
  348. strcpy(txx9_system_type, txx9_board_vec->system);
  349. txx9_board_vec->prom_init();
  350. }
  351. void __init prom_free_prom_memory(void)
  352. {
  353. unsigned long saddr = PAGE_SIZE;
  354. unsigned long eaddr = __pa_symbol(&_text);
  355. if (saddr < eaddr)
  356. free_init_pages("prom memory", saddr, eaddr);
  357. }
  358. const char *get_system_type(void)
  359. {
  360. return txx9_system_type;
  361. }
  362. char * __init prom_getcmdline(void)
  363. {
  364. return &(arcs_cmdline[0]);
  365. }
  366. const char *__init prom_getenv(const char *name)
  367. {
  368. const s32 *str = (const s32 *)fw_arg2;
  369. if (!str)
  370. return NULL;
  371. /* YAMON style ("name", "value" pairs) */
  372. while (str[0] && str[1]) {
  373. if (!strcmp((const char *)(unsigned long)str[0], name))
  374. return (const char *)(unsigned long)str[1];
  375. str += 2;
  376. }
  377. return NULL;
  378. }
  379. static void __noreturn txx9_machine_halt(void)
  380. {
  381. local_irq_disable();
  382. clear_c0_status(ST0_IM);
  383. while (1) {
  384. if (cpu_wait) {
  385. (*cpu_wait)();
  386. if (cpu_has_counter) {
  387. /*
  388. * Clear counter interrupt while it
  389. * breaks WAIT instruction even if
  390. * masked.
  391. */
  392. write_c0_compare(0);
  393. }
  394. }
  395. }
  396. }
  397. /* Watchdog support */
  398. void __init txx9_wdt_init(unsigned long base)
  399. {
  400. struct resource res = {
  401. .start = base,
  402. .end = base + 0x100 - 1,
  403. .flags = IORESOURCE_MEM,
  404. };
  405. platform_device_register_simple("txx9wdt", -1, &res, 1);
  406. }
  407. void txx9_wdt_now(unsigned long base)
  408. {
  409. struct txx9_tmr_reg __iomem *tmrptr =
  410. ioremap(base, sizeof(struct txx9_tmr_reg));
  411. /* disable watch dog timer */
  412. __raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr);
  413. __raw_writel(0, &tmrptr->tcr);
  414. /* kick watchdog */
  415. __raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr);
  416. __raw_writel(1, &tmrptr->cpra); /* immediate */
  417. __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG,
  418. &tmrptr->tcr);
  419. }
  420. /* SPI support */
  421. void __init txx9_spi_init(int busid, unsigned long base, int irq)
  422. {
  423. struct resource res[] = {
  424. {
  425. .start = base,
  426. .end = base + 0x20 - 1,
  427. .flags = IORESOURCE_MEM,
  428. }, {
  429. .start = irq,
  430. .flags = IORESOURCE_IRQ,
  431. },
  432. };
  433. platform_device_register_simple("spi_txx9", busid,
  434. res, ARRAY_SIZE(res));
  435. }
  436. void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr)
  437. {
  438. struct platform_device *pdev =
  439. platform_device_alloc("tc35815-mac", id);
  440. if (!pdev ||
  441. platform_device_add_data(pdev, ethaddr, 6) ||
  442. platform_device_add(pdev))
  443. platform_device_put(pdev);
  444. }
  445. void __init txx9_sio_init(unsigned long baseaddr, int irq,
  446. unsigned int line, unsigned int sclk, int nocts)
  447. {
  448. #ifdef CONFIG_SERIAL_TXX9
  449. struct uart_port req;
  450. memset(&req, 0, sizeof(req));
  451. req.line = line;
  452. req.iotype = UPIO_MEM;
  453. req.membase = ioremap(baseaddr, 0x24);
  454. req.mapbase = baseaddr;
  455. req.irq = irq;
  456. if (!nocts)
  457. req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
  458. if (sclk) {
  459. req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/;
  460. req.uartclk = sclk;
  461. } else
  462. req.uartclk = TXX9_IMCLK;
  463. early_serial_txx9_setup(&req);
  464. #endif /* CONFIG_SERIAL_TXX9 */
  465. }
  466. #ifdef CONFIG_EARLY_PRINTK
  467. static void __init null_prom_putchar(char c)
  468. {
  469. }
  470. void (*txx9_prom_putchar)(char c) __initdata = null_prom_putchar;
  471. void __init prom_putchar(char c)
  472. {
  473. txx9_prom_putchar(c);
  474. }
  475. static void __iomem *early_txx9_sio_port;
  476. static void __init early_txx9_sio_putchar(char c)
  477. {
  478. #define TXX9_SICISR 0x0c
  479. #define TXX9_SITFIFO 0x1c
  480. #define TXX9_SICISR_TXALS 0x00000002
  481. while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) &
  482. TXX9_SICISR_TXALS))
  483. ;
  484. __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO);
  485. }
  486. void __init txx9_sio_putchar_init(unsigned long baseaddr)
  487. {
  488. early_txx9_sio_port = ioremap(baseaddr, 0x24);
  489. txx9_prom_putchar = early_txx9_sio_putchar;
  490. }
  491. #endif /* CONFIG_EARLY_PRINTK */
  492. /* wrappers */
  493. void __init plat_mem_setup(void)
  494. {
  495. ioport_resource.start = 0;
  496. ioport_resource.end = ~0UL; /* no limit */
  497. iomem_resource.start = 0;
  498. iomem_resource.end = ~0UL; /* no limit */
  499. /* fallback restart/halt routines */
  500. _machine_restart = (void (*)(char *))txx9_machine_halt;
  501. _machine_halt = txx9_machine_halt;
  502. pm_power_off = txx9_machine_halt;
  503. #ifdef CONFIG_PCI
  504. pcibios_plat_setup = txx9_pcibios_setup;
  505. #endif
  506. txx9_board_vec->mem_setup();
  507. }
  508. void __init arch_init_irq(void)
  509. {
  510. txx9_board_vec->irq_setup();
  511. }
  512. void __init plat_time_init(void)
  513. {
  514. #ifdef CONFIG_CPU_TX49XX
  515. mips_hpt_frequency = txx9_cpu_clock / 2;
  516. #endif
  517. txx9_board_vec->time_init();
  518. }
  519. static int __init _txx9_arch_init(void)
  520. {
  521. if (txx9_board_vec->arch_init)
  522. txx9_board_vec->arch_init();
  523. return 0;
  524. }
  525. arch_initcall(_txx9_arch_init);
  526. static int __init _txx9_device_init(void)
  527. {
  528. if (txx9_board_vec->device_init)
  529. txx9_board_vec->device_init();
  530. return 0;
  531. }
  532. device_initcall(_txx9_device_init);
  533. int (*txx9_irq_dispatch)(int pending);
  534. asmlinkage void plat_irq_dispatch(void)
  535. {
  536. int pending = read_c0_status() & read_c0_cause() & ST0_IM;
  537. int irq = txx9_irq_dispatch(pending);
  538. if (likely(irq >= 0))
  539. do_IRQ(irq);
  540. else
  541. spurious_interrupt();
  542. }
  543. /* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */
  544. #ifdef NEEDS_TXX9_SWIZZLE_ADDR_B
  545. static unsigned long __swizzle_addr_none(unsigned long port)
  546. {
  547. return port;
  548. }
  549. unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none;
  550. EXPORT_SYMBOL(__swizzle_addr_b);
  551. #endif
  552. void __init txx9_physmap_flash_init(int no, unsigned long addr,
  553. unsigned long size,
  554. const struct physmap_flash_data *pdata)
  555. {
  556. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  557. struct resource res = {
  558. .start = addr,
  559. .end = addr + size - 1,
  560. .flags = IORESOURCE_MEM,
  561. };
  562. struct platform_device *pdev;
  563. #ifdef CONFIG_MTD_PARTITIONS
  564. static struct mtd_partition parts[2];
  565. struct physmap_flash_data pdata_part;
  566. /* If this area contained boot area, make separate partition */
  567. if (pdata->nr_parts == 0 && !pdata->parts &&
  568. addr < 0x1fc00000 && addr + size > 0x1fc00000 &&
  569. !parts[0].name) {
  570. parts[0].name = "boot";
  571. parts[0].offset = 0x1fc00000 - addr;
  572. parts[0].size = addr + size - 0x1fc00000;
  573. parts[1].name = "user";
  574. parts[1].offset = 0;
  575. parts[1].size = 0x1fc00000 - addr;
  576. pdata_part = *pdata;
  577. pdata_part.nr_parts = ARRAY_SIZE(parts);
  578. pdata_part.parts = parts;
  579. pdata = &pdata_part;
  580. }
  581. #endif
  582. pdev = platform_device_alloc("physmap-flash", no);
  583. if (!pdev ||
  584. platform_device_add_resources(pdev, &res, 1) ||
  585. platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
  586. platform_device_add(pdev))
  587. platform_device_put(pdev);
  588. #endif
  589. }
  590. #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
  591. static DEFINE_SPINLOCK(txx9_iocled_lock);
  592. #define TXX9_IOCLED_MAXLEDS 8
  593. struct txx9_iocled_data {
  594. struct gpio_chip chip;
  595. u8 cur_val;
  596. void __iomem *mmioaddr;
  597. struct gpio_led_platform_data pdata;
  598. struct gpio_led leds[TXX9_IOCLED_MAXLEDS];
  599. char names[TXX9_IOCLED_MAXLEDS][32];
  600. };
  601. static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset)
  602. {
  603. struct txx9_iocled_data *data =
  604. container_of(chip, struct txx9_iocled_data, chip);
  605. return data->cur_val & (1 << offset);
  606. }
  607. static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset,
  608. int value)
  609. {
  610. struct txx9_iocled_data *data =
  611. container_of(chip, struct txx9_iocled_data, chip);
  612. unsigned long flags;
  613. spin_lock_irqsave(&txx9_iocled_lock, flags);
  614. if (value)
  615. data->cur_val |= 1 << offset;
  616. else
  617. data->cur_val &= ~(1 << offset);
  618. writeb(data->cur_val, data->mmioaddr);
  619. mmiowb();
  620. spin_unlock_irqrestore(&txx9_iocled_lock, flags);
  621. }
  622. static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset)
  623. {
  624. return 0;
  625. }
  626. static int txx9_iocled_dir_out(struct gpio_chip *chip, unsigned int offset,
  627. int value)
  628. {
  629. txx9_iocled_set(chip, offset, value);
  630. return 0;
  631. }
  632. void __init txx9_iocled_init(unsigned long baseaddr,
  633. int basenum, unsigned int num, int lowactive,
  634. const char *color, char **deftriggers)
  635. {
  636. struct txx9_iocled_data *iocled;
  637. struct platform_device *pdev;
  638. int i;
  639. static char *default_triggers[] __initdata = {
  640. "heartbeat",
  641. "ide-disk",
  642. "nand-disk",
  643. NULL,
  644. };
  645. if (!deftriggers)
  646. deftriggers = default_triggers;
  647. iocled = kzalloc(sizeof(*iocled), GFP_KERNEL);
  648. if (!iocled)
  649. return;
  650. iocled->mmioaddr = ioremap(baseaddr, 1);
  651. if (!iocled->mmioaddr)
  652. return;
  653. iocled->chip.get = txx9_iocled_get;
  654. iocled->chip.set = txx9_iocled_set;
  655. iocled->chip.direction_input = txx9_iocled_dir_in;
  656. iocled->chip.direction_output = txx9_iocled_dir_out;
  657. iocled->chip.label = "iocled";
  658. iocled->chip.base = basenum;
  659. iocled->chip.ngpio = num;
  660. if (gpiochip_add(&iocled->chip))
  661. return;
  662. if (basenum < 0)
  663. basenum = iocled->chip.base;
  664. pdev = platform_device_alloc("leds-gpio", basenum);
  665. if (!pdev)
  666. return;
  667. iocled->pdata.num_leds = num;
  668. iocled->pdata.leds = iocled->leds;
  669. for (i = 0; i < num; i++) {
  670. struct gpio_led *led = &iocled->leds[i];
  671. snprintf(iocled->names[i], sizeof(iocled->names[i]),
  672. "iocled:%s:%u", color, i);
  673. led->name = iocled->names[i];
  674. led->gpio = basenum + i;
  675. led->active_low = lowactive;
  676. if (deftriggers && *deftriggers)
  677. led->default_trigger = *deftriggers++;
  678. }
  679. pdev->dev.platform_data = &iocled->pdata;
  680. if (platform_device_add(pdev))
  681. platform_device_put(pdev);
  682. }
  683. #else /* CONFIG_LEDS_GPIO */
  684. void __init txx9_iocled_init(unsigned long baseaddr,
  685. int basenum, unsigned int num, int lowactive,
  686. const char *color, char **deftriggers)
  687. {
  688. }
  689. #endif /* CONFIG_LEDS_GPIO */