Kconfig 4.1 KB

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  1. config SIBYTE_SB1250
  2. bool
  3. select CEVT_SB1250
  4. select CSRC_SB1250
  5. select HW_HAS_PCI
  6. select IRQ_CPU
  7. select SIBYTE_ENABLE_LDT_IF_PCI
  8. select SIBYTE_HAS_ZBUS_PROFILING
  9. select SIBYTE_SB1xxx_SOC
  10. select SYS_SUPPORTS_SMP
  11. config SIBYTE_BCM1120
  12. bool
  13. select CEVT_SB1250
  14. select CSRC_SB1250
  15. select IRQ_CPU
  16. select SIBYTE_BCM112X
  17. select SIBYTE_HAS_ZBUS_PROFILING
  18. select SIBYTE_SB1xxx_SOC
  19. config SIBYTE_BCM1125
  20. bool
  21. select CEVT_SB1250
  22. select CSRC_SB1250
  23. select HW_HAS_PCI
  24. select IRQ_CPU
  25. select SIBYTE_BCM112X
  26. select SIBYTE_HAS_ZBUS_PROFILING
  27. select SIBYTE_SB1xxx_SOC
  28. config SIBYTE_BCM1125H
  29. bool
  30. select CEVT_SB1250
  31. select CSRC_SB1250
  32. select HW_HAS_PCI
  33. select IRQ_CPU
  34. select SIBYTE_BCM112X
  35. select SIBYTE_ENABLE_LDT_IF_PCI
  36. select SIBYTE_HAS_ZBUS_PROFILING
  37. select SIBYTE_SB1xxx_SOC
  38. config SIBYTE_BCM112X
  39. bool
  40. select CEVT_SB1250
  41. select CSRC_SB1250
  42. select IRQ_CPU
  43. select SIBYTE_SB1xxx_SOC
  44. select SIBYTE_HAS_ZBUS_PROFILING
  45. config SIBYTE_BCM1x80
  46. bool
  47. select CEVT_BCM1480
  48. select CSRC_BCM1480
  49. select HW_HAS_PCI
  50. select IRQ_CPU
  51. select SIBYTE_HAS_ZBUS_PROFILING
  52. select SIBYTE_SB1xxx_SOC
  53. select SYS_SUPPORTS_SMP
  54. config SIBYTE_BCM1x55
  55. bool
  56. select CEVT_BCM1480
  57. select CSRC_BCM1480
  58. select HW_HAS_PCI
  59. select IRQ_CPU
  60. select SIBYTE_SB1xxx_SOC
  61. select SIBYTE_HAS_ZBUS_PROFILING
  62. select SYS_SUPPORTS_SMP
  63. config SIBYTE_SB1xxx_SOC
  64. bool
  65. select DMA_COHERENT
  66. select IRQ_CPU
  67. select SIBYTE_CFE
  68. select SWAP_IO_SPACE
  69. select SYS_SUPPORTS_32BIT_KERNEL
  70. select SYS_SUPPORTS_64BIT_KERNEL
  71. choice
  72. prompt "SiByte SOC Stepping"
  73. depends on SIBYTE_SB1xxx_SOC
  74. config CPU_SB1_PASS_1
  75. bool "1250 Pass1"
  76. depends on SIBYTE_SB1250
  77. select CPU_HAS_PREFETCH
  78. config CPU_SB1_PASS_2_1250
  79. bool "1250 An"
  80. depends on SIBYTE_SB1250
  81. select CPU_SB1_PASS_2
  82. help
  83. Also called BCM1250 Pass 2
  84. config CPU_SB1_PASS_2_2
  85. bool "1250 Bn"
  86. depends on SIBYTE_SB1250
  87. select CPU_HAS_PREFETCH
  88. help
  89. Also called BCM1250 Pass 2.2
  90. config CPU_SB1_PASS_4
  91. bool "1250 Cn"
  92. depends on SIBYTE_SB1250
  93. select CPU_HAS_PREFETCH
  94. help
  95. Also called BCM1250 Pass 3
  96. config CPU_SB1_PASS_2_112x
  97. bool "112x Hybrid"
  98. depends on SIBYTE_BCM112X
  99. select CPU_SB1_PASS_2
  100. config CPU_SB1_PASS_3
  101. bool "112x An"
  102. depends on SIBYTE_BCM112X
  103. select CPU_HAS_PREFETCH
  104. endchoice
  105. config CPU_SB1_PASS_2
  106. bool
  107. config SIBYTE_HAS_LDT
  108. bool
  109. config SIBYTE_ENABLE_LDT_IF_PCI
  110. bool
  111. select SIBYTE_HAS_LDT if PCI
  112. config SIMULATION
  113. bool "Running under simulation"
  114. depends on SIBYTE_SB1xxx_SOC
  115. help
  116. Build a kernel suitable for running under the GDB simulator.
  117. Primarily adjusts the kernel's notion of time.
  118. config SB1_CEX_ALWAYS_FATAL
  119. bool "All cache exceptions considered fatal (no recovery attempted)"
  120. depends on SIBYTE_SB1xxx_SOC
  121. config SB1_CERR_STALL
  122. bool "Stall (rather than panic) on fatal cache error"
  123. depends on SIBYTE_SB1xxx_SOC
  124. config SIBYTE_CFE
  125. bool "Booting from CFE"
  126. depends on SIBYTE_SB1xxx_SOC
  127. select CFE
  128. select SYS_HAS_EARLY_PRINTK
  129. help
  130. Make use of the CFE API for enumerating available memory,
  131. controlling secondary CPUs, and possibly console output.
  132. config SIBYTE_CFE_CONSOLE
  133. bool "Use firmware console"
  134. depends on SIBYTE_CFE
  135. help
  136. Use the CFE API's console write routines during boot. Other console
  137. options (VT console, sb1250 duart console, etc.) should not be
  138. configured.
  139. config SIBYTE_STANDALONE
  140. bool
  141. depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE
  142. select SYS_HAS_EARLY_PRINTK
  143. default y
  144. config SIBYTE_STANDALONE_RAM_SIZE
  145. int "Memory size (in megabytes)"
  146. depends on SIBYTE_STANDALONE
  147. default "32"
  148. config SIBYTE_BUS_WATCHER
  149. bool "Support for Bus Watcher statistics"
  150. depends on SIBYTE_SB1xxx_SOC
  151. help
  152. Handle and keep statistics on the bus error interrupts (COR_ECC,
  153. BAD_ECC, IO_BUS).
  154. config SIBYTE_BW_TRACE
  155. bool "Capture bus trace before bus error"
  156. depends on SIBYTE_BUS_WATCHER
  157. help
  158. Run a continuous bus trace, dumping the raw data as soon as
  159. a ZBbus error is detected. Cannot work if ZBbus profiling
  160. is turned on, and also will interfere with JTAG-based trace
  161. buffer activity. Raw buffer data is dumped to console, and
  162. must be processed off-line.
  163. config SIBYTE_TBPROF
  164. tristate "Support for ZBbus profiling"
  165. depends on SIBYTE_HAS_ZBUS_PROFILING
  166. config SIBYTE_HAS_ZBUS_PROFILING
  167. bool