msp_time.c 2.4 KB

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  1. /*
  2. * Setting up the clock on MSP SOCs. No RTC typically.
  3. *
  4. * Carsten Langgaard, carstenl@mips.com
  5. * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
  6. *
  7. * ########################################################################
  8. *
  9. * This program is free software; you can distribute it and/or modify it
  10. * under the terms of the GNU General Public License (Version 2) as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope it will be useful, but WITHOUT
  14. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  15. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  16. * for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License along
  19. * with this program; if not, write to the Free Software Foundation, Inc.,
  20. * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  21. *
  22. * ########################################################################
  23. */
  24. #include <linux/init.h>
  25. #include <linux/kernel_stat.h>
  26. #include <linux/sched.h>
  27. #include <linux/spinlock.h>
  28. #include <linux/module.h>
  29. #include <linux/ptrace.h>
  30. #include <asm/mipsregs.h>
  31. #include <asm/time.h>
  32. #include <msp_prom.h>
  33. #include <msp_int.h>
  34. #include <msp_regs.h>
  35. void __init plat_time_init(void)
  36. {
  37. char *endp, *s;
  38. unsigned long cpu_rate = 0;
  39. if (cpu_rate == 0) {
  40. s = prom_getenv("clkfreqhz");
  41. cpu_rate = simple_strtoul(s, &endp, 10);
  42. if (endp != NULL && *endp != 0) {
  43. printk(KERN_ERR
  44. "Clock rate in Hz parse error: %s\n", s);
  45. cpu_rate = 0;
  46. }
  47. }
  48. if (cpu_rate == 0) {
  49. s = prom_getenv("clkfreq");
  50. cpu_rate = 1000 * simple_strtoul(s, &endp, 10);
  51. if (endp != NULL && *endp != 0) {
  52. printk(KERN_ERR
  53. "Clock rate in MHz parse error: %s\n", s);
  54. cpu_rate = 0;
  55. }
  56. }
  57. if (cpu_rate == 0) {
  58. #if defined(CONFIG_PMC_MSP7120_EVAL) \
  59. || defined(CONFIG_PMC_MSP7120_GW)
  60. cpu_rate = 400000000;
  61. #elif defined(CONFIG_PMC_MSP7120_FPGA)
  62. cpu_rate = 25000000;
  63. #else
  64. cpu_rate = 150000000;
  65. #endif
  66. printk(KERN_ERR
  67. "Failed to determine CPU clock rate, "
  68. "assuming %ld hz ...\n", cpu_rate);
  69. }
  70. printk(KERN_WARNING "Clock rate set to %ld\n", cpu_rate);
  71. /* timer frequency is 1/2 clock rate */
  72. mips_hpt_frequency = cpu_rate/2;
  73. }
  74. void __init plat_timer_setup(struct irqaction *irq)
  75. {
  76. #ifdef CONFIG_IRQ_MSP_CIC
  77. /* we are using the vpe0 counter for timer interrupts */
  78. setup_irq(MSP_INT_VPE0_TIMER, irq);
  79. #endif
  80. }