dma-default.c 8.6 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com>
  7. * Copyright (C) 2000, 2001, 06 Ralf Baechle <ralf@linux-mips.org>
  8. * swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
  9. */
  10. #include <linux/types.h>
  11. #include <linux/dma-mapping.h>
  12. #include <linux/mm.h>
  13. #include <linux/module.h>
  14. #include <linux/scatterlist.h>
  15. #include <linux/string.h>
  16. #include <asm/cache.h>
  17. #include <asm/io.h>
  18. #include <dma-coherence.h>
  19. static inline unsigned long dma_addr_to_virt(dma_addr_t dma_addr)
  20. {
  21. unsigned long addr = plat_dma_addr_to_phys(dma_addr);
  22. return (unsigned long)phys_to_virt(addr);
  23. }
  24. /*
  25. * Warning on the terminology - Linux calls an uncached area coherent;
  26. * MIPS terminology calls memory areas with hardware maintained coherency
  27. * coherent.
  28. */
  29. static inline int cpu_is_noncoherent_r10000(struct device *dev)
  30. {
  31. return !plat_device_is_coherent(dev) &&
  32. (current_cpu_type() == CPU_R10000 ||
  33. current_cpu_type() == CPU_R12000);
  34. }
  35. static gfp_t massage_gfp_flags(const struct device *dev, gfp_t gfp)
  36. {
  37. /* ignore region specifiers */
  38. gfp &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM);
  39. #ifdef CONFIG_ZONE_DMA
  40. if (dev == NULL)
  41. gfp |= __GFP_DMA;
  42. else if (dev->coherent_dma_mask < DMA_BIT_MASK(24))
  43. gfp |= __GFP_DMA;
  44. else
  45. #endif
  46. #ifdef CONFIG_ZONE_DMA32
  47. if (dev->coherent_dma_mask < DMA_BIT_MASK(32))
  48. gfp |= __GFP_DMA32;
  49. else
  50. #endif
  51. ;
  52. /* Don't invoke OOM killer */
  53. gfp |= __GFP_NORETRY;
  54. return gfp;
  55. }
  56. void *dma_alloc_noncoherent(struct device *dev, size_t size,
  57. dma_addr_t * dma_handle, gfp_t gfp)
  58. {
  59. void *ret;
  60. gfp = massage_gfp_flags(dev, gfp);
  61. ret = (void *) __get_free_pages(gfp, get_order(size));
  62. if (ret != NULL) {
  63. memset(ret, 0, size);
  64. *dma_handle = plat_map_dma_mem(dev, ret, size);
  65. }
  66. return ret;
  67. }
  68. EXPORT_SYMBOL(dma_alloc_noncoherent);
  69. void *dma_alloc_coherent(struct device *dev, size_t size,
  70. dma_addr_t * dma_handle, gfp_t gfp)
  71. {
  72. void *ret;
  73. gfp = massage_gfp_flags(dev, gfp);
  74. ret = (void *) __get_free_pages(gfp, get_order(size));
  75. if (ret) {
  76. memset(ret, 0, size);
  77. *dma_handle = plat_map_dma_mem(dev, ret, size);
  78. if (!plat_device_is_coherent(dev)) {
  79. dma_cache_wback_inv((unsigned long) ret, size);
  80. ret = UNCAC_ADDR(ret);
  81. }
  82. }
  83. return ret;
  84. }
  85. EXPORT_SYMBOL(dma_alloc_coherent);
  86. void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
  87. dma_addr_t dma_handle)
  88. {
  89. free_pages((unsigned long) vaddr, get_order(size));
  90. }
  91. EXPORT_SYMBOL(dma_free_noncoherent);
  92. void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
  93. dma_addr_t dma_handle)
  94. {
  95. unsigned long addr = (unsigned long) vaddr;
  96. if (!plat_device_is_coherent(dev))
  97. addr = CAC_ADDR(addr);
  98. free_pages(addr, get_order(size));
  99. }
  100. EXPORT_SYMBOL(dma_free_coherent);
  101. static inline void __dma_sync(unsigned long addr, size_t size,
  102. enum dma_data_direction direction)
  103. {
  104. switch (direction) {
  105. case DMA_TO_DEVICE:
  106. dma_cache_wback(addr, size);
  107. break;
  108. case DMA_FROM_DEVICE:
  109. dma_cache_inv(addr, size);
  110. break;
  111. case DMA_BIDIRECTIONAL:
  112. dma_cache_wback_inv(addr, size);
  113. break;
  114. default:
  115. BUG();
  116. }
  117. }
  118. dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
  119. enum dma_data_direction direction)
  120. {
  121. unsigned long addr = (unsigned long) ptr;
  122. if (!plat_device_is_coherent(dev))
  123. __dma_sync(addr, size, direction);
  124. return plat_map_dma_mem(dev, ptr, size);
  125. }
  126. EXPORT_SYMBOL(dma_map_single);
  127. void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
  128. enum dma_data_direction direction)
  129. {
  130. if (cpu_is_noncoherent_r10000(dev))
  131. __dma_sync(dma_addr_to_virt(dma_addr), size,
  132. direction);
  133. plat_unmap_dma_mem(dma_addr);
  134. }
  135. EXPORT_SYMBOL(dma_unmap_single);
  136. int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
  137. enum dma_data_direction direction)
  138. {
  139. int i;
  140. BUG_ON(direction == DMA_NONE);
  141. for (i = 0; i < nents; i++, sg++) {
  142. unsigned long addr;
  143. addr = (unsigned long) sg_virt(sg);
  144. if (!plat_device_is_coherent(dev) && addr)
  145. __dma_sync(addr, sg->length, direction);
  146. sg->dma_address = plat_map_dma_mem(dev,
  147. (void *)addr, sg->length);
  148. }
  149. return nents;
  150. }
  151. EXPORT_SYMBOL(dma_map_sg);
  152. dma_addr_t dma_map_page(struct device *dev, struct page *page,
  153. unsigned long offset, size_t size, enum dma_data_direction direction)
  154. {
  155. BUG_ON(direction == DMA_NONE);
  156. if (!plat_device_is_coherent(dev)) {
  157. unsigned long addr;
  158. addr = (unsigned long) page_address(page) + offset;
  159. dma_cache_wback_inv(addr, size);
  160. }
  161. return plat_map_dma_mem_page(dev, page) + offset;
  162. }
  163. EXPORT_SYMBOL(dma_map_page);
  164. void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
  165. enum dma_data_direction direction)
  166. {
  167. BUG_ON(direction == DMA_NONE);
  168. if (!plat_device_is_coherent(dev) && direction != DMA_TO_DEVICE) {
  169. unsigned long addr;
  170. addr = plat_dma_addr_to_phys(dma_address);
  171. dma_cache_wback_inv(addr, size);
  172. }
  173. plat_unmap_dma_mem(dma_address);
  174. }
  175. EXPORT_SYMBOL(dma_unmap_page);
  176. void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
  177. enum dma_data_direction direction)
  178. {
  179. unsigned long addr;
  180. int i;
  181. BUG_ON(direction == DMA_NONE);
  182. for (i = 0; i < nhwentries; i++, sg++) {
  183. if (!plat_device_is_coherent(dev) &&
  184. direction != DMA_TO_DEVICE) {
  185. addr = (unsigned long) sg_virt(sg);
  186. if (addr)
  187. __dma_sync(addr, sg->length, direction);
  188. }
  189. plat_unmap_dma_mem(sg->dma_address);
  190. }
  191. }
  192. EXPORT_SYMBOL(dma_unmap_sg);
  193. void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
  194. size_t size, enum dma_data_direction direction)
  195. {
  196. BUG_ON(direction == DMA_NONE);
  197. if (cpu_is_noncoherent_r10000(dev)) {
  198. unsigned long addr;
  199. addr = dma_addr_to_virt(dma_handle);
  200. __dma_sync(addr, size, direction);
  201. }
  202. }
  203. EXPORT_SYMBOL(dma_sync_single_for_cpu);
  204. void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
  205. size_t size, enum dma_data_direction direction)
  206. {
  207. BUG_ON(direction == DMA_NONE);
  208. if (!plat_device_is_coherent(dev)) {
  209. unsigned long addr;
  210. addr = dma_addr_to_virt(dma_handle);
  211. __dma_sync(addr, size, direction);
  212. }
  213. }
  214. EXPORT_SYMBOL(dma_sync_single_for_device);
  215. void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
  216. unsigned long offset, size_t size, enum dma_data_direction direction)
  217. {
  218. BUG_ON(direction == DMA_NONE);
  219. if (cpu_is_noncoherent_r10000(dev)) {
  220. unsigned long addr;
  221. addr = dma_addr_to_virt(dma_handle);
  222. __dma_sync(addr + offset, size, direction);
  223. }
  224. }
  225. EXPORT_SYMBOL(dma_sync_single_range_for_cpu);
  226. void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
  227. unsigned long offset, size_t size, enum dma_data_direction direction)
  228. {
  229. BUG_ON(direction == DMA_NONE);
  230. if (!plat_device_is_coherent(dev)) {
  231. unsigned long addr;
  232. addr = dma_addr_to_virt(dma_handle);
  233. __dma_sync(addr + offset, size, direction);
  234. }
  235. }
  236. EXPORT_SYMBOL(dma_sync_single_range_for_device);
  237. void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
  238. enum dma_data_direction direction)
  239. {
  240. int i;
  241. BUG_ON(direction == DMA_NONE);
  242. /* Make sure that gcc doesn't leave the empty loop body. */
  243. for (i = 0; i < nelems; i++, sg++) {
  244. if (cpu_is_noncoherent_r10000(dev))
  245. __dma_sync((unsigned long)page_address(sg_page(sg)),
  246. sg->length, direction);
  247. plat_unmap_dma_mem(sg->dma_address);
  248. }
  249. }
  250. EXPORT_SYMBOL(dma_sync_sg_for_cpu);
  251. void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
  252. enum dma_data_direction direction)
  253. {
  254. int i;
  255. BUG_ON(direction == DMA_NONE);
  256. /* Make sure that gcc doesn't leave the empty loop body. */
  257. for (i = 0; i < nelems; i++, sg++) {
  258. if (!plat_device_is_coherent(dev))
  259. __dma_sync((unsigned long)page_address(sg_page(sg)),
  260. sg->length, direction);
  261. plat_unmap_dma_mem(sg->dma_address);
  262. }
  263. }
  264. EXPORT_SYMBOL(dma_sync_sg_for_device);
  265. int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
  266. {
  267. return 0;
  268. }
  269. EXPORT_SYMBOL(dma_mapping_error);
  270. int dma_supported(struct device *dev, u64 mask)
  271. {
  272. /*
  273. * we fall back to GFP_DMA when the mask isn't all 1s,
  274. * so we can't guarantee allocations that must be
  275. * within a tighter range than GFP_DMA..
  276. */
  277. if (mask < DMA_BIT_MASK(24))
  278. return 0;
  279. return 1;
  280. }
  281. EXPORT_SYMBOL(dma_supported);
  282. int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
  283. {
  284. return plat_device_is_coherent(dev);
  285. }
  286. EXPORT_SYMBOL(dma_is_consistent);
  287. void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
  288. enum dma_data_direction direction)
  289. {
  290. BUG_ON(direction == DMA_NONE);
  291. if (!plat_device_is_coherent(dev))
  292. __dma_sync((unsigned long)vaddr, size, direction);
  293. }
  294. EXPORT_SYMBOL(dma_cache_sync);