irqmap.c 4.5 KB

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  1. /*
  2. * BRIEF MODULE DESCRIPTION
  3. * Au1xxx irq map table
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License as published by the
  7. * Free Software Foundation; either version 2 of the License, or (at your
  8. * option) any later version.
  9. *
  10. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  11. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  12. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  13. * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  14. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  15. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  16. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  17. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  18. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  19. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  20. *
  21. * You should have received a copy of the GNU General Public License along
  22. * with this program; if not, write to the Free Software Foundation, Inc.,
  23. * 675 Mass Ave, Cambridge, MA 02139, USA.
  24. */
  25. #include <linux/init.h>
  26. #include <linux/interrupt.h>
  27. #include <asm/mach-au1x00/au1000.h>
  28. #ifdef CONFIG_MIPS_PB1200
  29. #include <asm/mach-pb1x00/pb1200.h>
  30. #endif
  31. #ifdef CONFIG_MIPS_DB1200
  32. #include <asm/mach-db1x00/db1200.h>
  33. #define PB1200_INT_BEGIN DB1200_INT_BEGIN
  34. #define PB1200_INT_END DB1200_INT_END
  35. #endif
  36. struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
  37. /* This is external interrupt cascade */
  38. { AU1000_GPIO_7, INTC_INT_LOW_LEVEL, 0 },
  39. };
  40. int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map);
  41. /*
  42. * Support for External interrupts on the Pb1200 Development platform.
  43. */
  44. static volatile int pb1200_cascade_en;
  45. irqreturn_t pb1200_cascade_handler(int irq, void *dev_id)
  46. {
  47. unsigned short bisr = bcsr->int_status;
  48. int extirq_nr = 0;
  49. /* Clear all the edge interrupts. This has no effect on level. */
  50. bcsr->int_status = bisr;
  51. for ( ; bisr; bisr &= bisr - 1) {
  52. extirq_nr = PB1200_INT_BEGIN + __ffs(bisr);
  53. /* Ack and dispatch IRQ */
  54. do_IRQ(extirq_nr);
  55. }
  56. return IRQ_RETVAL(1);
  57. }
  58. inline void pb1200_enable_irq(unsigned int irq_nr)
  59. {
  60. bcsr->intset_mask = 1 << (irq_nr - PB1200_INT_BEGIN);
  61. bcsr->intset = 1 << (irq_nr - PB1200_INT_BEGIN);
  62. }
  63. inline void pb1200_disable_irq(unsigned int irq_nr)
  64. {
  65. bcsr->intclr_mask = 1 << (irq_nr - PB1200_INT_BEGIN);
  66. bcsr->intclr = 1 << (irq_nr - PB1200_INT_BEGIN);
  67. }
  68. static unsigned int pb1200_setup_cascade(void)
  69. {
  70. return request_irq(AU1000_GPIO_7, &pb1200_cascade_handler,
  71. 0, "Pb1200 Cascade", &pb1200_cascade_handler);
  72. }
  73. static unsigned int pb1200_startup_irq(unsigned int irq)
  74. {
  75. if (++pb1200_cascade_en == 1) {
  76. int res;
  77. res = pb1200_setup_cascade();
  78. if (res)
  79. return res;
  80. }
  81. pb1200_enable_irq(irq);
  82. return 0;
  83. }
  84. static void pb1200_shutdown_irq(unsigned int irq)
  85. {
  86. pb1200_disable_irq(irq);
  87. if (--pb1200_cascade_en == 0)
  88. free_irq(AU1000_GPIO_7, &pb1200_cascade_handler);
  89. }
  90. static struct irq_chip external_irq_type = {
  91. #ifdef CONFIG_MIPS_PB1200
  92. .name = "Pb1200 Ext",
  93. #endif
  94. #ifdef CONFIG_MIPS_DB1200
  95. .name = "Db1200 Ext",
  96. #endif
  97. .startup = pb1200_startup_irq,
  98. .shutdown = pb1200_shutdown_irq,
  99. .ack = pb1200_disable_irq,
  100. .mask = pb1200_disable_irq,
  101. .mask_ack = pb1200_disable_irq,
  102. .unmask = pb1200_enable_irq,
  103. };
  104. void _board_init_irq(void)
  105. {
  106. unsigned int irq;
  107. #ifdef CONFIG_MIPS_PB1200
  108. /* We have a problem with CPLD rev 3. */
  109. if (((bcsr->whoami & BCSR_WHOAMI_CPLD) >> 4) <= 3) {
  110. printk(KERN_ERR "WARNING!!!\n");
  111. printk(KERN_ERR "WARNING!!!\n");
  112. printk(KERN_ERR "WARNING!!!\n");
  113. printk(KERN_ERR "WARNING!!!\n");
  114. printk(KERN_ERR "WARNING!!!\n");
  115. printk(KERN_ERR "WARNING!!!\n");
  116. printk(KERN_ERR "Pb1200 must be at CPLD rev 4. Please have Pb1200\n");
  117. printk(KERN_ERR "updated to latest revision. This software will\n");
  118. printk(KERN_ERR "not work on anything less than CPLD rev 4.\n");
  119. printk(KERN_ERR "WARNING!!!\n");
  120. printk(KERN_ERR "WARNING!!!\n");
  121. printk(KERN_ERR "WARNING!!!\n");
  122. printk(KERN_ERR "WARNING!!!\n");
  123. printk(KERN_ERR "WARNING!!!\n");
  124. printk(KERN_ERR "WARNING!!!\n");
  125. panic("Game over. Your score is 0.");
  126. }
  127. #endif
  128. for (irq = PB1200_INT_BEGIN; irq <= PB1200_INT_END; irq++) {
  129. set_irq_chip_and_handler(irq, &external_irq_type,
  130. handle_level_irq);
  131. pb1200_disable_irq(irq);
  132. }
  133. /*
  134. * GPIO_7 can not be hooked here, so it is hooked upon first
  135. * request of any source attached to the cascade.
  136. */
  137. }