paravirt.c 8.6 KB

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  1. /******************************************************************************
  2. * arch/ia64/kernel/paravirt.c
  3. *
  4. * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp>
  5. * VA Linux Systems Japan K.K.
  6. * Yaozu (Eddie) Dong <eddie.dong@intel.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. #include <linux/init.h>
  24. #include <linux/compiler.h>
  25. #include <linux/io.h>
  26. #include <linux/irq.h>
  27. #include <linux/module.h>
  28. #include <linux/types.h>
  29. #include <asm/iosapic.h>
  30. #include <asm/paravirt.h>
  31. /***************************************************************************
  32. * general info
  33. */
  34. struct pv_info pv_info = {
  35. .kernel_rpl = 0,
  36. .paravirt_enabled = 0,
  37. .name = "bare hardware"
  38. };
  39. /***************************************************************************
  40. * pv_init_ops
  41. * initialization hooks.
  42. */
  43. struct pv_init_ops pv_init_ops;
  44. /***************************************************************************
  45. * pv_cpu_ops
  46. * intrinsics hooks.
  47. */
  48. /* ia64_native_xxx are macros so that we have to make them real functions */
  49. #define DEFINE_VOID_FUNC1(name) \
  50. static void \
  51. ia64_native_ ## name ## _func(unsigned long arg) \
  52. { \
  53. ia64_native_ ## name(arg); \
  54. } \
  55. #define DEFINE_VOID_FUNC2(name) \
  56. static void \
  57. ia64_native_ ## name ## _func(unsigned long arg0, \
  58. unsigned long arg1) \
  59. { \
  60. ia64_native_ ## name(arg0, arg1); \
  61. } \
  62. #define DEFINE_FUNC0(name) \
  63. static unsigned long \
  64. ia64_native_ ## name ## _func(void) \
  65. { \
  66. return ia64_native_ ## name(); \
  67. }
  68. #define DEFINE_FUNC1(name, type) \
  69. static unsigned long \
  70. ia64_native_ ## name ## _func(type arg) \
  71. { \
  72. return ia64_native_ ## name(arg); \
  73. } \
  74. DEFINE_VOID_FUNC1(fc);
  75. DEFINE_VOID_FUNC1(intrin_local_irq_restore);
  76. DEFINE_VOID_FUNC2(ptcga);
  77. DEFINE_VOID_FUNC2(set_rr);
  78. DEFINE_FUNC0(get_psr_i);
  79. DEFINE_FUNC1(thash, unsigned long);
  80. DEFINE_FUNC1(get_cpuid, int);
  81. DEFINE_FUNC1(get_pmd, int);
  82. DEFINE_FUNC1(get_rr, unsigned long);
  83. static void
  84. ia64_native_ssm_i_func(void)
  85. {
  86. ia64_native_ssm(IA64_PSR_I);
  87. }
  88. static void
  89. ia64_native_rsm_i_func(void)
  90. {
  91. ia64_native_rsm(IA64_PSR_I);
  92. }
  93. static void
  94. ia64_native_set_rr0_to_rr4_func(unsigned long val0, unsigned long val1,
  95. unsigned long val2, unsigned long val3,
  96. unsigned long val4)
  97. {
  98. ia64_native_set_rr0_to_rr4(val0, val1, val2, val3, val4);
  99. }
  100. #define CASE_GET_REG(id) \
  101. case _IA64_REG_ ## id: \
  102. res = ia64_native_getreg(_IA64_REG_ ## id); \
  103. break;
  104. #define CASE_GET_AR(id) CASE_GET_REG(AR_ ## id)
  105. #define CASE_GET_CR(id) CASE_GET_REG(CR_ ## id)
  106. unsigned long
  107. ia64_native_getreg_func(int regnum)
  108. {
  109. unsigned long res = -1;
  110. switch (regnum) {
  111. CASE_GET_REG(GP);
  112. CASE_GET_REG(IP);
  113. CASE_GET_REG(PSR);
  114. CASE_GET_REG(TP);
  115. CASE_GET_REG(SP);
  116. CASE_GET_AR(KR0);
  117. CASE_GET_AR(KR1);
  118. CASE_GET_AR(KR2);
  119. CASE_GET_AR(KR3);
  120. CASE_GET_AR(KR4);
  121. CASE_GET_AR(KR5);
  122. CASE_GET_AR(KR6);
  123. CASE_GET_AR(KR7);
  124. CASE_GET_AR(RSC);
  125. CASE_GET_AR(BSP);
  126. CASE_GET_AR(BSPSTORE);
  127. CASE_GET_AR(RNAT);
  128. CASE_GET_AR(FCR);
  129. CASE_GET_AR(EFLAG);
  130. CASE_GET_AR(CSD);
  131. CASE_GET_AR(SSD);
  132. CASE_GET_AR(CFLAG);
  133. CASE_GET_AR(FSR);
  134. CASE_GET_AR(FIR);
  135. CASE_GET_AR(FDR);
  136. CASE_GET_AR(CCV);
  137. CASE_GET_AR(UNAT);
  138. CASE_GET_AR(FPSR);
  139. CASE_GET_AR(ITC);
  140. CASE_GET_AR(PFS);
  141. CASE_GET_AR(LC);
  142. CASE_GET_AR(EC);
  143. CASE_GET_CR(DCR);
  144. CASE_GET_CR(ITM);
  145. CASE_GET_CR(IVA);
  146. CASE_GET_CR(PTA);
  147. CASE_GET_CR(IPSR);
  148. CASE_GET_CR(ISR);
  149. CASE_GET_CR(IIP);
  150. CASE_GET_CR(IFA);
  151. CASE_GET_CR(ITIR);
  152. CASE_GET_CR(IIPA);
  153. CASE_GET_CR(IFS);
  154. CASE_GET_CR(IIM);
  155. CASE_GET_CR(IHA);
  156. CASE_GET_CR(LID);
  157. CASE_GET_CR(IVR);
  158. CASE_GET_CR(TPR);
  159. CASE_GET_CR(EOI);
  160. CASE_GET_CR(IRR0);
  161. CASE_GET_CR(IRR1);
  162. CASE_GET_CR(IRR2);
  163. CASE_GET_CR(IRR3);
  164. CASE_GET_CR(ITV);
  165. CASE_GET_CR(PMV);
  166. CASE_GET_CR(CMCV);
  167. CASE_GET_CR(LRR0);
  168. CASE_GET_CR(LRR1);
  169. default:
  170. printk(KERN_CRIT "wrong_getreg %d\n", regnum);
  171. break;
  172. }
  173. return res;
  174. }
  175. #define CASE_SET_REG(id) \
  176. case _IA64_REG_ ## id: \
  177. ia64_native_setreg(_IA64_REG_ ## id, val); \
  178. break;
  179. #define CASE_SET_AR(id) CASE_SET_REG(AR_ ## id)
  180. #define CASE_SET_CR(id) CASE_SET_REG(CR_ ## id)
  181. void
  182. ia64_native_setreg_func(int regnum, unsigned long val)
  183. {
  184. switch (regnum) {
  185. case _IA64_REG_PSR_L:
  186. ia64_native_setreg(_IA64_REG_PSR_L, val);
  187. ia64_dv_serialize_data();
  188. break;
  189. CASE_SET_REG(SP);
  190. CASE_SET_REG(GP);
  191. CASE_SET_AR(KR0);
  192. CASE_SET_AR(KR1);
  193. CASE_SET_AR(KR2);
  194. CASE_SET_AR(KR3);
  195. CASE_SET_AR(KR4);
  196. CASE_SET_AR(KR5);
  197. CASE_SET_AR(KR6);
  198. CASE_SET_AR(KR7);
  199. CASE_SET_AR(RSC);
  200. CASE_SET_AR(BSP);
  201. CASE_SET_AR(BSPSTORE);
  202. CASE_SET_AR(RNAT);
  203. CASE_SET_AR(FCR);
  204. CASE_SET_AR(EFLAG);
  205. CASE_SET_AR(CSD);
  206. CASE_SET_AR(SSD);
  207. CASE_SET_AR(CFLAG);
  208. CASE_SET_AR(FSR);
  209. CASE_SET_AR(FIR);
  210. CASE_SET_AR(FDR);
  211. CASE_SET_AR(CCV);
  212. CASE_SET_AR(UNAT);
  213. CASE_SET_AR(FPSR);
  214. CASE_SET_AR(ITC);
  215. CASE_SET_AR(PFS);
  216. CASE_SET_AR(LC);
  217. CASE_SET_AR(EC);
  218. CASE_SET_CR(DCR);
  219. CASE_SET_CR(ITM);
  220. CASE_SET_CR(IVA);
  221. CASE_SET_CR(PTA);
  222. CASE_SET_CR(IPSR);
  223. CASE_SET_CR(ISR);
  224. CASE_SET_CR(IIP);
  225. CASE_SET_CR(IFA);
  226. CASE_SET_CR(ITIR);
  227. CASE_SET_CR(IIPA);
  228. CASE_SET_CR(IFS);
  229. CASE_SET_CR(IIM);
  230. CASE_SET_CR(IHA);
  231. CASE_SET_CR(LID);
  232. CASE_SET_CR(IVR);
  233. CASE_SET_CR(TPR);
  234. CASE_SET_CR(EOI);
  235. CASE_SET_CR(IRR0);
  236. CASE_SET_CR(IRR1);
  237. CASE_SET_CR(IRR2);
  238. CASE_SET_CR(IRR3);
  239. CASE_SET_CR(ITV);
  240. CASE_SET_CR(PMV);
  241. CASE_SET_CR(CMCV);
  242. CASE_SET_CR(LRR0);
  243. CASE_SET_CR(LRR1);
  244. default:
  245. printk(KERN_CRIT "wrong setreg %d\n", regnum);
  246. break;
  247. }
  248. }
  249. struct pv_cpu_ops pv_cpu_ops = {
  250. .fc = ia64_native_fc_func,
  251. .thash = ia64_native_thash_func,
  252. .get_cpuid = ia64_native_get_cpuid_func,
  253. .get_pmd = ia64_native_get_pmd_func,
  254. .ptcga = ia64_native_ptcga_func,
  255. .get_rr = ia64_native_get_rr_func,
  256. .set_rr = ia64_native_set_rr_func,
  257. .set_rr0_to_rr4 = ia64_native_set_rr0_to_rr4_func,
  258. .ssm_i = ia64_native_ssm_i_func,
  259. .getreg = ia64_native_getreg_func,
  260. .setreg = ia64_native_setreg_func,
  261. .rsm_i = ia64_native_rsm_i_func,
  262. .get_psr_i = ia64_native_get_psr_i_func,
  263. .intrin_local_irq_restore
  264. = ia64_native_intrin_local_irq_restore_func,
  265. };
  266. EXPORT_SYMBOL(pv_cpu_ops);
  267. /******************************************************************************
  268. * replacement of hand written assembly codes.
  269. */
  270. void
  271. paravirt_cpu_asm_init(const struct pv_cpu_asm_switch *cpu_asm_switch)
  272. {
  273. extern unsigned long paravirt_switch_to_targ;
  274. extern unsigned long paravirt_leave_syscall_targ;
  275. extern unsigned long paravirt_work_processed_syscall_targ;
  276. extern unsigned long paravirt_leave_kernel_targ;
  277. paravirt_switch_to_targ = cpu_asm_switch->switch_to;
  278. paravirt_leave_syscall_targ = cpu_asm_switch->leave_syscall;
  279. paravirt_work_processed_syscall_targ =
  280. cpu_asm_switch->work_processed_syscall;
  281. paravirt_leave_kernel_targ = cpu_asm_switch->leave_kernel;
  282. }
  283. /***************************************************************************
  284. * pv_iosapic_ops
  285. * iosapic read/write hooks.
  286. */
  287. static unsigned int
  288. ia64_native_iosapic_read(char __iomem *iosapic, unsigned int reg)
  289. {
  290. return __ia64_native_iosapic_read(iosapic, reg);
  291. }
  292. static void
  293. ia64_native_iosapic_write(char __iomem *iosapic, unsigned int reg, u32 val)
  294. {
  295. __ia64_native_iosapic_write(iosapic, reg, val);
  296. }
  297. struct pv_iosapic_ops pv_iosapic_ops = {
  298. .pcat_compat_init = ia64_native_iosapic_pcat_compat_init,
  299. .get_irq_chip = ia64_native_iosapic_get_irq_chip,
  300. .__read = ia64_native_iosapic_read,
  301. .__write = ia64_native_iosapic_write,
  302. };
  303. /***************************************************************************
  304. * pv_irq_ops
  305. * irq operations
  306. */
  307. struct pv_irq_ops pv_irq_ops = {
  308. .register_ipi = ia64_native_register_ipi,
  309. .assign_irq_vector = ia64_native_assign_irq_vector,
  310. .free_irq_vector = ia64_native_free_irq_vector,
  311. .register_percpu_irq = ia64_native_register_percpu_irq,
  312. .resend_irq = ia64_native_resend_irq,
  313. };
  314. /***************************************************************************
  315. * pv_time_ops
  316. * time operations
  317. */
  318. static int
  319. ia64_native_do_steal_accounting(unsigned long *new_itm)
  320. {
  321. return 0;
  322. }
  323. struct pv_time_ops pv_time_ops = {
  324. .do_steal_accounting = ia64_native_do_steal_accounting,
  325. };