intrinsics.h 7.4 KB

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  1. #ifndef _ASM_IA64_INTRINSICS_H
  2. #define _ASM_IA64_INTRINSICS_H
  3. /*
  4. * Compiler-dependent intrinsics.
  5. *
  6. * Copyright (C) 2002-2003 Hewlett-Packard Co
  7. * David Mosberger-Tang <davidm@hpl.hp.com>
  8. */
  9. #ifndef __ASSEMBLY__
  10. /* include compiler specific intrinsics */
  11. #include <asm/ia64regs.h>
  12. #ifdef __INTEL_COMPILER
  13. # include <asm/intel_intrin.h>
  14. #else
  15. # include <asm/gcc_intrin.h>
  16. #endif
  17. #define ia64_native_get_psr_i() (ia64_native_getreg(_IA64_REG_PSR) & IA64_PSR_I)
  18. #define ia64_native_set_rr0_to_rr4(val0, val1, val2, val3, val4) \
  19. do { \
  20. ia64_native_set_rr(0x0000000000000000UL, (val0)); \
  21. ia64_native_set_rr(0x2000000000000000UL, (val1)); \
  22. ia64_native_set_rr(0x4000000000000000UL, (val2)); \
  23. ia64_native_set_rr(0x6000000000000000UL, (val3)); \
  24. ia64_native_set_rr(0x8000000000000000UL, (val4)); \
  25. } while (0)
  26. /*
  27. * Force an unresolved reference if someone tries to use
  28. * ia64_fetch_and_add() with a bad value.
  29. */
  30. extern unsigned long __bad_size_for_ia64_fetch_and_add (void);
  31. extern unsigned long __bad_increment_for_ia64_fetch_and_add (void);
  32. #define IA64_FETCHADD(tmp,v,n,sz,sem) \
  33. ({ \
  34. switch (sz) { \
  35. case 4: \
  36. tmp = ia64_fetchadd4_##sem((unsigned int *) v, n); \
  37. break; \
  38. \
  39. case 8: \
  40. tmp = ia64_fetchadd8_##sem((unsigned long *) v, n); \
  41. break; \
  42. \
  43. default: \
  44. __bad_size_for_ia64_fetch_and_add(); \
  45. } \
  46. })
  47. #define ia64_fetchadd(i,v,sem) \
  48. ({ \
  49. __u64 _tmp; \
  50. volatile __typeof__(*(v)) *_v = (v); \
  51. /* Can't use a switch () here: gcc isn't always smart enough for that... */ \
  52. if ((i) == -16) \
  53. IA64_FETCHADD(_tmp, _v, -16, sizeof(*(v)), sem); \
  54. else if ((i) == -8) \
  55. IA64_FETCHADD(_tmp, _v, -8, sizeof(*(v)), sem); \
  56. else if ((i) == -4) \
  57. IA64_FETCHADD(_tmp, _v, -4, sizeof(*(v)), sem); \
  58. else if ((i) == -1) \
  59. IA64_FETCHADD(_tmp, _v, -1, sizeof(*(v)), sem); \
  60. else if ((i) == 1) \
  61. IA64_FETCHADD(_tmp, _v, 1, sizeof(*(v)), sem); \
  62. else if ((i) == 4) \
  63. IA64_FETCHADD(_tmp, _v, 4, sizeof(*(v)), sem); \
  64. else if ((i) == 8) \
  65. IA64_FETCHADD(_tmp, _v, 8, sizeof(*(v)), sem); \
  66. else if ((i) == 16) \
  67. IA64_FETCHADD(_tmp, _v, 16, sizeof(*(v)), sem); \
  68. else \
  69. _tmp = __bad_increment_for_ia64_fetch_and_add(); \
  70. (__typeof__(*(v))) (_tmp); /* return old value */ \
  71. })
  72. #define ia64_fetch_and_add(i,v) (ia64_fetchadd(i, v, rel) + (i)) /* return new value */
  73. /*
  74. * This function doesn't exist, so you'll get a linker error if
  75. * something tries to do an invalid xchg().
  76. */
  77. extern void ia64_xchg_called_with_bad_pointer (void);
  78. #define __xchg(x,ptr,size) \
  79. ({ \
  80. unsigned long __xchg_result; \
  81. \
  82. switch (size) { \
  83. case 1: \
  84. __xchg_result = ia64_xchg1((__u8 *)ptr, x); \
  85. break; \
  86. \
  87. case 2: \
  88. __xchg_result = ia64_xchg2((__u16 *)ptr, x); \
  89. break; \
  90. \
  91. case 4: \
  92. __xchg_result = ia64_xchg4((__u32 *)ptr, x); \
  93. break; \
  94. \
  95. case 8: \
  96. __xchg_result = ia64_xchg8((__u64 *)ptr, x); \
  97. break; \
  98. default: \
  99. ia64_xchg_called_with_bad_pointer(); \
  100. } \
  101. __xchg_result; \
  102. })
  103. #define xchg(ptr,x) \
  104. ((__typeof__(*(ptr))) __xchg ((unsigned long) (x), (ptr), sizeof(*(ptr))))
  105. /*
  106. * Atomic compare and exchange. Compare OLD with MEM, if identical,
  107. * store NEW in MEM. Return the initial value in MEM. Success is
  108. * indicated by comparing RETURN with OLD.
  109. */
  110. #define __HAVE_ARCH_CMPXCHG 1
  111. /*
  112. * This function doesn't exist, so you'll get a linker error
  113. * if something tries to do an invalid cmpxchg().
  114. */
  115. extern long ia64_cmpxchg_called_with_bad_pointer (void);
  116. #define ia64_cmpxchg(sem,ptr,old,new,size) \
  117. ({ \
  118. __u64 _o_, _r_; \
  119. \
  120. switch (size) { \
  121. case 1: _o_ = (__u8 ) (long) (old); break; \
  122. case 2: _o_ = (__u16) (long) (old); break; \
  123. case 4: _o_ = (__u32) (long) (old); break; \
  124. case 8: _o_ = (__u64) (long) (old); break; \
  125. default: break; \
  126. } \
  127. switch (size) { \
  128. case 1: \
  129. _r_ = ia64_cmpxchg1_##sem((__u8 *) ptr, new, _o_); \
  130. break; \
  131. \
  132. case 2: \
  133. _r_ = ia64_cmpxchg2_##sem((__u16 *) ptr, new, _o_); \
  134. break; \
  135. \
  136. case 4: \
  137. _r_ = ia64_cmpxchg4_##sem((__u32 *) ptr, new, _o_); \
  138. break; \
  139. \
  140. case 8: \
  141. _r_ = ia64_cmpxchg8_##sem((__u64 *) ptr, new, _o_); \
  142. break; \
  143. \
  144. default: \
  145. _r_ = ia64_cmpxchg_called_with_bad_pointer(); \
  146. break; \
  147. } \
  148. (__typeof__(old)) _r_; \
  149. })
  150. #define cmpxchg_acq(ptr, o, n) \
  151. ia64_cmpxchg(acq, (ptr), (o), (n), sizeof(*(ptr)))
  152. #define cmpxchg_rel(ptr, o, n) \
  153. ia64_cmpxchg(rel, (ptr), (o), (n), sizeof(*(ptr)))
  154. /* for compatibility with other platforms: */
  155. #define cmpxchg(ptr, o, n) cmpxchg_acq((ptr), (o), (n))
  156. #define cmpxchg64(ptr, o, n) cmpxchg_acq((ptr), (o), (n))
  157. #define cmpxchg_local cmpxchg
  158. #define cmpxchg64_local cmpxchg64
  159. #ifdef CONFIG_IA64_DEBUG_CMPXCHG
  160. # define CMPXCHG_BUGCHECK_DECL int _cmpxchg_bugcheck_count = 128;
  161. # define CMPXCHG_BUGCHECK(v) \
  162. do { \
  163. if (_cmpxchg_bugcheck_count-- <= 0) { \
  164. void *ip; \
  165. extern int printk(const char *fmt, ...); \
  166. ip = (void *) ia64_getreg(_IA64_REG_IP); \
  167. printk("CMPXCHG_BUGCHECK: stuck at %p on word %p\n", ip, (v)); \
  168. break; \
  169. } \
  170. } while (0)
  171. #else /* !CONFIG_IA64_DEBUG_CMPXCHG */
  172. # define CMPXCHG_BUGCHECK_DECL
  173. # define CMPXCHG_BUGCHECK(v)
  174. #endif /* !CONFIG_IA64_DEBUG_CMPXCHG */
  175. #endif
  176. #ifdef __KERNEL__
  177. #include <asm/paravirt_privop.h>
  178. #endif
  179. #ifndef __ASSEMBLY__
  180. #if defined(CONFIG_PARAVIRT) && defined(__KERNEL__)
  181. #define IA64_INTRINSIC_API(name) pv_cpu_ops.name
  182. #define IA64_INTRINSIC_MACRO(name) paravirt_ ## name
  183. #else
  184. #define IA64_INTRINSIC_API(name) ia64_native_ ## name
  185. #define IA64_INTRINSIC_MACRO(name) ia64_native_ ## name
  186. #endif
  187. /************************************************/
  188. /* Instructions paravirtualized for correctness */
  189. /************************************************/
  190. /* fc, thash, get_cpuid, get_pmd, get_eflags, set_eflags */
  191. /* Note that "ttag" and "cover" are also privilege-sensitive; "ttag"
  192. * is not currently used (though it may be in a long-format VHPT system!)
  193. */
  194. #define ia64_fc IA64_INTRINSIC_API(fc)
  195. #define ia64_thash IA64_INTRINSIC_API(thash)
  196. #define ia64_get_cpuid IA64_INTRINSIC_API(get_cpuid)
  197. #define ia64_get_pmd IA64_INTRINSIC_API(get_pmd)
  198. /************************************************/
  199. /* Instructions paravirtualized for performance */
  200. /************************************************/
  201. #define ia64_ssm IA64_INTRINSIC_MACRO(ssm)
  202. #define ia64_rsm IA64_INTRINSIC_MACRO(rsm)
  203. #define ia64_getreg IA64_INTRINSIC_API(getreg)
  204. #define ia64_setreg IA64_INTRINSIC_API(setreg)
  205. #define ia64_set_rr IA64_INTRINSIC_API(set_rr)
  206. #define ia64_get_rr IA64_INTRINSIC_API(get_rr)
  207. #define ia64_ptcga IA64_INTRINSIC_API(ptcga)
  208. #define ia64_get_psr_i IA64_INTRINSIC_API(get_psr_i)
  209. #define ia64_intrin_local_irq_restore \
  210. IA64_INTRINSIC_API(intrin_local_irq_restore)
  211. #define ia64_set_rr0_to_rr4 IA64_INTRINSIC_API(set_rr0_to_rr4)
  212. #endif /* !__ASSEMBLY__ */
  213. #endif /* _ASM_IA64_INTRINSICS_H */