crt0_rom.S 2.0 KB

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  1. /*
  2. * linux/arch/h8300/platform/h8s/generic/crt0_rom.S
  3. *
  4. * Yoshinori Sato <ysato@users.sourceforge.jp>
  5. *
  6. * Platform depend startup
  7. * Target Archtecture: generic
  8. * Memory Layout : ROM
  9. */
  10. #define ASSEMBLY
  11. #include <asm/linkage.h>
  12. #include <asm/regs267x.h>
  13. .global SYMBOL_NAME(_start)
  14. .global SYMBOL_NAME(_command_line)
  15. .global SYMBOL_NAME(_platform_gpio_table)
  16. .global SYMBOL_NAME(_target_name)
  17. .h8300s
  18. .section .text
  19. .file "crt0_rom.S"
  20. /* CPU Reset entry */
  21. SYMBOL_NAME_LABEL(_start)
  22. mov.l #__ramend,sp
  23. ldc #0x80,ccr
  24. ldc #0,exr
  25. bclr #4,@INTCR:8
  26. bset #5,@INTCR:8 /* Interrupt mode 2 */
  27. /* Peripheral Setup */
  28. /* copy .data */
  29. #if !defined(CONFIG_H8S_SIM)
  30. mov.l #__begin_data,er5
  31. mov.l #__sdata,er6
  32. mov.l #__edata,er4
  33. sub.l er6,er4
  34. shlr.l #2,er4
  35. 1:
  36. mov.l @er5+,er0
  37. mov.l er0,@er6
  38. adds #4,er6
  39. dec.l #1,er4
  40. bne 1b
  41. #endif
  42. /* .bss clear */
  43. mov.l #__sbss,er5
  44. mov.l #__ebss,er4
  45. sub.l er5,er4
  46. shlr.l #2,er4
  47. sub.l er0,er0
  48. 1:
  49. mov.l er0,@er5
  50. adds #4,er5
  51. dec.l #1,er4
  52. bne 1b
  53. /* linux kernel start */
  54. ldc #0x90,ccr /* running kernel */
  55. mov.l #SYMBOL_NAME(init_thread_union),sp
  56. add.l #0x2000,sp
  57. jsr @_start_kernel
  58. _exit:
  59. jmp _exit
  60. rts
  61. /* I/O port assign information */
  62. __platform_gpio_table:
  63. mov.l #gpio_table,er0
  64. rts
  65. gpio_table:
  66. ;; P1DDR
  67. .byte 0x00,0x00
  68. ;; P2DDR
  69. .byte 0x00,0x00
  70. ;; P3DDR
  71. .byte 0x00,0x00
  72. ;; P4DDR
  73. .byte 0x00,0x00
  74. ;; P5DDR
  75. .byte 0x00,0x00
  76. ;; P6DDR
  77. .byte 0x00,0x00
  78. ;; dummy
  79. .byte 0x00,0x00
  80. ;; P8DDR
  81. .byte 0x00,0x00
  82. ;; PADDR
  83. .byte 0x00,0x00
  84. ;; PBDDR
  85. .byte 0x00,0x00
  86. ;; PCDDR
  87. .byte 0x00,0x00
  88. ;; PDDDR
  89. .byte 0x00,0x00
  90. ;; PEDDR
  91. .byte 0x00,0x00
  92. ;; PFDDR
  93. .byte 0x00,0x00
  94. ;; PGDDR
  95. .byte 0x00,0x00
  96. ;; PHDDR
  97. .byte 0x00,0x00
  98. .section .rodata
  99. __target_name:
  100. .asciz "generic"
  101. .section .bss
  102. __command_line:
  103. .space 512
  104. /* interrupt vector */
  105. .section .vectors,"ax"
  106. .long __start
  107. .long __start
  108. vector = 2
  109. .rept 126-1
  110. .long _interrupt_redirect_table+vector*4
  111. vector = vector + 1
  112. .endr