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blackfin
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mach-bf548
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mach
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blackfin.h

blackfin.h 6.6 KB
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  1. /*
    2. 

  2.  * File:         include/asm-blackfin/mach-bf548/blackfin.h
    3. 

  3.  * Based on:
    4. 

  4.  * Author:
    5. 

  5.  *
    6. 

  6.  * Created:
    7. 

  7.  * Description:
    8. 

  8.  *
    9. 

  9.  * Rev:
    10. 

  10.  *
    11. 

  11.  * Modified:
    12. 

  12.  *
    13. 

  13.  *
    14. 

  14.  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
    15. 

  15.  *
    16. 

  16.  * This program is free software; you can redistribute it and/or modify
    17. 

  17.  * it under the terms of the GNU General Public License as published by
    18. 

  18.  * the Free Software Foundation; either version 2, or (at your option)
    19. 

  19.  * any later version.
    20. 

  20.  *
    21. 

  21.  * This program is distributed in the hope that it will be useful,
    22. 

  22.  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    23. 

  23.  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    24. 

  24.  * GNU General Public License for more details.
    25. 

  25.  *
    26. 

  26.  * You should have received a copy of the GNU General Public License
    27. 

  27.  * along with this program; see the file COPYING.
    28. 

  28.  * If not, write to the Free Software Foundation,
    29. 

  29.  * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
    30. 

  30.  */
    31. 

  31. 

  32. #ifndef _MACH_BLACKFIN_H_
    33. 

  33. #define _MACH_BLACKFIN_H_
    34. 

  34. 

  35. #define BF548_FAMILY
    36. 

  36. 

  37. #include "bf548.h"
    38. 

  38. #include "mem_map.h"
    39. 

  39. #include "anomaly.h"
    40. 

  40. 

  41. #ifdef CONFIG_BF542
    42. 

  42. #include "defBF542.h"
    43. 

  43. #endif
    44. 

  44. 

  45. #ifdef CONFIG_BF544
    46. 

  46. #include "defBF544.h"
    47. 

  47. #endif
    48. 

  48. 

  49. #ifdef CONFIG_BF547
    50. 

  50. #include "defBF547.h"
    51. 

  51. #endif
    52. 

  52. 

  53. #ifdef CONFIG_BF548
    54. 

  54. #include "defBF548.h"
    55. 

  55. #endif
    56. 

  56. 

  57. #ifdef CONFIG_BF549
    58. 

  58. #include "defBF549.h"
    59. 

  59. #endif
    60. 

  60. 

  61. #if !defined(__ASSEMBLY__)
    62. 

  62. #ifdef CONFIG_BF542
    63. 

  63. #include "cdefBF542.h"
    64. 

  64. #endif
    65. 

  65. #ifdef CONFIG_BF544
    66. 

  66. #include "cdefBF544.h"
    67. 

  67. #endif
    68. 

  68. #ifdef CONFIG_BF547
    69. 

  69. #include "cdefBF547.h"
    70. 

  70. #endif
    71. 

  71. #ifdef CONFIG_BF548
    72. 

  72. #include "cdefBF548.h"
    73. 

  73. #endif
    74. 

  74. #ifdef CONFIG_BF549
    75. 

  75. #include "cdefBF549.h"
    76. 

  76. #endif
    77. 

  77. 

  78. /* UART 1*/
    79. 

  79. #define bfin_read_UART_THR()		bfin_read_UART1_THR()
    80. 

  80. #define bfin_write_UART_THR(val)	bfin_write_UART1_THR(val)
    81. 

  81. #define bfin_read_UART_RBR()		bfin_read_UART1_RBR()
    82. 

  82. #define bfin_write_UART_RBR(val)	bfin_write_UART1_RBR(val)
    83. 

  83. #define bfin_read_UART_DLL()		bfin_read_UART1_DLL()
    84. 

  84. #define bfin_write_UART_DLL(val)	bfin_write_UART1_DLL(val)
    85. 

  85. #define bfin_read_UART_IER()		bfin_read_UART1_IER()
    86. 

  86. #define bfin_write_UART_IER(val)	bfin_write_UART1_IER(val)
    87. 

  87. #define bfin_read_UART_DLH()		bfin_read_UART1_DLH()
    88. 

  88. #define bfin_write_UART_DLH(val)	bfin_write_UART1_DLH(val)
    89. 

  89. #define bfin_read_UART_IIR()		bfin_read_UART1_IIR()
    90. 

  90. #define bfin_write_UART_IIR(val)	bfin_write_UART1_IIR(val)
    91. 

  91. #define bfin_read_UART_LCR()		bfin_read_UART1_LCR()
    92. 

  92. #define bfin_write_UART_LCR(val)	bfin_write_UART1_LCR(val)
    93. 

  93. #define bfin_read_UART_MCR()		bfin_read_UART1_MCR()
    94. 

  94. #define bfin_write_UART_MCR(val)	bfin_write_UART1_MCR(val)
    95. 

  95. #define bfin_read_UART_LSR()		bfin_read_UART1_LSR()
    96. 

  96. #define bfin_write_UART_LSR(val)	bfin_write_UART1_LSR(val)
    97. 

  97. #define bfin_read_UART_SCR()		bfin_read_UART1_SCR()
    98. 

  98. #define bfin_write_UART_SCR(val)	bfin_write_UART1_SCR(val)
    99. 

  99. #define bfin_read_UART_GCTL()		bfin_read_UART1_GCTL()
    100. 

  100. #define bfin_write_UART_GCTL(val)	bfin_write_UART1_GCTL(val)
    101. 

  101. 

  102. #endif
    103. 

  103. 

  104. /* MAP used DEFINES from BF533 to BF54x - so we don't need to change 
    105. 

  105.  * them in the driver, kernel, etc. */
    106. 

  106. 

  107. /* UART_IIR Register */
    108. 

  108. #define STATUS(x)	((x << 1) & 0x06)
    109. 

  109. #define STATUS_P1	0x02
    110. 

  110. #define STATUS_P0	0x01
    111. 

  111. 

  112. /* UART 0*/
    113. 

  113. 

  114. /* DMA Channnel */
    115. 

  115. #define bfin_read_CH_UART_RX()		bfin_read_CH_UART1_RX()
    116. 

  116. #define bfin_write_CH_UART_RX(val)	bfin_write_CH_UART1_RX(val)
    117. 

  117. #define bfin_read_CH_UART_TX()		bfin_read_CH_UART1_TX()
    118. 

  118. #define bfin_write_CH_UART_TX(val)	bfin_write_CH_UART1_TX(val)
    119. 

  119. #define CH_UART_RX			CH_UART1_RX
    120. 

  120. #define CH_UART_TX			CH_UART1_TX
    121. 

  121. 

  122. /* System Interrupt Controller */
    123. 

  123. #define bfin_read_IRQ_UART_RX()		bfin_read_IRQ_UART1_RX()
    124. 

  124. #define bfin_write_IRQ_UART_RX(val)	bfin_write_IRQ_UART1_RX(val)
    125. 

  125. #define bfin_read_IRQ_UART_TX()		bfin_read_IRQ_UART1_TX()
    126. 

  126. #define bfin_write_IRQ_UART_TX(val)	bfin_write_IRQ_UART1_TX(val)
    127. 

  127. #define bfin_read_IRQ_UART_ERROR()	bfin_read_IRQ_UART1_ERROR()
    128. 

  128. #define bfin_write_IRQ_UART_ERROR(val)	bfin_write_IRQ_UART1_ERROR(val)
    129. 

  129. #define IRQ_UART_RX			IRQ_UART1_RX
    130. 

  130. #define	IRQ_UART_TX			IRQ_UART1_TX
    131. 

  131. #define	IRQ_UART_ERROR			IRQ_UART1_ERROR
    132. 

  132. 

  133. /* MMR Registers*/
    134. 

  134. #define bfin_read_UART_THR()		bfin_read_UART1_THR()
    135. 

  135. #define bfin_write_UART_THR(val)	bfin_write_UART1_THR(val)
    136. 

  136. #define bfin_read_UART_RBR()		bfin_read_UART1_RBR()
    137. 

  137. #define bfin_write_UART_RBR(val)	bfin_write_UART1_RBR(val)
    138. 

  138. #define bfin_read_UART_DLL()		bfin_read_UART1_DLL()
    139. 

  139. #define bfin_write_UART_DLL(val)	bfin_write_UART1_DLL(val)
    140. 

  140. #define bfin_read_UART_IER()		bfin_read_UART1_IER()
    141. 

  141. #define bfin_write_UART_IER(val)	bfin_write_UART1_IER(val)
    142. 

  142. #define bfin_read_UART_DLH()		bfin_read_UART1_DLH()
    143. 

  143. #define bfin_write_UART_DLH(val)	bfin_write_UART1_DLH(val)
    144. 

  144. #define bfin_read_UART_IIR()		bfin_read_UART1_IIR()
    145. 

  145. #define bfin_write_UART_IIR(val)	bfin_write_UART1_IIR(val)
    146. 

  146. #define bfin_read_UART_LCR()		bfin_read_UART1_LCR()
    147. 

  147. #define bfin_write_UART_LCR(val)	bfin_write_UART1_LCR(val)
    148. 

  148. #define bfin_read_UART_MCR()		bfin_read_UART1_MCR()
    149. 

  149. #define bfin_write_UART_MCR(val)	bfin_write_UART1_MCR(val)
    150. 

  150. #define bfin_read_UART_LSR()		bfin_read_UART1_LSR()
    151. 

  151. #define bfin_write_UART_LSR(val)	bfin_write_UART1_LSR(val)
    152. 

  152. #define bfin_read_UART_SCR()		bfin_read_UART1_SCR()
    153. 

  153. #define bfin_write_UART_SCR(val)	bfin_write_UART1_SCR(val)
    154. 

  154. #define bfin_read_UART_GCTL()		bfin_read_UART1_GCTL()
    155. 

  155. #define bfin_write_UART_GCTL(val)	bfin_write_UART1_GCTL(val)
    156. 

  156. 

  157. #define BFIN_UART_THR			UART1_THR
    158. 

  158. #define BFIN_UART_RBR			UART1_RBR
    159. 

  159. #define BFIN_UART_DLL			UART1_DLL
    160. 

  160. #define BFIN_UART_IER			UART1_IER
    161. 

  161. #define BFIN_UART_DLH			UART1_DLH
    162. 

  162. #define BFIN_UART_IIR			UART1_IIR
    163. 

  163. #define BFIN_UART_LCR			UART1_LCR
    164. 

  164. #define BFIN_UART_MCR			UART1_MCR
    165. 

  165. #define BFIN_UART_LSR			UART1_LSR
    166. 

  166. #define BFIN_UART_SCR			UART1_SCR
    167. 

  167. #define BFIN_UART_GCTL			UART1_GCTL
    168. 

  168. 

  169. #define BFIN_UART_NR_PORTS	4
    170. 

  170. 

  171. #define OFFSET_DLL              0x00	/* Divisor Latch (Low-Byte)             */
    172. 

  172. #define OFFSET_DLH              0x04	/* Divisor Latch (High-Byte)            */
    173. 

  173. #define OFFSET_GCTL             0x08	/* Global Control Register              */
    174. 

  174. #define OFFSET_LCR              0x0C	/* Line Control Register                */
    175. 

  175. #define OFFSET_MCR              0x10	/* Modem Control Register               */
    176. 

  176. #define OFFSET_LSR              0x14	/* Line Status Register                 */
    177. 

  177. #define OFFSET_MSR              0x18	/* Modem Status Register                */
    178. 

  178. #define OFFSET_SCR              0x1C	/* SCR Scratch Register                 */
    179. 

  179. #define OFFSET_IER_SET          0x20	/* Set Interrupt Enable Register        */
    180. 

  180. #define OFFSET_IER_CLEAR        0x24	/* Clear Interrupt Enable Register      */
    181. 

  181. #define OFFSET_THR              0x28	/* Transmit Holding register            */
    182. 

  182. #define OFFSET_RBR              0x2C	/* Receive Buffer register              */
    183. 

  183. 

  184. /* PLL_DIV Masks */
    185. 

  185. #define CCLK_DIV1 CSEL_DIV1	/* CCLK = VCO / 1 */
    186. 

  186. #define CCLK_DIV2 CSEL_DIV2	/* CCLK = VCO / 2 */
    187. 

  187. #define CCLK_DIV4 CSEL_DIV4	/* CCLK = VCO / 4 */
    188. 

  188. #define CCLK_DIV8 CSEL_DIV8	/* CCLK = VCO / 8 */
    189. 

  189. 

  190. #endif
    191.