tcm_bf537.c 15 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf537/boards/tcm_bf537.c
  3. * Based on: arch/blackfin/mach-bf533/boards/cm_bf537.c
  4. * Author: Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Created: 2005
  7. * Description: Board description file
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2006 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/etherdevice.h>
  32. #include <linux/platform_device.h>
  33. #include <linux/mtd/mtd.h>
  34. #include <linux/mtd/partitions.h>
  35. #include <linux/mtd/physmap.h>
  36. #include <linux/spi/spi.h>
  37. #include <linux/spi/flash.h>
  38. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  39. #include <linux/usb/isp1362.h>
  40. #endif
  41. #include <linux/ata_platform.h>
  42. #include <linux/irq.h>
  43. #include <asm/dma.h>
  44. #include <asm/bfin5xx_spi.h>
  45. #include <asm/portmux.h>
  46. #include <asm/dpmc.h>
  47. /*
  48. * Name the Board for the /proc/cpuinfo
  49. */
  50. const char bfin_board_name[] = "Bluetechnix TCM BF537";
  51. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  52. /* all SPI peripherals info goes here */
  53. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  54. static struct mtd_partition bfin_spi_flash_partitions[] = {
  55. {
  56. .name = "bootloader(spi)",
  57. .size = 0x00020000,
  58. .offset = 0,
  59. .mask_flags = MTD_CAP_ROM
  60. }, {
  61. .name = "linux kernel(spi)",
  62. .size = 0xe0000,
  63. .offset = 0x20000
  64. }, {
  65. .name = "file system(spi)",
  66. .size = 0x700000,
  67. .offset = 0x00100000,
  68. }
  69. };
  70. static struct flash_platform_data bfin_spi_flash_data = {
  71. .name = "m25p80",
  72. .parts = bfin_spi_flash_partitions,
  73. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  74. .type = "m25p64",
  75. };
  76. /* SPI flash chip (m25p64) */
  77. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  78. .enable_dma = 0, /* use dma transfer with this chip*/
  79. .bits_per_word = 8,
  80. };
  81. #endif
  82. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  83. /* SPI ADC chip */
  84. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  85. .enable_dma = 1, /* use dma transfer with this chip*/
  86. .bits_per_word = 16,
  87. };
  88. #endif
  89. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  90. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  91. .enable_dma = 0,
  92. .bits_per_word = 16,
  93. };
  94. #endif
  95. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  96. static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
  97. .enable_dma = 0,
  98. .bits_per_word = 16,
  99. };
  100. #endif
  101. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  102. static struct bfin5xx_spi_chip spi_mmc_chip_info = {
  103. .enable_dma = 1,
  104. .bits_per_word = 8,
  105. };
  106. #endif
  107. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  108. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  109. {
  110. /* the modalias must be the same as spi device driver name */
  111. .modalias = "m25p80", /* Name of spi_driver for this device */
  112. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  113. .bus_num = 0, /* Framework bus number */
  114. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  115. .platform_data = &bfin_spi_flash_data,
  116. .controller_data = &spi_flash_chip_info,
  117. .mode = SPI_MODE_3,
  118. },
  119. #endif
  120. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  121. {
  122. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  123. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  124. .bus_num = 0, /* Framework bus number */
  125. .chip_select = 1, /* Framework chip select. */
  126. .platform_data = NULL, /* No spi_driver specific config */
  127. .controller_data = &spi_adc_chip_info,
  128. },
  129. #endif
  130. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  131. {
  132. .modalias = "ad1836-spi",
  133. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  134. .bus_num = 0,
  135. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  136. .controller_data = &ad1836_spi_chip_info,
  137. },
  138. #endif
  139. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  140. {
  141. .modalias = "ad9960-spi",
  142. .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
  143. .bus_num = 0,
  144. .chip_select = 1,
  145. .controller_data = &ad9960_spi_chip_info,
  146. },
  147. #endif
  148. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  149. {
  150. .modalias = "spi_mmc_dummy",
  151. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  152. .bus_num = 0,
  153. .chip_select = 7,
  154. .platform_data = NULL,
  155. .controller_data = &spi_mmc_chip_info,
  156. .mode = SPI_MODE_3,
  157. },
  158. {
  159. .modalias = "spi_mmc",
  160. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  161. .bus_num = 0,
  162. .chip_select = CONFIG_SPI_MMC_CS_CHAN,
  163. .platform_data = NULL,
  164. .controller_data = &spi_mmc_chip_info,
  165. .mode = SPI_MODE_3,
  166. },
  167. #endif
  168. };
  169. /* SPI (0) */
  170. static struct resource bfin_spi0_resource[] = {
  171. [0] = {
  172. .start = SPI0_REGBASE,
  173. .end = SPI0_REGBASE + 0xFF,
  174. .flags = IORESOURCE_MEM,
  175. },
  176. [1] = {
  177. .start = CH_SPI,
  178. .end = CH_SPI,
  179. .flags = IORESOURCE_IRQ,
  180. }
  181. };
  182. /* SPI controller data */
  183. static struct bfin5xx_spi_master bfin_spi0_info = {
  184. .num_chipselect = 8,
  185. .enable_dma = 1, /* master has the ability to do dma transfer */
  186. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  187. };
  188. static struct platform_device bfin_spi0_device = {
  189. .name = "bfin-spi",
  190. .id = 0, /* Bus number */
  191. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  192. .resource = bfin_spi0_resource,
  193. .dev = {
  194. .platform_data = &bfin_spi0_info, /* Passed to driver */
  195. },
  196. };
  197. #endif /* spi master and devices */
  198. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  199. static struct platform_device rtc_device = {
  200. .name = "rtc-bfin",
  201. .id = -1,
  202. };
  203. #endif
  204. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  205. static struct platform_device hitachi_fb_device = {
  206. .name = "hitachi-tx09",
  207. };
  208. #endif
  209. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  210. static struct resource smc91x_resources[] = {
  211. {
  212. .start = 0x20200300,
  213. .end = 0x20200300 + 16,
  214. .flags = IORESOURCE_MEM,
  215. }, {
  216. .start = IRQ_PF14,
  217. .end = IRQ_PF14,
  218. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  219. },
  220. };
  221. static struct platform_device smc91x_device = {
  222. .name = "smc91x",
  223. .id = 0,
  224. .num_resources = ARRAY_SIZE(smc91x_resources),
  225. .resource = smc91x_resources,
  226. };
  227. #endif
  228. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  229. static struct resource isp1362_hcd_resources[] = {
  230. {
  231. .start = 0x20308000,
  232. .end = 0x20308000,
  233. .flags = IORESOURCE_MEM,
  234. }, {
  235. .start = 0x20308004,
  236. .end = 0x20308004,
  237. .flags = IORESOURCE_MEM,
  238. }, {
  239. .start = IRQ_PG15,
  240. .end = IRQ_PG15,
  241. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  242. },
  243. };
  244. static struct isp1362_platform_data isp1362_priv = {
  245. .sel15Kres = 1,
  246. .clknotstop = 0,
  247. .oc_enable = 0,
  248. .int_act_high = 0,
  249. .int_edge_triggered = 0,
  250. .remote_wakeup_connected = 0,
  251. .no_power_switching = 1,
  252. .power_switching_mode = 0,
  253. };
  254. static struct platform_device isp1362_hcd_device = {
  255. .name = "isp1362-hcd",
  256. .id = 0,
  257. .dev = {
  258. .platform_data = &isp1362_priv,
  259. },
  260. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  261. .resource = isp1362_hcd_resources,
  262. };
  263. #endif
  264. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  265. static struct resource net2272_bfin_resources[] = {
  266. {
  267. .start = 0x20200000,
  268. .end = 0x20200000 + 0x100,
  269. .flags = IORESOURCE_MEM,
  270. }, {
  271. .start = IRQ_PH14,
  272. .end = IRQ_PH14,
  273. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  274. },
  275. };
  276. static struct platform_device net2272_bfin_device = {
  277. .name = "net2272",
  278. .id = -1,
  279. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  280. .resource = net2272_bfin_resources,
  281. };
  282. #endif
  283. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  284. static struct mtd_partition cm_partitions[] = {
  285. {
  286. .name = "bootloader(nor)",
  287. .size = 0x40000,
  288. .offset = 0,
  289. }, {
  290. .name = "linux kernel(nor)",
  291. .size = 0xE0000,
  292. .offset = MTDPART_OFS_APPEND,
  293. }, {
  294. .name = "file system(nor)",
  295. .size = MTDPART_SIZ_FULL,
  296. .offset = MTDPART_OFS_APPEND,
  297. }
  298. };
  299. static struct physmap_flash_data cm_flash_data = {
  300. .width = 2,
  301. .parts = cm_partitions,
  302. .nr_parts = ARRAY_SIZE(cm_partitions),
  303. };
  304. static unsigned cm_flash_gpios[] = { GPIO_PF4, GPIO_PF5 };
  305. static struct resource cm_flash_resource[] = {
  306. {
  307. .name = "cfi_probe",
  308. .start = 0x20000000,
  309. .end = 0x201fffff,
  310. .flags = IORESOURCE_MEM,
  311. }, {
  312. .start = (unsigned long)cm_flash_gpios,
  313. .end = ARRAY_SIZE(cm_flash_gpios),
  314. .flags = IORESOURCE_IRQ,
  315. }
  316. };
  317. static struct platform_device cm_flash_device = {
  318. .name = "gpio-addr-flash",
  319. .id = 0,
  320. .dev = {
  321. .platform_data = &cm_flash_data,
  322. },
  323. .num_resources = ARRAY_SIZE(cm_flash_resource),
  324. .resource = cm_flash_resource,
  325. };
  326. #endif
  327. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  328. static struct resource bfin_uart_resources[] = {
  329. {
  330. .start = 0xFFC00400,
  331. .end = 0xFFC004FF,
  332. .flags = IORESOURCE_MEM,
  333. }, {
  334. .start = 0xFFC02000,
  335. .end = 0xFFC020FF,
  336. .flags = IORESOURCE_MEM,
  337. },
  338. };
  339. static struct platform_device bfin_uart_device = {
  340. .name = "bfin-uart",
  341. .id = 1,
  342. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  343. .resource = bfin_uart_resources,
  344. };
  345. #endif
  346. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  347. static struct resource bfin_sir_resources[] = {
  348. #ifdef CONFIG_BFIN_SIR0
  349. {
  350. .start = 0xFFC00400,
  351. .end = 0xFFC004FF,
  352. .flags = IORESOURCE_MEM,
  353. },
  354. #endif
  355. #ifdef CONFIG_BFIN_SIR1
  356. {
  357. .start = 0xFFC02000,
  358. .end = 0xFFC020FF,
  359. .flags = IORESOURCE_MEM,
  360. },
  361. #endif
  362. };
  363. static struct platform_device bfin_sir_device = {
  364. .name = "bfin_sir",
  365. .id = 0,
  366. .num_resources = ARRAY_SIZE(bfin_sir_resources),
  367. .resource = bfin_sir_resources,
  368. };
  369. #endif
  370. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  371. static struct resource bfin_twi0_resource[] = {
  372. [0] = {
  373. .start = TWI0_REGBASE,
  374. .end = TWI0_REGBASE,
  375. .flags = IORESOURCE_MEM,
  376. },
  377. [1] = {
  378. .start = IRQ_TWI,
  379. .end = IRQ_TWI,
  380. .flags = IORESOURCE_IRQ,
  381. },
  382. };
  383. static struct platform_device i2c_bfin_twi_device = {
  384. .name = "i2c-bfin-twi",
  385. .id = 0,
  386. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  387. .resource = bfin_twi0_resource,
  388. };
  389. #endif
  390. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  391. static struct platform_device bfin_sport0_uart_device = {
  392. .name = "bfin-sport-uart",
  393. .id = 0,
  394. };
  395. static struct platform_device bfin_sport1_uart_device = {
  396. .name = "bfin-sport-uart",
  397. .id = 1,
  398. };
  399. #endif
  400. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  401. static struct platform_device bfin_mac_device = {
  402. .name = "bfin_mac",
  403. };
  404. #endif
  405. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  406. #define PATA_INT IRQ_PF14
  407. static struct pata_platform_info bfin_pata_platform_data = {
  408. .ioport_shift = 2,
  409. .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  410. };
  411. static struct resource bfin_pata_resources[] = {
  412. {
  413. .start = 0x2030C000,
  414. .end = 0x2030C01F,
  415. .flags = IORESOURCE_MEM,
  416. },
  417. {
  418. .start = 0x2030D018,
  419. .end = 0x2030D01B,
  420. .flags = IORESOURCE_MEM,
  421. },
  422. {
  423. .start = PATA_INT,
  424. .end = PATA_INT,
  425. .flags = IORESOURCE_IRQ,
  426. },
  427. };
  428. static struct platform_device bfin_pata_device = {
  429. .name = "pata_platform",
  430. .id = -1,
  431. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  432. .resource = bfin_pata_resources,
  433. .dev = {
  434. .platform_data = &bfin_pata_platform_data,
  435. }
  436. };
  437. #endif
  438. static const unsigned int cclk_vlev_datasheet[] =
  439. {
  440. VRPAIR(VLEV_085, 250000000),
  441. VRPAIR(VLEV_090, 376000000),
  442. VRPAIR(VLEV_095, 426000000),
  443. VRPAIR(VLEV_100, 426000000),
  444. VRPAIR(VLEV_105, 476000000),
  445. VRPAIR(VLEV_110, 476000000),
  446. VRPAIR(VLEV_115, 476000000),
  447. VRPAIR(VLEV_120, 500000000),
  448. VRPAIR(VLEV_125, 533000000),
  449. VRPAIR(VLEV_130, 600000000),
  450. };
  451. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  452. .tuple_tab = cclk_vlev_datasheet,
  453. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  454. .vr_settling_time = 25 /* us */,
  455. };
  456. static struct platform_device bfin_dpmc = {
  457. .name = "bfin dpmc",
  458. .dev = {
  459. .platform_data = &bfin_dmpc_vreg_data,
  460. },
  461. };
  462. static struct platform_device *cm_bf537_devices[] __initdata = {
  463. &bfin_dpmc,
  464. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  465. &hitachi_fb_device,
  466. #endif
  467. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  468. &rtc_device,
  469. #endif
  470. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  471. &bfin_uart_device,
  472. #endif
  473. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  474. &bfin_sir_device,
  475. #endif
  476. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  477. &i2c_bfin_twi_device,
  478. #endif
  479. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  480. &bfin_sport0_uart_device,
  481. &bfin_sport1_uart_device,
  482. #endif
  483. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  484. &isp1362_hcd_device,
  485. #endif
  486. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  487. &smc91x_device,
  488. #endif
  489. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  490. &bfin_mac_device,
  491. #endif
  492. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  493. &net2272_bfin_device,
  494. #endif
  495. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  496. &bfin_spi0_device,
  497. #endif
  498. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  499. &bfin_pata_device,
  500. #endif
  501. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  502. &cm_flash_device,
  503. #endif
  504. };
  505. static int __init cm_bf537_init(void)
  506. {
  507. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  508. platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
  509. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  510. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  511. #endif
  512. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  513. irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
  514. #endif
  515. return 0;
  516. }
  517. arch_initcall(cm_bf537_init);
  518. void bfin_get_ether_addr(char *addr)
  519. {
  520. random_ether_addr(addr);
  521. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  522. }
  523. EXPORT_SYMBOL(bfin_get_ether_addr);