pnav10.c 14 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf537/boards/stamp.c
  3. * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Created:
  7. * Description:
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2008 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/etherdevice.h>
  32. #include <linux/platform_device.h>
  33. #include <linux/mtd/mtd.h>
  34. #include <linux/mtd/partitions.h>
  35. #include <linux/spi/spi.h>
  36. #include <linux/spi/flash.h>
  37. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  38. #include <linux/usb/isp1362.h>
  39. #endif
  40. #include <linux/irq.h>
  41. #include <asm/dma.h>
  42. #include <asm/bfin5xx_spi.h>
  43. #include <asm/portmux.h>
  44. #include <linux/usb/sl811.h>
  45. #include <linux/spi/ad7877.h>
  46. /*
  47. * Name the Board for the /proc/cpuinfo
  48. */
  49. const char bfin_board_name[] = "PNAV-1.0";
  50. /*
  51. * Driver needs to know address, irq and flag pin.
  52. */
  53. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  54. static struct resource bfin_pcmcia_cf_resources[] = {
  55. {
  56. .start = 0x20310000, /* IO PORT */
  57. .end = 0x20312000,
  58. .flags = IORESOURCE_MEM,
  59. }, {
  60. .start = 0x20311000, /* Attribute Memory */
  61. .end = 0x20311FFF,
  62. .flags = IORESOURCE_MEM,
  63. }, {
  64. .start = IRQ_PF4,
  65. .end = IRQ_PF4,
  66. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  67. }, {
  68. .start = 6, /* Card Detect PF6 */
  69. .end = 6,
  70. .flags = IORESOURCE_IRQ,
  71. },
  72. };
  73. static struct platform_device bfin_pcmcia_cf_device = {
  74. .name = "bfin_cf_pcmcia",
  75. .id = -1,
  76. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  77. .resource = bfin_pcmcia_cf_resources,
  78. };
  79. #endif
  80. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  81. static struct platform_device rtc_device = {
  82. .name = "rtc-bfin",
  83. .id = -1,
  84. };
  85. #endif
  86. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  87. static struct resource smc91x_resources[] = {
  88. {
  89. .name = "smc91x-regs",
  90. .start = 0x20300300,
  91. .end = 0x20300300 + 16,
  92. .flags = IORESOURCE_MEM,
  93. }, {
  94. .start = IRQ_PF7,
  95. .end = IRQ_PF7,
  96. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  97. },
  98. };
  99. static struct platform_device smc91x_device = {
  100. .name = "smc91x",
  101. .id = 0,
  102. .num_resources = ARRAY_SIZE(smc91x_resources),
  103. .resource = smc91x_resources,
  104. };
  105. #endif
  106. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  107. static struct resource sl811_hcd_resources[] = {
  108. {
  109. .start = 0x20340000,
  110. .end = 0x20340000,
  111. .flags = IORESOURCE_MEM,
  112. }, {
  113. .start = 0x20340004,
  114. .end = 0x20340004,
  115. .flags = IORESOURCE_MEM,
  116. }, {
  117. .start = CONFIG_USB_SL811_BFIN_IRQ,
  118. .end = CONFIG_USB_SL811_BFIN_IRQ,
  119. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  120. },
  121. };
  122. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  123. void sl811_port_power(struct device *dev, int is_on)
  124. {
  125. gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
  126. gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
  127. }
  128. #endif
  129. static struct sl811_platform_data sl811_priv = {
  130. .potpg = 10,
  131. .power = 250, /* == 500mA */
  132. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  133. .port_power = &sl811_port_power,
  134. #endif
  135. };
  136. static struct platform_device sl811_hcd_device = {
  137. .name = "sl811-hcd",
  138. .id = 0,
  139. .dev = {
  140. .platform_data = &sl811_priv,
  141. },
  142. .num_resources = ARRAY_SIZE(sl811_hcd_resources),
  143. .resource = sl811_hcd_resources,
  144. };
  145. #endif
  146. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  147. static struct resource isp1362_hcd_resources[] = {
  148. {
  149. .start = 0x20360000,
  150. .end = 0x20360000,
  151. .flags = IORESOURCE_MEM,
  152. }, {
  153. .start = 0x20360004,
  154. .end = 0x20360004,
  155. .flags = IORESOURCE_MEM,
  156. }, {
  157. .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
  158. .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
  159. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  160. },
  161. };
  162. static struct isp1362_platform_data isp1362_priv = {
  163. .sel15Kres = 1,
  164. .clknotstop = 0,
  165. .oc_enable = 0,
  166. .int_act_high = 0,
  167. .int_edge_triggered = 0,
  168. .remote_wakeup_connected = 0,
  169. .no_power_switching = 1,
  170. .power_switching_mode = 0,
  171. };
  172. static struct platform_device isp1362_hcd_device = {
  173. .name = "isp1362-hcd",
  174. .id = 0,
  175. .dev = {
  176. .platform_data = &isp1362_priv,
  177. },
  178. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  179. .resource = isp1362_hcd_resources,
  180. };
  181. #endif
  182. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  183. static struct platform_device bfin_mac_device = {
  184. .name = "bfin_mac",
  185. };
  186. #endif
  187. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  188. static struct resource net2272_bfin_resources[] = {
  189. {
  190. .start = 0x20300000,
  191. .end = 0x20300000 + 0x100,
  192. .flags = IORESOURCE_MEM,
  193. }, {
  194. .start = IRQ_PF7,
  195. .end = IRQ_PF7,
  196. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  197. },
  198. };
  199. static struct platform_device net2272_bfin_device = {
  200. .name = "net2272",
  201. .id = -1,
  202. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  203. .resource = net2272_bfin_resources,
  204. };
  205. #endif
  206. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  207. /* all SPI peripherals info goes here */
  208. #if defined(CONFIG_MTD_M25P80) \
  209. || defined(CONFIG_MTD_M25P80_MODULE)
  210. static struct mtd_partition bfin_spi_flash_partitions[] = {
  211. {
  212. .name = "bootloader(spi)",
  213. .size = 0x00020000,
  214. .offset = 0,
  215. .mask_flags = MTD_CAP_ROM
  216. }, {
  217. .name = "linux kernel(spi)",
  218. .size = 0xe0000,
  219. .offset = 0x20000
  220. }, {
  221. .name = "file system(spi)",
  222. .size = 0x700000,
  223. .offset = 0x00100000,
  224. }
  225. };
  226. static struct flash_platform_data bfin_spi_flash_data = {
  227. .name = "m25p80",
  228. .parts = bfin_spi_flash_partitions,
  229. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  230. .type = "m25p64",
  231. };
  232. /* SPI flash chip (m25p64) */
  233. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  234. .enable_dma = 0, /* use dma transfer with this chip*/
  235. .bits_per_word = 8,
  236. };
  237. #endif
  238. #if defined(CONFIG_SPI_ADC_BF533) \
  239. || defined(CONFIG_SPI_ADC_BF533_MODULE)
  240. /* SPI ADC chip */
  241. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  242. .enable_dma = 1, /* use dma transfer with this chip*/
  243. .bits_per_word = 16,
  244. };
  245. #endif
  246. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  247. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  248. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  249. .enable_dma = 0,
  250. .bits_per_word = 16,
  251. };
  252. #endif
  253. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  254. static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
  255. .enable_dma = 0,
  256. .bits_per_word = 16,
  257. };
  258. #endif
  259. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  260. static struct bfin5xx_spi_chip spi_mmc_chip_info = {
  261. .enable_dma = 1,
  262. .bits_per_word = 8,
  263. };
  264. #endif
  265. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  266. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  267. .cs_change_per_word = 0,
  268. .enable_dma = 0,
  269. .bits_per_word = 16,
  270. };
  271. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  272. .model = 7877,
  273. .vref_delay_usecs = 50, /* internal, no capacitor */
  274. .x_plate_ohms = 419,
  275. .y_plate_ohms = 486,
  276. .pressure_max = 1000,
  277. .pressure_min = 0,
  278. .stopacq_polarity = 1,
  279. .first_conversion_delay = 3,
  280. .acquisition_time = 1,
  281. .averaging = 1,
  282. .pen_down_acc_interval = 1,
  283. };
  284. #endif
  285. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  286. #if defined(CONFIG_MTD_M25P80) \
  287. || defined(CONFIG_MTD_M25P80_MODULE)
  288. {
  289. /* the modalias must be the same as spi device driver name */
  290. .modalias = "m25p80", /* Name of spi_driver for this device */
  291. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  292. .bus_num = 0, /* Framework bus number */
  293. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  294. .platform_data = &bfin_spi_flash_data,
  295. .controller_data = &spi_flash_chip_info,
  296. .mode = SPI_MODE_3,
  297. },
  298. #endif
  299. #if defined(CONFIG_SPI_ADC_BF533) \
  300. || defined(CONFIG_SPI_ADC_BF533_MODULE)
  301. {
  302. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  303. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  304. .bus_num = 0, /* Framework bus number */
  305. .chip_select = 1, /* Framework chip select. */
  306. .platform_data = NULL, /* No spi_driver specific config */
  307. .controller_data = &spi_adc_chip_info,
  308. },
  309. #endif
  310. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  311. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  312. {
  313. .modalias = "ad1836-spi",
  314. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  315. .bus_num = 0,
  316. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  317. .controller_data = &ad1836_spi_chip_info,
  318. },
  319. #endif
  320. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  321. {
  322. .modalias = "ad9960-spi",
  323. .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
  324. .bus_num = 0,
  325. .chip_select = 1,
  326. .controller_data = &ad9960_spi_chip_info,
  327. },
  328. #endif
  329. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  330. {
  331. .modalias = "spi_mmc_dummy",
  332. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  333. .bus_num = 0,
  334. .chip_select = 7,
  335. .platform_data = NULL,
  336. .controller_data = &spi_mmc_chip_info,
  337. .mode = SPI_MODE_3,
  338. },
  339. {
  340. .modalias = "spi_mmc",
  341. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  342. .bus_num = 0,
  343. .chip_select = CONFIG_SPI_MMC_CS_CHAN,
  344. .platform_data = NULL,
  345. .controller_data = &spi_mmc_chip_info,
  346. .mode = SPI_MODE_3,
  347. },
  348. #endif
  349. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  350. {
  351. .modalias = "ad7877",
  352. .platform_data = &bfin_ad7877_ts_info,
  353. .irq = IRQ_PF2,
  354. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  355. .bus_num = 0,
  356. .chip_select = 5,
  357. .controller_data = &spi_ad7877_chip_info,
  358. },
  359. #endif
  360. };
  361. /* SPI (0) */
  362. static struct resource bfin_spi0_resource[] = {
  363. [0] = {
  364. .start = SPI0_REGBASE,
  365. .end = SPI0_REGBASE + 0xFF,
  366. .flags = IORESOURCE_MEM,
  367. },
  368. [1] = {
  369. .start = CH_SPI,
  370. .end = CH_SPI,
  371. .flags = IORESOURCE_IRQ,
  372. }
  373. };
  374. /* SPI controller data */
  375. static struct bfin5xx_spi_master bfin_spi0_info = {
  376. .num_chipselect = 8,
  377. .enable_dma = 1, /* master has the ability to do dma transfer */
  378. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  379. };
  380. static struct platform_device bfin_spi0_device = {
  381. .name = "bfin-spi",
  382. .id = 0, /* Bus number */
  383. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  384. .resource = bfin_spi0_resource,
  385. .dev = {
  386. .platform_data = &bfin_spi0_info, /* Passed to driver */
  387. },
  388. };
  389. #endif /* spi master and devices */
  390. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  391. static struct platform_device bfin_fb_device = {
  392. .name = "bf537-lq035",
  393. };
  394. #endif
  395. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  396. static struct resource bfin_uart_resources[] = {
  397. {
  398. .start = 0xFFC00400,
  399. .end = 0xFFC004FF,
  400. .flags = IORESOURCE_MEM,
  401. }, {
  402. .start = 0xFFC02000,
  403. .end = 0xFFC020FF,
  404. .flags = IORESOURCE_MEM,
  405. },
  406. };
  407. static struct platform_device bfin_uart_device = {
  408. .name = "bfin-uart",
  409. .id = 1,
  410. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  411. .resource = bfin_uart_resources,
  412. };
  413. #endif
  414. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  415. static struct resource bfin_sir_resources[] = {
  416. #ifdef CONFIG_BFIN_SIR0
  417. {
  418. .start = 0xFFC00400,
  419. .end = 0xFFC004FF,
  420. .flags = IORESOURCE_MEM,
  421. },
  422. #endif
  423. #ifdef CONFIG_BFIN_SIR1
  424. {
  425. .start = 0xFFC02000,
  426. .end = 0xFFC020FF,
  427. .flags = IORESOURCE_MEM,
  428. },
  429. #endif
  430. };
  431. static struct platform_device bfin_sir_device = {
  432. .name = "bfin_sir",
  433. .id = 0,
  434. .num_resources = ARRAY_SIZE(bfin_sir_resources),
  435. .resource = bfin_sir_resources,
  436. };
  437. #endif
  438. static struct platform_device *stamp_devices[] __initdata = {
  439. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  440. &bfin_pcmcia_cf_device,
  441. #endif
  442. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  443. &rtc_device,
  444. #endif
  445. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  446. &sl811_hcd_device,
  447. #endif
  448. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  449. &isp1362_hcd_device,
  450. #endif
  451. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  452. &smc91x_device,
  453. #endif
  454. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  455. &bfin_mac_device,
  456. #endif
  457. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  458. &net2272_bfin_device,
  459. #endif
  460. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  461. &bfin_spi0_device,
  462. #endif
  463. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  464. &bfin_fb_device,
  465. #endif
  466. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  467. &bfin_uart_device,
  468. #endif
  469. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  470. &bfin_sir_device,
  471. #endif
  472. };
  473. static int __init stamp_init(void)
  474. {
  475. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  476. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  477. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  478. spi_register_board_info(bfin_spi_board_info,
  479. ARRAY_SIZE(bfin_spi_board_info));
  480. #endif
  481. return 0;
  482. }
  483. arch_initcall(stamp_init);
  484. void bfin_get_ether_addr(char *addr)
  485. {
  486. random_ether_addr(addr);
  487. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  488. }
  489. EXPORT_SYMBOL(bfin_get_ether_addr);