minotaur.c 8.3 KB

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  1. /*
  2. */
  3. #include <linux/device.h>
  4. #include <linux/platform_device.h>
  5. #include <linux/mtd/mtd.h>
  6. #include <linux/mtd/partitions.h>
  7. #include <linux/spi/spi.h>
  8. #include <linux/spi/flash.h>
  9. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  10. #include <linux/usb/isp1362.h>
  11. #endif
  12. #include <linux/ata_platform.h>
  13. #include <linux/irq.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/usb/sl811.h>
  16. #include <asm/dma.h>
  17. #include <asm/bfin5xx_spi.h>
  18. #include <asm/reboot.h>
  19. #include <linux/spi/ad7877.h>
  20. /*
  21. * Name the Board for the /proc/cpuinfo
  22. */
  23. char *bfin_board_name = "CamSig Minotaur BF537";
  24. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  25. static struct resource bfin_pcmcia_cf_resources[] = {
  26. {
  27. .start = 0x20310000, /* IO PORT */
  28. .end = 0x20312000,
  29. .flags = IORESOURCE_MEM,
  30. }, {
  31. .start = 0x20311000, /* Attribute Memory */
  32. .end = 0x20311FFF,
  33. .flags = IORESOURCE_MEM,
  34. }, {
  35. .start = IRQ_PF4,
  36. .end = IRQ_PF4,
  37. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  38. }, {
  39. .start = IRQ_PF6, /* Card Detect PF6 */
  40. .end = IRQ_PF6,
  41. .flags = IORESOURCE_IRQ,
  42. },
  43. };
  44. static struct platform_device bfin_pcmcia_cf_device = {
  45. .name = "bfin_cf_pcmcia",
  46. .id = -1,
  47. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  48. .resource = bfin_pcmcia_cf_resources,
  49. };
  50. #endif
  51. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  52. static struct platform_device rtc_device = {
  53. .name = "rtc-bfin",
  54. .id = -1,
  55. };
  56. #endif
  57. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  58. static struct platform_device bfin_mac_device = {
  59. .name = "bfin_mac",
  60. };
  61. #endif
  62. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  63. static struct resource net2272_bfin_resources[] = {
  64. {
  65. .start = 0x20300000,
  66. .end = 0x20300000 + 0x100,
  67. .flags = IORESOURCE_MEM,
  68. }, {
  69. .start = IRQ_PF7,
  70. .end = IRQ_PF7,
  71. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  72. },
  73. };
  74. static struct platform_device net2272_bfin_device = {
  75. .name = "net2272",
  76. .id = -1,
  77. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  78. .resource = net2272_bfin_resources,
  79. };
  80. #endif
  81. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  82. /* all SPI peripherals info goes here */
  83. #if defined(CONFIG_MTD_M25P80) \
  84. || defined(CONFIG_MTD_M25P80_MODULE)
  85. /* Partition sizes */
  86. #define FLASH_SIZE 0x00400000
  87. #define PSIZE_UBOOT 0x00030000
  88. #define PSIZE_INITRAMFS 0x00240000
  89. static struct mtd_partition bfin_spi_flash_partitions[] = {
  90. {
  91. .name = "bootloader(spi)",
  92. .size = PSIZE_UBOOT,
  93. .offset = 0x000000,
  94. .mask_flags = MTD_CAP_ROM
  95. }, {
  96. .name = "initramfs(spi)",
  97. .size = PSIZE_INITRAMFS,
  98. .offset = PSIZE_UBOOT
  99. }, {
  100. .name = "opt(spi)",
  101. .size = FLASH_SIZE - (PSIZE_UBOOT + PSIZE_INITRAMFS),
  102. .offset = PSIZE_UBOOT + PSIZE_INITRAMFS,
  103. }
  104. };
  105. static struct flash_platform_data bfin_spi_flash_data = {
  106. .name = "m25p80",
  107. .parts = bfin_spi_flash_partitions,
  108. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  109. .type = "m25p64",
  110. };
  111. /* SPI flash chip (m25p64) */
  112. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  113. .enable_dma = 0, /* use dma transfer with this chip*/
  114. .bits_per_word = 8,
  115. };
  116. #endif
  117. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  118. static struct bfin5xx_spi_chip spi_mmc_chip_info = {
  119. .enable_dma = 1,
  120. .bits_per_word = 8,
  121. };
  122. #endif
  123. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  124. #if defined(CONFIG_MTD_M25P80) \
  125. || defined(CONFIG_MTD_M25P80_MODULE)
  126. {
  127. /* the modalias must be the same as spi device driver name */
  128. .modalias = "m25p80", /* Name of spi_driver for this device */
  129. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  130. .bus_num = 0, /* Framework bus number */
  131. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  132. .platform_data = &bfin_spi_flash_data,
  133. .controller_data = &spi_flash_chip_info,
  134. .mode = SPI_MODE_3,
  135. },
  136. #endif
  137. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  138. {
  139. .modalias = "spi_mmc_dummy",
  140. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  141. .bus_num = 0,
  142. .chip_select = 0,
  143. .platform_data = NULL,
  144. .controller_data = &spi_mmc_chip_info,
  145. .mode = SPI_MODE_3,
  146. },
  147. {
  148. .modalias = "spi_mmc",
  149. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  150. .bus_num = 0,
  151. .chip_select = CONFIG_SPI_MMC_CS_CHAN,
  152. .platform_data = NULL,
  153. .controller_data = &spi_mmc_chip_info,
  154. .mode = SPI_MODE_3,
  155. },
  156. #endif
  157. };
  158. /* SPI controller data */
  159. static struct bfin5xx_spi_master bfin_spi0_info = {
  160. .num_chipselect = 8,
  161. .enable_dma = 1, /* master has the ability to do dma transfer */
  162. };
  163. /* SPI (0) */
  164. static struct resource bfin_spi0_resource[] = {
  165. [0] = {
  166. .start = SPI0_REGBASE,
  167. .end = SPI0_REGBASE + 0xFF,
  168. .flags = IORESOURCE_MEM,
  169. },
  170. [1] = {
  171. .start = CH_SPI,
  172. .end = CH_SPI,
  173. .flags = IORESOURCE_IRQ,
  174. },
  175. };
  176. static struct platform_device bfin_spi0_device = {
  177. .name = "bfin-spi",
  178. .id = 0, /* Bus number */
  179. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  180. .resource = bfin_spi0_resource,
  181. .dev = {
  182. .platform_data = &bfin_spi0_info, /* Passed to driver */
  183. },
  184. };
  185. #endif /* spi master and devices */
  186. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  187. static struct resource bfin_uart_resources[] = {
  188. {
  189. .start = 0xFFC00400,
  190. .end = 0xFFC004FF,
  191. .flags = IORESOURCE_MEM,
  192. }, {
  193. .start = 0xFFC02000,
  194. .end = 0xFFC020FF,
  195. .flags = IORESOURCE_MEM,
  196. },
  197. };
  198. static struct platform_device bfin_uart_device = {
  199. .name = "bfin-uart",
  200. .id = 1,
  201. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  202. .resource = bfin_uart_resources,
  203. };
  204. #endif
  205. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  206. static struct resource bfin_sir_resources[] = {
  207. #ifdef CONFIG_BFIN_SIR0
  208. {
  209. .start = 0xFFC00400,
  210. .end = 0xFFC004FF,
  211. .flags = IORESOURCE_MEM,
  212. },
  213. #endif
  214. #ifdef CONFIG_BFIN_SIR1
  215. {
  216. .start = 0xFFC02000,
  217. .end = 0xFFC020FF,
  218. .flags = IORESOURCE_MEM,
  219. },
  220. #endif
  221. };
  222. static struct platform_device bfin_sir_device = {
  223. .name = "bfin_sir",
  224. .id = 0,
  225. .num_resources = ARRAY_SIZE(bfin_sir_resources),
  226. .resource = bfin_sir_resources,
  227. };
  228. #endif
  229. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  230. static struct resource bfin_twi0_resource[] = {
  231. [0] = {
  232. .start = TWI0_REGBASE,
  233. .end = TWI0_REGBASE + 0xFF,
  234. .flags = IORESOURCE_MEM,
  235. },
  236. [1] = {
  237. .start = IRQ_TWI,
  238. .end = IRQ_TWI,
  239. .flags = IORESOURCE_IRQ,
  240. },
  241. };
  242. static struct platform_device i2c_bfin_twi_device = {
  243. .name = "i2c-bfin-twi",
  244. .id = 0,
  245. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  246. .resource = bfin_twi0_resource,
  247. };
  248. #endif
  249. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  250. static struct platform_device bfin_sport0_uart_device = {
  251. .name = "bfin-sport-uart",
  252. .id = 0,
  253. };
  254. static struct platform_device bfin_sport1_uart_device = {
  255. .name = "bfin-sport-uart",
  256. .id = 1,
  257. };
  258. #endif
  259. static struct platform_device *minotaur_devices[] __initdata = {
  260. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  261. &bfin_pcmcia_cf_device,
  262. #endif
  263. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  264. &rtc_device,
  265. #endif
  266. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  267. &bfin_mac_device,
  268. #endif
  269. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  270. &net2272_bfin_device,
  271. #endif
  272. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  273. &bfin_spi0_device,
  274. #endif
  275. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  276. &bfin_uart_device,
  277. #endif
  278. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  279. &bfin_sir_device,
  280. #endif
  281. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  282. &i2c_bfin_twi_device,
  283. #endif
  284. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  285. &bfin_sport0_uart_device,
  286. &bfin_sport1_uart_device,
  287. #endif
  288. };
  289. static int __init minotaur_init(void)
  290. {
  291. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  292. platform_add_devices(minotaur_devices, ARRAY_SIZE(minotaur_devices));
  293. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  294. spi_register_board_info(bfin_spi_board_info,
  295. ARRAY_SIZE(bfin_spi_board_info));
  296. #endif
  297. return 0;
  298. }
  299. arch_initcall(minotaur_init);
  300. void native_machine_restart(char *cmd)
  301. {
  302. /* workaround reboot hang when booting from SPI */
  303. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  304. bfin_gpio_reset_spi0_ssel1();
  305. }