H8606.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449
  1. /*
  2. * File: arch/blackfin/mach-bf533/H8606.c
  3. * Based on: arch/blackfin/mach-bf533/stamp.c
  4. * Author: Javier Herrero <jherrero@hvsistemas.es>
  5. *
  6. * Created: 2007
  7. * Description: Board Info File for the HV Sistemas H8606 board
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2006 Analog Devices Inc
  12. * Copyright 2007 HV Sistemas S.L.
  13. *
  14. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful,
  22. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  24. * GNU General Public License for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, see the file COPYING, or write
  28. * to the Free Software Foundation, Inc.,
  29. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  30. */
  31. #include <linux/device.h>
  32. #include <linux/platform_device.h>
  33. #include <linux/mtd/mtd.h>
  34. #include <linux/mtd/partitions.h>
  35. #include <linux/spi/spi.h>
  36. #include <linux/spi/flash.h>
  37. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  38. #include <linux/usb/isp1362.h>
  39. #endif
  40. #include <linux/irq.h>
  41. #include <asm/dma.h>
  42. #include <asm/bfin5xx_spi.h>
  43. #include <asm/reboot.h>
  44. #include <asm/portmux.h>
  45. /*
  46. * Name the Board for the /proc/cpuinfo
  47. */
  48. const char bfin_board_name[] = "HV Sistemas H8606";
  49. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  50. static struct platform_device rtc_device = {
  51. .name = "rtc-bfin",
  52. .id = -1,
  53. };
  54. #endif
  55. /*
  56. * Driver needs to know address, irq and flag pin.
  57. */
  58. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  59. static struct resource dm9000_resources[] = {
  60. [0] = {
  61. .start = 0x20300000,
  62. .end = 0x20300000 + 1,
  63. .flags = IORESOURCE_MEM,
  64. },
  65. [1] = {
  66. .start = 0x20300000 + 4,
  67. .end = 0x20300000 + 5,
  68. .flags = IORESOURCE_MEM,
  69. },
  70. [2] = {
  71. .start = IRQ_PF10,
  72. .end = IRQ_PF10,
  73. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  74. },
  75. };
  76. static struct platform_device dm9000_device = {
  77. .id = 0,
  78. .name = "dm9000",
  79. .resource = dm9000_resources,
  80. .num_resources = ARRAY_SIZE(dm9000_resources),
  81. };
  82. #endif
  83. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  84. static struct resource smc91x_resources[] = {
  85. {
  86. .name = "smc91x-regs",
  87. .start = 0x20300300,
  88. .end = 0x20300300 + 16,
  89. .flags = IORESOURCE_MEM,
  90. }, {
  91. .start = IRQ_PROG_INTB,
  92. .end = IRQ_PROG_INTB,
  93. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  94. }, {
  95. .start = IRQ_PF7,
  96. .end = IRQ_PF7,
  97. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  98. },
  99. };
  100. static struct platform_device smc91x_device = {
  101. .name = "smc91x",
  102. .id = 0,
  103. .num_resources = ARRAY_SIZE(smc91x_resources),
  104. .resource = smc91x_resources,
  105. };
  106. #endif
  107. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  108. static struct resource net2272_bfin_resources[] = {
  109. {
  110. .start = 0x20300000,
  111. .end = 0x20300000 + 0x100,
  112. .flags = IORESOURCE_MEM,
  113. }, {
  114. .start = IRQ_PF10,
  115. .end = IRQ_PF10,
  116. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  117. },
  118. };
  119. static struct platform_device net2272_bfin_device = {
  120. .name = "net2272",
  121. .id = -1,
  122. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  123. .resource = net2272_bfin_resources,
  124. };
  125. #endif
  126. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  127. /* all SPI peripherals info goes here */
  128. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  129. static struct mtd_partition bfin_spi_flash_partitions[] = {
  130. {
  131. .name = "bootloader(spi)",
  132. .size = 0x00060000,
  133. .offset = 0,
  134. .mask_flags = MTD_CAP_ROM
  135. }, {
  136. .name = "linux kernel(spi)",
  137. .size = 0x100000,
  138. .offset = 0x60000
  139. }, {
  140. .name = "file system(spi)",
  141. .size = 0x6a0000,
  142. .offset = 0x00160000,
  143. }
  144. };
  145. static struct flash_platform_data bfin_spi_flash_data = {
  146. .name = "m25p80",
  147. .parts = bfin_spi_flash_partitions,
  148. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  149. .type = "m25p64",
  150. };
  151. /* SPI flash chip (m25p64) */
  152. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  153. .enable_dma = 0, /* use dma transfer with this chip*/
  154. .bits_per_word = 8,
  155. };
  156. #endif
  157. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  158. /* SPI ADC chip */
  159. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  160. .ctl_reg = 0x1000,
  161. .enable_dma = 1, /* use dma transfer with this chip*/
  162. .bits_per_word = 16,
  163. };
  164. #endif
  165. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  166. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  167. .ctl_reg = 0x1000,
  168. .enable_dma = 0,
  169. .bits_per_word = 16,
  170. };
  171. #endif
  172. #if defined(CONFIG_PBX)
  173. static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
  174. .ctl_reg = 0x1c04,
  175. .enable_dma = 0,
  176. .bits_per_word = 8,
  177. .cs_change_per_word = 1,
  178. };
  179. #endif
  180. /* Notice: for blackfin, the speed_hz is the value of register
  181. * SPI_BAUD, not the real baudrate */
  182. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  183. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  184. {
  185. /* the modalias must be the same as spi device driver name */
  186. .modalias = "m25p80", /* Name of spi_driver for this device */
  187. /* this value is the baudrate divisor */
  188. .max_speed_hz = 50000000, /* actual baudrate is SCLK/(2xspeed_hz) */
  189. .bus_num = 0, /* Framework bus number */
  190. .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
  191. .platform_data = &bfin_spi_flash_data,
  192. .controller_data = &spi_flash_chip_info,
  193. .mode = SPI_MODE_3,
  194. },
  195. #endif
  196. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  197. {
  198. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  199. .max_speed_hz = 4, /* actual baudrate is SCLK/(2xspeed_hz) */
  200. .bus_num = 1, /* Framework bus number */
  201. .chip_select = 1, /* Framework chip select. */
  202. .platform_data = NULL, /* No spi_driver specific config */
  203. .controller_data = &spi_adc_chip_info,
  204. },
  205. #endif
  206. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  207. {
  208. .modalias = "ad1836-spi",
  209. .max_speed_hz = 16,
  210. .bus_num = 1,
  211. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  212. .controller_data = &ad1836_spi_chip_info,
  213. },
  214. #endif
  215. #if defined(CONFIG_PBX)
  216. {
  217. .modalias = "fxs-spi",
  218. .max_speed_hz = 4,
  219. .bus_num = 1,
  220. .chip_select = 3,
  221. .controller_data = &spi_si3xxx_chip_info,
  222. },
  223. {
  224. .modalias = "fxo-spi",
  225. .max_speed_hz = 4,
  226. .bus_num = 1,
  227. .chip_select = 2,
  228. .controller_data = &spi_si3xxx_chip_info,
  229. },
  230. #endif
  231. };
  232. /* SPI (0) */
  233. static struct resource bfin_spi0_resource[] = {
  234. [0] = {
  235. .start = SPI0_REGBASE,
  236. .end = SPI0_REGBASE + 0xFF,
  237. .flags = IORESOURCE_MEM,
  238. },
  239. [1] = {
  240. .start = CH_SPI,
  241. .end = CH_SPI,
  242. .flags = IORESOURCE_IRQ,
  243. }
  244. };
  245. /* SPI controller data */
  246. static struct bfin5xx_spi_master bfin_spi0_info = {
  247. .num_chipselect = 8,
  248. .enable_dma = 1, /* master has the ability to do dma transfer */
  249. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  250. };
  251. static struct platform_device bfin_spi0_device = {
  252. .name = "bfin-spi",
  253. .id = 0, /* Bus number */
  254. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  255. .resource = bfin_spi0_resource,
  256. .dev = {
  257. .platform_data = &bfin_spi0_info, /* Passed to driver */
  258. },
  259. };
  260. #endif /* spi master and devices */
  261. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  262. static struct platform_device bfin_fb_device = {
  263. .name = "bf537-fb",
  264. };
  265. #endif
  266. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  267. static struct resource bfin_uart_resources[] = {
  268. {
  269. .start = 0xFFC00400,
  270. .end = 0xFFC004FF,
  271. .flags = IORESOURCE_MEM,
  272. },
  273. };
  274. static struct platform_device bfin_uart_device = {
  275. .name = "bfin-uart",
  276. .id = 1,
  277. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  278. .resource = bfin_uart_resources,
  279. };
  280. #endif
  281. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  282. static struct resource bfin_sir_resources[] = {
  283. #ifdef CONFIG_BFIN_SIR0
  284. {
  285. .start = 0xFFC00400,
  286. .end = 0xFFC004FF,
  287. .flags = IORESOURCE_MEM,
  288. },
  289. #endif
  290. };
  291. static struct platform_device bfin_sir_device = {
  292. .name = "bfin_sir",
  293. .id = 0,
  294. .num_resources = ARRAY_SIZE(bfin_sir_resources),
  295. .resource = bfin_sir_resources,
  296. };
  297. #endif
  298. #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
  299. #include <linux/serial_8250.h>
  300. #include <linux/serial.h>
  301. /*
  302. * Configuration for two 16550 UARTS in FPGA at addresses 0x20200000 and 0x202000010.
  303. * running at half system clock, both with interrupt output or-ed to PF8. Change to
  304. * suit different FPGA configuration, or to suit real 16550 UARTS connected to the bus
  305. */
  306. static struct plat_serial8250_port serial8250_platform_data [] = {
  307. {
  308. .membase = 0x20200000,
  309. .mapbase = 0x20200000,
  310. .irq = IRQ_PF8,
  311. .flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
  312. .iotype = UPIO_MEM,
  313. .regshift = 1,
  314. .uartclk = 66666667,
  315. }, {
  316. .membase = 0x20200010,
  317. .mapbase = 0x20200010,
  318. .irq = IRQ_PF8,
  319. .flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
  320. .iotype = UPIO_MEM,
  321. .regshift = 1,
  322. .uartclk = 66666667,
  323. }, {
  324. }
  325. };
  326. static struct platform_device serial8250_device = {
  327. .id = PLAT8250_DEV_PLATFORM,
  328. .name = "serial8250",
  329. .dev = {
  330. .platform_data = serial8250_platform_data,
  331. },
  332. };
  333. #endif
  334. #if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
  335. /*
  336. * Configuration for one OpenCores keyboard controller in FPGA at address 0x20200030,
  337. * interrupt output wired to PF9. Change to suit different FPGA configuration
  338. */
  339. static struct resource opencores_kbd_resources[] = {
  340. [0] = {
  341. .start = 0x20200030,
  342. .end = 0x20300030 + 2,
  343. .flags = IORESOURCE_MEM,
  344. },
  345. [1] = {
  346. .start = IRQ_PF9,
  347. .end = IRQ_PF9,
  348. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  349. },
  350. };
  351. static struct platform_device opencores_kbd_device = {
  352. .id = -1,
  353. .name = "opencores-kbd",
  354. .resource = opencores_kbd_resources,
  355. .num_resources = ARRAY_SIZE(opencores_kbd_resources),
  356. };
  357. #endif
  358. static struct platform_device *h8606_devices[] __initdata = {
  359. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  360. &rtc_device,
  361. #endif
  362. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  363. &dm9000_device,
  364. #endif
  365. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  366. &smc91x_device,
  367. #endif
  368. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  369. &net2272_bfin_device,
  370. #endif
  371. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  372. &bfin_spi0_device,
  373. #endif
  374. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  375. &bfin_uart_device,
  376. #endif
  377. #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
  378. &serial8250_device,
  379. #endif
  380. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  381. &bfin_sir_device,
  382. #endif
  383. #if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
  384. &opencores_kbd_device,
  385. #endif
  386. };
  387. static int __init H8606_init(void)
  388. {
  389. printk(KERN_INFO "HV Sistemas H8606 board support by http://www.hvsistemas.com\n");
  390. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  391. platform_add_devices(h8606_devices, ARRAY_SIZE(h8606_devices));
  392. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  393. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  394. #endif
  395. return 0;
  396. }
  397. arch_initcall(H8606_init);