kgdb.h 4.1 KB

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  1. /*
  2. * File: include/asm-blackfin/kgdb.h
  3. * Based on:
  4. * Author: Sonic Zhang
  5. *
  6. * Created:
  7. * Description:
  8. *
  9. * Rev: $Id: kgdb_bfin_linux-2.6.x.patch 4934 2007-02-13 09:32:11Z sonicz $
  10. *
  11. * Modified:
  12. * Copyright 2005-2006 Analog Devices Inc.
  13. *
  14. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful,
  22. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  24. * GNU General Public License for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, see the file COPYING, or write
  28. * to the Free Software Foundation, Inc.,
  29. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  30. */
  31. #ifndef __ASM_BLACKFIN_KGDB_H__
  32. #define __ASM_BLACKFIN_KGDB_H__
  33. #include <linux/ptrace.h>
  34. /* gdb locks */
  35. #define KGDB_MAX_NO_CPUS 8
  36. /************************************************************************/
  37. /* BUFMAX defines the maximum number of characters in inbound/outbound buffers*/
  38. /* at least NUMREGBYTES*2 are needed for register packets */
  39. /* Longer buffer is needed to list all threads */
  40. #define BUFMAX 2048
  41. /*
  42. * Note that this register image is different from
  43. * the register image that Linux produces at interrupt time.
  44. *
  45. * Linux's register image is defined by struct pt_regs in ptrace.h.
  46. */
  47. enum regnames {
  48. /* Core Registers */
  49. BFIN_R0 = 0,
  50. BFIN_R1,
  51. BFIN_R2,
  52. BFIN_R3,
  53. BFIN_R4,
  54. BFIN_R5,
  55. BFIN_R6,
  56. BFIN_R7,
  57. BFIN_P0,
  58. BFIN_P1,
  59. BFIN_P2,
  60. BFIN_P3,
  61. BFIN_P4,
  62. BFIN_P5,
  63. BFIN_SP,
  64. BFIN_FP,
  65. BFIN_I0,
  66. BFIN_I1,
  67. BFIN_I2,
  68. BFIN_I3,
  69. BFIN_M0,
  70. BFIN_M1,
  71. BFIN_M2,
  72. BFIN_M3,
  73. BFIN_B0,
  74. BFIN_B1,
  75. BFIN_B2,
  76. BFIN_B3,
  77. BFIN_L0,
  78. BFIN_L1,
  79. BFIN_L2,
  80. BFIN_L3,
  81. BFIN_A0_DOT_X,
  82. BFIN_A0_DOT_W,
  83. BFIN_A1_DOT_X,
  84. BFIN_A1_DOT_W,
  85. BFIN_ASTAT,
  86. BFIN_RETS,
  87. BFIN_LC0,
  88. BFIN_LT0,
  89. BFIN_LB0,
  90. BFIN_LC1,
  91. BFIN_LT1,
  92. BFIN_LB1,
  93. BFIN_CYCLES,
  94. BFIN_CYCLES2,
  95. BFIN_USP,
  96. BFIN_SEQSTAT,
  97. BFIN_SYSCFG,
  98. BFIN_RETI,
  99. BFIN_RETX,
  100. BFIN_RETN,
  101. BFIN_RETE,
  102. /* Pseudo Registers */
  103. BFIN_PC,
  104. BFIN_CC,
  105. BFIN_EXTRA1, /* Address of .text section. */
  106. BFIN_EXTRA2, /* Address of .data section. */
  107. BFIN_EXTRA3, /* Address of .bss section. */
  108. BFIN_FDPIC_EXEC,
  109. BFIN_FDPIC_INTERP,
  110. /* MMRs */
  111. BFIN_IPEND,
  112. /* LAST ENTRY SHOULD NOT BE CHANGED. */
  113. BFIN_NUM_REGS /* The number of all registers. */
  114. };
  115. /* Number of bytes of registers. */
  116. #define NUMREGBYTES BFIN_NUM_REGS*4
  117. #define BREAKPOINT() asm(" EXCPT 2;");
  118. #define BREAK_INSTR_SIZE 2
  119. #define HW_BREAKPOINT_NUM 6
  120. /* Instruction watchpoint address control register bits mask */
  121. #define WPPWR 0x1
  122. #define WPIREN01 0x2
  123. #define WPIRINV01 0x4
  124. #define WPIAEN0 0x8
  125. #define WPIAEN1 0x10
  126. #define WPICNTEN0 0x20
  127. #define WPICNTEN1 0x40
  128. #define EMUSW0 0x80
  129. #define EMUSW1 0x100
  130. #define WPIREN23 0x200
  131. #define WPIRINV23 0x400
  132. #define WPIAEN2 0x800
  133. #define WPIAEN3 0x1000
  134. #define WPICNTEN2 0x2000
  135. #define WPICNTEN3 0x4000
  136. #define EMUSW2 0x8000
  137. #define EMUSW3 0x10000
  138. #define WPIREN45 0x20000
  139. #define WPIRINV45 0x40000
  140. #define WPIAEN4 0x80000
  141. #define WPIAEN5 0x100000
  142. #define WPICNTEN4 0x200000
  143. #define WPICNTEN5 0x400000
  144. #define EMUSW4 0x800000
  145. #define EMUSW5 0x1000000
  146. #define WPAND 0x2000000
  147. /* Data watchpoint address control register bits mask */
  148. #define WPDREN01 0x1
  149. #define WPDRINV01 0x2
  150. #define WPDAEN0 0x4
  151. #define WPDAEN1 0x8
  152. #define WPDCNTEN0 0x10
  153. #define WPDCNTEN1 0x20
  154. #define WPDSRC0 0xc0
  155. #define WPDACC0 0x300
  156. #define WPDSRC1 0xc00
  157. #define WPDACC1 0x3000
  158. /* Watchpoint status register bits mask */
  159. #define STATIA0 0x1
  160. #define STATIA1 0x2
  161. #define STATIA2 0x4
  162. #define STATIA3 0x8
  163. #define STATIA4 0x10
  164. #define STATIA5 0x20
  165. #define STATDA0 0x40
  166. #define STATDA1 0x80
  167. extern void kgdb_print(const char *fmt, ...);
  168. extern void init_kgdb_uart(void);
  169. #endif