usb.h 4.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141
  1. // include/asm-arm/mach-omap/usb.h
  2. #ifndef __ASM_ARCH_OMAP_USB_H
  3. #define __ASM_ARCH_OMAP_USB_H
  4. #include <mach/board.h>
  5. /*-------------------------------------------------------------------------*/
  6. #define OMAP1_OTG_BASE 0xfffb0400
  7. #define OMAP1_UDC_BASE 0xfffb4000
  8. #define OMAP1_OHCI_BASE 0xfffba000
  9. #define OMAP2_OHCI_BASE 0x4805e000
  10. #define OMAP2_UDC_BASE 0x4805e200
  11. #define OMAP2_OTG_BASE 0x4805e300
  12. #ifdef CONFIG_ARCH_OMAP1
  13. #define OTG_BASE OMAP1_OTG_BASE
  14. #define UDC_BASE OMAP1_UDC_BASE
  15. #define OMAP_OHCI_BASE OMAP1_OHCI_BASE
  16. #else
  17. #define OTG_BASE OMAP2_OTG_BASE
  18. #define UDC_BASE OMAP2_UDC_BASE
  19. #define OMAP_OHCI_BASE OMAP2_OHCI_BASE
  20. #endif
  21. /*-------------------------------------------------------------------------*/
  22. /*
  23. * OTG and transceiver registers, for OMAPs starting with ARM926
  24. */
  25. #define OTG_REV (OTG_BASE + 0x00)
  26. #define OTG_SYSCON_1 (OTG_BASE + 0x04)
  27. # define USB2_TRX_MODE(w) (((w)>>24)&0x07)
  28. # define USB1_TRX_MODE(w) (((w)>>20)&0x07)
  29. # define USB0_TRX_MODE(w) (((w)>>16)&0x07)
  30. # define OTG_IDLE_EN (1 << 15)
  31. # define HST_IDLE_EN (1 << 14)
  32. # define DEV_IDLE_EN (1 << 13)
  33. # define OTG_RESET_DONE (1 << 2)
  34. # define OTG_SOFT_RESET (1 << 1)
  35. #define OTG_SYSCON_2 (OTG_BASE + 0x08)
  36. # define OTG_EN (1 << 31)
  37. # define USBX_SYNCHRO (1 << 30)
  38. # define OTG_MST16 (1 << 29)
  39. # define SRP_GPDATA (1 << 28)
  40. # define SRP_GPDVBUS (1 << 27)
  41. # define SRP_GPUVBUS(w) (((w)>>24)&0x07)
  42. # define A_WAIT_VRISE(w) (((w)>>20)&0x07)
  43. # define B_ASE_BRST(w) (((w)>>16)&0x07)
  44. # define SRP_DPW (1 << 14)
  45. # define SRP_DATA (1 << 13)
  46. # define SRP_VBUS (1 << 12)
  47. # define OTG_PADEN (1 << 10)
  48. # define HMC_PADEN (1 << 9)
  49. # define UHOST_EN (1 << 8)
  50. # define HMC_TLLSPEED (1 << 7)
  51. # define HMC_TLLATTACH (1 << 6)
  52. # define OTG_HMC(w) (((w)>>0)&0x3f)
  53. #define OTG_CTRL (OTG_BASE + 0x0c)
  54. # define OTG_USB2_EN (1 << 29)
  55. # define OTG_USB2_DP (1 << 28)
  56. # define OTG_USB2_DM (1 << 27)
  57. # define OTG_USB1_EN (1 << 26)
  58. # define OTG_USB1_DP (1 << 25)
  59. # define OTG_USB1_DM (1 << 24)
  60. # define OTG_USB0_EN (1 << 23)
  61. # define OTG_USB0_DP (1 << 22)
  62. # define OTG_USB0_DM (1 << 21)
  63. # define OTG_ASESSVLD (1 << 20)
  64. # define OTG_BSESSEND (1 << 19)
  65. # define OTG_BSESSVLD (1 << 18)
  66. # define OTG_VBUSVLD (1 << 17)
  67. # define OTG_ID (1 << 16)
  68. # define OTG_DRIVER_SEL (1 << 15)
  69. # define OTG_A_SETB_HNPEN (1 << 12)
  70. # define OTG_A_BUSREQ (1 << 11)
  71. # define OTG_B_HNPEN (1 << 9)
  72. # define OTG_B_BUSREQ (1 << 8)
  73. # define OTG_BUSDROP (1 << 7)
  74. # define OTG_PULLDOWN (1 << 5)
  75. # define OTG_PULLUP (1 << 4)
  76. # define OTG_DRV_VBUS (1 << 3)
  77. # define OTG_PD_VBUS (1 << 2)
  78. # define OTG_PU_VBUS (1 << 1)
  79. # define OTG_PU_ID (1 << 0)
  80. #define OTG_IRQ_EN (OTG_BASE + 0x10) /* 16-bit */
  81. # define DRIVER_SWITCH (1 << 15)
  82. # define A_VBUS_ERR (1 << 13)
  83. # define A_REQ_TMROUT (1 << 12)
  84. # define A_SRP_DETECT (1 << 11)
  85. # define B_HNP_FAIL (1 << 10)
  86. # define B_SRP_TMROUT (1 << 9)
  87. # define B_SRP_DONE (1 << 8)
  88. # define B_SRP_STARTED (1 << 7)
  89. # define OPRT_CHG (1 << 0)
  90. #define OTG_IRQ_SRC (OTG_BASE + 0x14) /* 16-bit */
  91. // same bits as in IRQ_EN
  92. #define OTG_OUTCTRL (OTG_BASE + 0x18) /* 16-bit */
  93. # define OTGVPD (1 << 14)
  94. # define OTGVPU (1 << 13)
  95. # define OTGPUID (1 << 12)
  96. # define USB2VDR (1 << 10)
  97. # define USB2PDEN (1 << 9)
  98. # define USB2PUEN (1 << 8)
  99. # define USB1VDR (1 << 6)
  100. # define USB1PDEN (1 << 5)
  101. # define USB1PUEN (1 << 4)
  102. # define USB0VDR (1 << 2)
  103. # define USB0PDEN (1 << 1)
  104. # define USB0PUEN (1 << 0)
  105. #define OTG_TEST (OTG_BASE + 0x20) /* 16-bit */
  106. #define OTG_VENDOR_CODE (OTG_BASE + 0xfc) /* 16-bit */
  107. /*-------------------------------------------------------------------------*/
  108. /* OMAP1 */
  109. #define USB_TRANSCEIVER_CTRL (0xfffe1000 + 0x0064)
  110. # define CONF_USB2_UNI_R (1 << 8)
  111. # define CONF_USB1_UNI_R (1 << 7)
  112. # define CONF_USB_PORT0_R(x) (((x)>>4)&0x7)
  113. # define CONF_USB0_ISOLATE_R (1 << 3)
  114. # define CONF_USB_PWRDN_DM_R (1 << 2)
  115. # define CONF_USB_PWRDN_DP_R (1 << 1)
  116. /* OMAP2 */
  117. # define USB_UNIDIR 0x0
  118. # define USB_UNIDIR_TLL 0x1
  119. # define USB_BIDIR 0x2
  120. # define USB_BIDIR_TLL 0x3
  121. # define USBTXWRMODEI(port, x) ((x) << (22 - (port * 2)))
  122. # define USBT2TLL5PI (1 << 17)
  123. # define USB0PUENACTLOI (1 << 16)
  124. # define USBSTANDBYCTRL (1 << 15)
  125. #endif /* __ASM_ARCH_OMAP_USB_H */