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  1. /*
  2. NetWinder Floating Point Emulator
  3. (c) Rebel.COM, 1998
  4. (c) 1998, 1999 Philip Blundell
  5. Direct questions, comments to Scott Bambrough <scottb@netwinder.org>
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software
  16. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. /* This is the kernel's entry point into the floating point emulator.
  19. It is called from the kernel with code similar to this:
  20. sub r4, r5, #4
  21. ldrt r0, [r4] @ r0 = instruction
  22. adrsvc al, r9, ret_from_exception @ r9 = normal FP return
  23. adrsvc al, lr, fpundefinstr @ lr = undefined instr return
  24. get_current_task r10
  25. mov r8, #1
  26. strb r8, [r10, #TSK_USED_MATH] @ set current->used_math
  27. add r10, r10, #TSS_FPESAVE @ r10 = workspace
  28. ldr r4, .LC2
  29. ldr pc, [r4] @ Call FP emulator entry point
  30. The kernel expects the emulator to return via one of two possible
  31. points of return it passes to the emulator. The emulator, if
  32. successful in its emulation, jumps to ret_from_exception (passed in
  33. r9) and the kernel takes care of returning control from the trap to
  34. the user code. If the emulator is unable to emulate the instruction,
  35. it returns via _fpundefinstr (passed via lr) and the kernel halts the
  36. user program with a core dump.
  37. On entry to the emulator r10 points to an area of private FP workspace
  38. reserved in the thread structure for this process. This is where the
  39. emulator saves its registers across calls. The first word of this area
  40. is used as a flag to detect the first time a process uses floating point,
  41. so that the emulator startup cost can be avoided for tasks that don't
  42. want it.
  43. This routine does three things:
  44. 1) The kernel has created a struct pt_regs on the stack and saved the
  45. user registers into it. See /usr/include/asm/proc/ptrace.h for details.
  46. 2) It calls EmulateAll to emulate a floating point instruction.
  47. EmulateAll returns 1 if the emulation was successful, or 0 if not.
  48. 3) If an instruction has been emulated successfully, it looks ahead at
  49. the next instruction. If it is a floating point instruction, it
  50. executes the instruction, without returning to user space. In this
  51. way it repeatedly looks ahead and executes floating point instructions
  52. until it encounters a non floating point instruction, at which time it
  53. returns via _fpreturn.
  54. This is done to reduce the effect of the trap overhead on each
  55. floating point instructions. GCC attempts to group floating point
  56. instructions to allow the emulator to spread the cost of the trap over
  57. several floating point instructions. */
  58. #include <asm/asm-offsets.h>
  59. .globl nwfpe_enter
  60. nwfpe_enter:
  61. mov r4, lr @ save the failure-return addresses
  62. mov sl, sp @ we access the registers via 'sl'
  63. ldr r5, [sp, #S_PC] @ get contents of PC;
  64. mov r6, r0 @ save the opcode
  65. emulate:
  66. ldr r1, [sp, #S_PSR] @ fetch the PSR
  67. bl checkCondition @ check the condition
  68. cmp r0, #0 @ r0 = 0 ==> condition failed
  69. @ if condition code failed to match, next insn
  70. beq next @ get the next instruction;
  71. mov r0, r6 @ prepare for EmulateAll()
  72. bl EmulateAll @ emulate the instruction
  73. cmp r0, #0 @ was emulation successful
  74. moveq pc, r4 @ no, return failure
  75. next:
  76. .Lx1: ldrt r6, [r5], #4 @ get the next instruction and
  77. @ increment PC
  78. and r2, r6, #0x0F000000 @ test for FP insns
  79. teq r2, #0x0C000000
  80. teqne r2, #0x0D000000
  81. teqne r2, #0x0E000000
  82. movne pc, r9 @ return ok if not a fp insn
  83. str r5, [sp, #S_PC] @ update PC copy in regs
  84. mov r0, r6 @ save a copy
  85. b emulate @ check condition and emulate
  86. @ We need to be prepared for the instructions at .Lx1 and .Lx2
  87. @ to fault. Emit the appropriate exception gunk to fix things up.
  88. @ ??? For some reason, faults can happen at .Lx2 even with a
  89. @ plain LDR instruction. Weird, but it seems harmless.
  90. .section .fixup,"ax"
  91. .align 2
  92. .Lfix: mov pc, r9 @ let the user eat segfaults
  93. .previous
  94. .section __ex_table,"a"
  95. .align 3
  96. .long .Lx1, .Lfix
  97. .previous