mach-vr1000.c 9.3 KB

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  1. /* linux/arch/arm/mach-s3c2410/mach-vr1000.c
  2. *
  3. * Copyright (c) 2003-2005,2008 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * Machine support for Thorcom VR1000 board. Designed for Thorcom by
  7. * Simtec Electronics, http://www.simtec.co.uk/
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/types.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/list.h>
  18. #include <linux/timer.h>
  19. #include <linux/init.h>
  20. #include <linux/dm9000.h>
  21. #include <linux/i2c.h>
  22. #include <linux/serial.h>
  23. #include <linux/tty.h>
  24. #include <linux/serial_8250.h>
  25. #include <linux/serial_reg.h>
  26. #include <linux/io.h>
  27. #include <asm/mach/arch.h>
  28. #include <asm/mach/map.h>
  29. #include <asm/mach/irq.h>
  30. #include <mach/bast-map.h>
  31. #include <mach/vr1000-map.h>
  32. #include <mach/vr1000-irq.h>
  33. #include <mach/vr1000-cpld.h>
  34. #include <mach/hardware.h>
  35. #include <asm/irq.h>
  36. #include <asm/mach-types.h>
  37. #include <asm/plat-s3c/regs-serial.h>
  38. #include <mach/regs-gpio.h>
  39. #include <mach/leds-gpio.h>
  40. #include <asm/plat-s3c24xx/clock.h>
  41. #include <asm/plat-s3c24xx/devs.h>
  42. #include <asm/plat-s3c24xx/cpu.h>
  43. #include "usb-simtec.h"
  44. #include "nor-simtec.h"
  45. /* macros for virtual address mods for the io space entries */
  46. #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
  47. #define VA_C4(item) ((unsigned long)(item) + BAST_VAM_CS4)
  48. #define VA_C3(item) ((unsigned long)(item) + BAST_VAM_CS3)
  49. #define VA_C2(item) ((unsigned long)(item) + BAST_VAM_CS2)
  50. /* macros to modify the physical addresses for io space */
  51. #define PA_CS2(item) (__phys_to_pfn((item) + S3C2410_CS2))
  52. #define PA_CS3(item) (__phys_to_pfn((item) + S3C2410_CS3))
  53. #define PA_CS4(item) (__phys_to_pfn((item) + S3C2410_CS4))
  54. #define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5))
  55. static struct map_desc vr1000_iodesc[] __initdata = {
  56. /* ISA IO areas */
  57. {
  58. .virtual = (u32)S3C24XX_VA_ISA_BYTE,
  59. .pfn = PA_CS2(BAST_PA_ISAIO),
  60. .length = SZ_16M,
  61. .type = MT_DEVICE,
  62. }, {
  63. .virtual = (u32)S3C24XX_VA_ISA_WORD,
  64. .pfn = PA_CS3(BAST_PA_ISAIO),
  65. .length = SZ_16M,
  66. .type = MT_DEVICE,
  67. },
  68. /* CPLD control registers, and external interrupt controls */
  69. {
  70. .virtual = (u32)VR1000_VA_CTRL1,
  71. .pfn = __phys_to_pfn(VR1000_PA_CTRL1),
  72. .length = SZ_1M,
  73. .type = MT_DEVICE,
  74. }, {
  75. .virtual = (u32)VR1000_VA_CTRL2,
  76. .pfn = __phys_to_pfn(VR1000_PA_CTRL2),
  77. .length = SZ_1M,
  78. .type = MT_DEVICE,
  79. }, {
  80. .virtual = (u32)VR1000_VA_CTRL3,
  81. .pfn = __phys_to_pfn(VR1000_PA_CTRL3),
  82. .length = SZ_1M,
  83. .type = MT_DEVICE,
  84. }, {
  85. .virtual = (u32)VR1000_VA_CTRL4,
  86. .pfn = __phys_to_pfn(VR1000_PA_CTRL4),
  87. .length = SZ_1M,
  88. .type = MT_DEVICE,
  89. },
  90. };
  91. #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
  92. #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  93. #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  94. /* uart clock source(s) */
  95. static struct s3c24xx_uart_clksrc vr1000_serial_clocks[] = {
  96. [0] = {
  97. .name = "uclk",
  98. .divisor = 1,
  99. .min_baud = 0,
  100. .max_baud = 0,
  101. },
  102. [1] = {
  103. .name = "pclk",
  104. .divisor = 1,
  105. .min_baud = 0,
  106. .max_baud = 0.
  107. }
  108. };
  109. static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
  110. [0] = {
  111. .hwport = 0,
  112. .flags = 0,
  113. .ucon = UCON,
  114. .ulcon = ULCON,
  115. .ufcon = UFCON,
  116. .clocks = vr1000_serial_clocks,
  117. .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
  118. },
  119. [1] = {
  120. .hwport = 1,
  121. .flags = 0,
  122. .ucon = UCON,
  123. .ulcon = ULCON,
  124. .ufcon = UFCON,
  125. .clocks = vr1000_serial_clocks,
  126. .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
  127. },
  128. /* port 2 is not actually used */
  129. [2] = {
  130. .hwport = 2,
  131. .flags = 0,
  132. .ucon = UCON,
  133. .ulcon = ULCON,
  134. .ufcon = UFCON,
  135. .clocks = vr1000_serial_clocks,
  136. .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
  137. }
  138. };
  139. /* definitions for the vr1000 extra 16550 serial ports */
  140. #define VR1000_BAUDBASE (3692307)
  141. #define VR1000_SERIAL_MAPBASE(x) (VR1000_PA_SERIAL + 0x80 + ((x) << 5))
  142. static struct plat_serial8250_port serial_platform_data[] = {
  143. [0] = {
  144. .mapbase = VR1000_SERIAL_MAPBASE(0),
  145. .irq = IRQ_VR1000_SERIAL + 0,
  146. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  147. .iotype = UPIO_MEM,
  148. .regshift = 0,
  149. .uartclk = VR1000_BAUDBASE,
  150. },
  151. [1] = {
  152. .mapbase = VR1000_SERIAL_MAPBASE(1),
  153. .irq = IRQ_VR1000_SERIAL + 1,
  154. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  155. .iotype = UPIO_MEM,
  156. .regshift = 0,
  157. .uartclk = VR1000_BAUDBASE,
  158. },
  159. [2] = {
  160. .mapbase = VR1000_SERIAL_MAPBASE(2),
  161. .irq = IRQ_VR1000_SERIAL + 2,
  162. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  163. .iotype = UPIO_MEM,
  164. .regshift = 0,
  165. .uartclk = VR1000_BAUDBASE,
  166. },
  167. [3] = {
  168. .mapbase = VR1000_SERIAL_MAPBASE(3),
  169. .irq = IRQ_VR1000_SERIAL + 3,
  170. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  171. .iotype = UPIO_MEM,
  172. .regshift = 0,
  173. .uartclk = VR1000_BAUDBASE,
  174. },
  175. { },
  176. };
  177. static struct platform_device serial_device = {
  178. .name = "serial8250",
  179. .id = PLAT8250_DEV_PLATFORM,
  180. .dev = {
  181. .platform_data = serial_platform_data,
  182. },
  183. };
  184. /* DM9000 ethernet devices */
  185. static struct resource vr1000_dm9k0_resource[] = {
  186. [0] = {
  187. .start = S3C2410_CS5 + VR1000_PA_DM9000,
  188. .end = S3C2410_CS5 + VR1000_PA_DM9000 + 3,
  189. .flags = IORESOURCE_MEM
  190. },
  191. [1] = {
  192. .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x40,
  193. .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0x7f,
  194. .flags = IORESOURCE_MEM
  195. },
  196. [2] = {
  197. .start = IRQ_VR1000_DM9000A,
  198. .end = IRQ_VR1000_DM9000A,
  199. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  200. }
  201. };
  202. static struct resource vr1000_dm9k1_resource[] = {
  203. [0] = {
  204. .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x80,
  205. .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0x83,
  206. .flags = IORESOURCE_MEM
  207. },
  208. [1] = {
  209. .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0,
  210. .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0xFF,
  211. .flags = IORESOURCE_MEM
  212. },
  213. [2] = {
  214. .start = IRQ_VR1000_DM9000N,
  215. .end = IRQ_VR1000_DM9000N,
  216. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  217. }
  218. };
  219. /* for the moment we limit ourselves to 16bit IO until some
  220. * better IO routines can be written and tested
  221. */
  222. static struct dm9000_plat_data vr1000_dm9k_platdata = {
  223. .flags = DM9000_PLATF_16BITONLY,
  224. };
  225. static struct platform_device vr1000_dm9k0 = {
  226. .name = "dm9000",
  227. .id = 0,
  228. .num_resources = ARRAY_SIZE(vr1000_dm9k0_resource),
  229. .resource = vr1000_dm9k0_resource,
  230. .dev = {
  231. .platform_data = &vr1000_dm9k_platdata,
  232. }
  233. };
  234. static struct platform_device vr1000_dm9k1 = {
  235. .name = "dm9000",
  236. .id = 1,
  237. .num_resources = ARRAY_SIZE(vr1000_dm9k1_resource),
  238. .resource = vr1000_dm9k1_resource,
  239. .dev = {
  240. .platform_data = &vr1000_dm9k_platdata,
  241. }
  242. };
  243. /* LEDS */
  244. static struct s3c24xx_led_platdata vr1000_led1_pdata = {
  245. .name = "led1",
  246. .gpio = S3C2410_GPB0,
  247. .def_trigger = "",
  248. };
  249. static struct s3c24xx_led_platdata vr1000_led2_pdata = {
  250. .name = "led2",
  251. .gpio = S3C2410_GPB1,
  252. .def_trigger = "",
  253. };
  254. static struct s3c24xx_led_platdata vr1000_led3_pdata = {
  255. .name = "led3",
  256. .gpio = S3C2410_GPB2,
  257. .def_trigger = "",
  258. };
  259. static struct platform_device vr1000_led1 = {
  260. .name = "s3c24xx_led",
  261. .id = 1,
  262. .dev = {
  263. .platform_data = &vr1000_led1_pdata,
  264. },
  265. };
  266. static struct platform_device vr1000_led2 = {
  267. .name = "s3c24xx_led",
  268. .id = 2,
  269. .dev = {
  270. .platform_data = &vr1000_led2_pdata,
  271. },
  272. };
  273. static struct platform_device vr1000_led3 = {
  274. .name = "s3c24xx_led",
  275. .id = 3,
  276. .dev = {
  277. .platform_data = &vr1000_led3_pdata,
  278. },
  279. };
  280. /* I2C devices. */
  281. static struct i2c_board_info vr1000_i2c_devs[] __initdata = {
  282. {
  283. I2C_BOARD_INFO("tlv320aic23", 0x1a),
  284. }, {
  285. I2C_BOARD_INFO("tmp101", 0x48),
  286. }, {
  287. I2C_BOARD_INFO("m41st87", 0x68),
  288. },
  289. };
  290. /* devices for this board */
  291. static struct platform_device *vr1000_devices[] __initdata = {
  292. &s3c_device_usb,
  293. &s3c_device_lcd,
  294. &s3c_device_wdt,
  295. &s3c_device_i2c,
  296. &s3c_device_adc,
  297. &serial_device,
  298. &vr1000_dm9k0,
  299. &vr1000_dm9k1,
  300. &vr1000_led1,
  301. &vr1000_led2,
  302. &vr1000_led3,
  303. };
  304. static struct clk *vr1000_clocks[] __initdata = {
  305. &s3c24xx_dclk0,
  306. &s3c24xx_dclk1,
  307. &s3c24xx_clkout0,
  308. &s3c24xx_clkout1,
  309. &s3c24xx_uclk,
  310. };
  311. static void vr1000_power_off(void)
  312. {
  313. s3c2410_gpio_cfgpin(S3C2410_GPB9, S3C2410_GPB9_OUTP);
  314. s3c2410_gpio_setpin(S3C2410_GPB9, 1);
  315. }
  316. static void __init vr1000_map_io(void)
  317. {
  318. /* initialise clock sources */
  319. s3c24xx_dclk0.parent = &clk_upll;
  320. s3c24xx_dclk0.rate = 12*1000*1000;
  321. s3c24xx_dclk1.parent = NULL;
  322. s3c24xx_dclk1.rate = 3692307;
  323. s3c24xx_clkout0.parent = &s3c24xx_dclk0;
  324. s3c24xx_clkout1.parent = &s3c24xx_dclk1;
  325. s3c24xx_uclk.parent = &s3c24xx_clkout1;
  326. s3c24xx_register_clocks(vr1000_clocks, ARRAY_SIZE(vr1000_clocks));
  327. pm_power_off = vr1000_power_off;
  328. s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc));
  329. s3c24xx_init_clocks(0);
  330. s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs));
  331. }
  332. static void __init vr1000_init(void)
  333. {
  334. platform_add_devices(vr1000_devices, ARRAY_SIZE(vr1000_devices));
  335. i2c_register_board_info(0, vr1000_i2c_devs,
  336. ARRAY_SIZE(vr1000_i2c_devs));
  337. nor_simtec_init();
  338. }
  339. MACHINE_START(VR1000, "Thorcom-VR1000")
  340. /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
  341. .phys_io = S3C2410_PA_UART,
  342. .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
  343. .boot_params = S3C2410_SDRAM_PA + 0x100,
  344. .map_io = vr1000_map_io,
  345. .init_machine = vr1000_init,
  346. .init_irq = s3c24xx_init_irq,
  347. .timer = &s3c24xx_timer,
  348. MACHINE_END