realview_pb11mp.c 10 KB

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  1. /*
  2. * linux/arch/arm/mach-realview/realview_pb11mp.c
  3. *
  4. * Copyright (C) 2008 ARM Limited
  5. * Copyright (C) 2000 Deep Blue Solutions Ltd
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. #include <linux/init.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/sysdev.h>
  24. #include <linux/amba/bus.h>
  25. #include <linux/io.h>
  26. #include <mach/hardware.h>
  27. #include <asm/irq.h>
  28. #include <asm/leds.h>
  29. #include <asm/mach-types.h>
  30. #include <asm/hardware/gic.h>
  31. #include <asm/hardware/icst307.h>
  32. #include <asm/hardware/cache-l2x0.h>
  33. #include <asm/mach/arch.h>
  34. #include <asm/mach/flash.h>
  35. #include <asm/mach/map.h>
  36. #include <asm/mach/mmc.h>
  37. #include <asm/mach/time.h>
  38. #include <mach/board-pb11mp.h>
  39. #include <mach/irqs.h>
  40. #include "core.h"
  41. #include "clock.h"
  42. static struct map_desc realview_pb11mp_io_desc[] __initdata = {
  43. {
  44. .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
  45. .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
  46. .length = SZ_4K,
  47. .type = MT_DEVICE,
  48. }, {
  49. .virtual = IO_ADDRESS(REALVIEW_PB11MP_GIC_CPU_BASE),
  50. .pfn = __phys_to_pfn(REALVIEW_PB11MP_GIC_CPU_BASE),
  51. .length = SZ_4K,
  52. .type = MT_DEVICE,
  53. }, {
  54. .virtual = IO_ADDRESS(REALVIEW_PB11MP_GIC_DIST_BASE),
  55. .pfn = __phys_to_pfn(REALVIEW_PB11MP_GIC_DIST_BASE),
  56. .length = SZ_4K,
  57. .type = MT_DEVICE,
  58. }, {
  59. .virtual = IO_ADDRESS(REALVIEW_TC11MP_GIC_CPU_BASE),
  60. .pfn = __phys_to_pfn(REALVIEW_TC11MP_GIC_CPU_BASE),
  61. .length = SZ_4K,
  62. .type = MT_DEVICE,
  63. }, {
  64. .virtual = IO_ADDRESS(REALVIEW_TC11MP_GIC_DIST_BASE),
  65. .pfn = __phys_to_pfn(REALVIEW_TC11MP_GIC_DIST_BASE),
  66. .length = SZ_4K,
  67. .type = MT_DEVICE,
  68. }, {
  69. .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
  70. .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
  71. .length = SZ_4K,
  72. .type = MT_DEVICE,
  73. }, {
  74. .virtual = IO_ADDRESS(REALVIEW_PB11MP_TIMER0_1_BASE),
  75. .pfn = __phys_to_pfn(REALVIEW_PB11MP_TIMER0_1_BASE),
  76. .length = SZ_4K,
  77. .type = MT_DEVICE,
  78. }, {
  79. .virtual = IO_ADDRESS(REALVIEW_PB11MP_TIMER2_3_BASE),
  80. .pfn = __phys_to_pfn(REALVIEW_PB11MP_TIMER2_3_BASE),
  81. .length = SZ_4K,
  82. .type = MT_DEVICE,
  83. }, {
  84. .virtual = IO_ADDRESS(REALVIEW_TC11MP_L220_BASE),
  85. .pfn = __phys_to_pfn(REALVIEW_TC11MP_L220_BASE),
  86. .length = SZ_8K,
  87. .type = MT_DEVICE,
  88. },
  89. #ifdef CONFIG_DEBUG_LL
  90. {
  91. .virtual = IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE),
  92. .pfn = __phys_to_pfn(REALVIEW_PB11MP_UART0_BASE),
  93. .length = SZ_4K,
  94. .type = MT_DEVICE,
  95. },
  96. #endif
  97. };
  98. static void __init realview_pb11mp_map_io(void)
  99. {
  100. iotable_init(realview_pb11mp_io_desc, ARRAY_SIZE(realview_pb11mp_io_desc));
  101. }
  102. /*
  103. * RealView PB11MPCore AMBA devices
  104. */
  105. #define GPIO2_IRQ { IRQ_PB11MP_GPIO2, NO_IRQ }
  106. #define GPIO2_DMA { 0, 0 }
  107. #define GPIO3_IRQ { IRQ_PB11MP_GPIO3, NO_IRQ }
  108. #define GPIO3_DMA { 0, 0 }
  109. #define AACI_IRQ { IRQ_TC11MP_AACI, NO_IRQ }
  110. #define AACI_DMA { 0x80, 0x81 }
  111. #define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B }
  112. #define MMCI0_DMA { 0x84, 0 }
  113. #define KMI0_IRQ { IRQ_TC11MP_KMI0, NO_IRQ }
  114. #define KMI0_DMA { 0, 0 }
  115. #define KMI1_IRQ { IRQ_TC11MP_KMI1, NO_IRQ }
  116. #define KMI1_DMA { 0, 0 }
  117. #define PB11MP_SMC_IRQ { NO_IRQ, NO_IRQ }
  118. #define PB11MP_SMC_DMA { 0, 0 }
  119. #define MPMC_IRQ { NO_IRQ, NO_IRQ }
  120. #define MPMC_DMA { 0, 0 }
  121. #define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD, NO_IRQ }
  122. #define PB11MP_CLCD_DMA { 0, 0 }
  123. #define DMAC_IRQ { IRQ_PB11MP_DMAC, NO_IRQ }
  124. #define DMAC_DMA { 0, 0 }
  125. #define SCTL_IRQ { NO_IRQ, NO_IRQ }
  126. #define SCTL_DMA { 0, 0 }
  127. #define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG, NO_IRQ }
  128. #define PB11MP_WATCHDOG_DMA { 0, 0 }
  129. #define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0, NO_IRQ }
  130. #define PB11MP_GPIO0_DMA { 0, 0 }
  131. #define GPIO1_IRQ { IRQ_PB11MP_GPIO1, NO_IRQ }
  132. #define GPIO1_DMA { 0, 0 }
  133. #define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC, NO_IRQ }
  134. #define PB11MP_RTC_DMA { 0, 0 }
  135. #define SCI_IRQ { IRQ_PB11MP_SCI, NO_IRQ }
  136. #define SCI_DMA { 7, 6 }
  137. #define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0, NO_IRQ }
  138. #define PB11MP_UART0_DMA { 15, 14 }
  139. #define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1, NO_IRQ }
  140. #define PB11MP_UART1_DMA { 13, 12 }
  141. #define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2, NO_IRQ }
  142. #define PB11MP_UART2_DMA { 11, 10 }
  143. #define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3, NO_IRQ }
  144. #define PB11MP_UART3_DMA { 0x86, 0x87 }
  145. #define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP, NO_IRQ }
  146. #define PB11MP_SSP_DMA { 9, 8 }
  147. /* FPGA Primecells */
  148. AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
  149. AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &realview_mmc0_plat_data);
  150. AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL);
  151. AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL);
  152. AMBA_DEVICE(uart3, "fpga:09", PB11MP_UART3, NULL);
  153. /* DevChip Primecells */
  154. AMBA_DEVICE(smc, "dev:00", PB11MP_SMC, NULL);
  155. AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL);
  156. AMBA_DEVICE(wdog, "dev:e1", PB11MP_WATCHDOG, NULL);
  157. AMBA_DEVICE(gpio0, "dev:e4", PB11MP_GPIO0, NULL);
  158. AMBA_DEVICE(gpio1, "dev:e5", GPIO1, NULL);
  159. AMBA_DEVICE(gpio2, "dev:e6", GPIO2, NULL);
  160. AMBA_DEVICE(rtc, "dev:e8", PB11MP_RTC, NULL);
  161. AMBA_DEVICE(sci0, "dev:f0", SCI, NULL);
  162. AMBA_DEVICE(uart0, "dev:f1", PB11MP_UART0, NULL);
  163. AMBA_DEVICE(uart1, "dev:f2", PB11MP_UART1, NULL);
  164. AMBA_DEVICE(uart2, "dev:f3", PB11MP_UART2, NULL);
  165. AMBA_DEVICE(ssp0, "dev:f4", PB11MP_SSP, NULL);
  166. /* Primecells on the NEC ISSP chip */
  167. AMBA_DEVICE(clcd, "issp:20", PB11MP_CLCD, &clcd_plat_data);
  168. AMBA_DEVICE(dmac, "issp:30", DMAC, NULL);
  169. static struct amba_device *amba_devs[] __initdata = {
  170. &dmac_device,
  171. &uart0_device,
  172. &uart1_device,
  173. &uart2_device,
  174. &uart3_device,
  175. &smc_device,
  176. &clcd_device,
  177. &sctl_device,
  178. &wdog_device,
  179. &gpio0_device,
  180. &gpio1_device,
  181. &gpio2_device,
  182. &rtc_device,
  183. &sci0_device,
  184. &ssp0_device,
  185. &aaci_device,
  186. &mmc0_device,
  187. &kmi0_device,
  188. &kmi1_device,
  189. };
  190. /*
  191. * RealView PB11MPCore platform devices
  192. */
  193. static struct resource realview_pb11mp_flash_resource[] = {
  194. [0] = {
  195. .start = REALVIEW_PB11MP_FLASH0_BASE,
  196. .end = REALVIEW_PB11MP_FLASH0_BASE + REALVIEW_PB11MP_FLASH0_SIZE - 1,
  197. .flags = IORESOURCE_MEM,
  198. },
  199. [1] = {
  200. .start = REALVIEW_PB11MP_FLASH1_BASE,
  201. .end = REALVIEW_PB11MP_FLASH1_BASE + REALVIEW_PB11MP_FLASH1_SIZE - 1,
  202. .flags = IORESOURCE_MEM,
  203. },
  204. };
  205. static struct resource realview_pb11mp_smsc911x_resources[] = {
  206. [0] = {
  207. .start = REALVIEW_PB11MP_ETH_BASE,
  208. .end = REALVIEW_PB11MP_ETH_BASE + SZ_64K - 1,
  209. .flags = IORESOURCE_MEM,
  210. },
  211. [1] = {
  212. .start = IRQ_TC11MP_ETH,
  213. .end = IRQ_TC11MP_ETH,
  214. .flags = IORESOURCE_IRQ,
  215. },
  216. };
  217. static struct platform_device realview_pb11mp_smsc911x_device = {
  218. .name = "smc911x",
  219. .id = 0,
  220. .num_resources = ARRAY_SIZE(realview_pb11mp_smsc911x_resources),
  221. .resource = realview_pb11mp_smsc911x_resources,
  222. };
  223. struct resource realview_pb11mp_cf_resources[] = {
  224. [0] = {
  225. .start = REALVIEW_PB11MP_CF_BASE,
  226. .end = REALVIEW_PB11MP_CF_BASE + SZ_4K - 1,
  227. .flags = IORESOURCE_MEM,
  228. },
  229. [1] = {
  230. .start = REALVIEW_PB11MP_CF_MEM_BASE,
  231. .end = REALVIEW_PB11MP_CF_MEM_BASE + SZ_4K - 1,
  232. .flags = IORESOURCE_MEM,
  233. },
  234. [2] = {
  235. .start = -1, /* FIXME: Find correct irq */
  236. .end = -1,
  237. .flags = IORESOURCE_IRQ,
  238. },
  239. };
  240. struct platform_device realview_pb11mp_cf_device = {
  241. .name = "compactflash",
  242. .id = 0,
  243. .num_resources = ARRAY_SIZE(realview_pb11mp_cf_resources),
  244. .resource = realview_pb11mp_cf_resources,
  245. };
  246. static void __init gic_init_irq(void)
  247. {
  248. unsigned int pldctrl;
  249. /* new irq mode with no DCC */
  250. writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
  251. pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1);
  252. pldctrl |= 2 << 22;
  253. writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1);
  254. writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
  255. /* ARM11MPCore test chip GIC, primary */
  256. gic_cpu_base_addr = __io_address(REALVIEW_TC11MP_GIC_CPU_BASE);
  257. gic_dist_init(0, __io_address(REALVIEW_TC11MP_GIC_DIST_BASE), 29);
  258. gic_cpu_init(0, gic_cpu_base_addr);
  259. /* board GIC, secondary */
  260. gic_dist_init(1, __io_address(REALVIEW_PB11MP_GIC_DIST_BASE), IRQ_PB11MP_GIC_START);
  261. gic_cpu_init(1, __io_address(REALVIEW_PB11MP_GIC_CPU_BASE));
  262. gic_cascade_irq(1, IRQ_TC11MP_PB_IRQ1);
  263. }
  264. static void __init realview_pb11mp_timer_init(void)
  265. {
  266. timer0_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE);
  267. timer1_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE) + 0x20;
  268. timer2_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE);
  269. timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20;
  270. #ifdef CONFIG_LOCAL_TIMERS
  271. twd_base_addr = __io_address(REALVIEW_TC11MP_TWD_BASE);
  272. twd_size = REALVIEW_TC11MP_TWD_SIZE;
  273. #endif
  274. realview_timer_init(IRQ_TC11MP_TIMER0_1);
  275. }
  276. static struct sys_timer realview_pb11mp_timer = {
  277. .init = realview_pb11mp_timer_init,
  278. };
  279. static void __init realview_pb11mp_init(void)
  280. {
  281. int i;
  282. #ifdef CONFIG_CACHE_L2X0
  283. /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
  284. * Bits: .... ...0 0111 1001 0000 .... .... .... */
  285. l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff);
  286. #endif
  287. clk_register(&realview_clcd_clk);
  288. realview_flash_register(realview_pb11mp_flash_resource,
  289. ARRAY_SIZE(realview_pb11mp_flash_resource));
  290. platform_device_register(&realview_pb11mp_smsc911x_device);
  291. platform_device_register(&realview_i2c_device);
  292. platform_device_register(&realview_pb11mp_cf_device);
  293. for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
  294. struct amba_device *d = amba_devs[i];
  295. amba_device_register(d, &iomem_resource);
  296. }
  297. #ifdef CONFIG_LEDS
  298. leds_event = realview_leds_event;
  299. #endif
  300. }
  301. MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
  302. /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
  303. .phys_io = REALVIEW_PB11MP_UART0_BASE,
  304. .io_pg_offst = (IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE) >> 18) & 0xfffc,
  305. .boot_params = 0x00000100,
  306. .map_io = realview_pb11mp_map_io,
  307. .init_irq = gic_init_irq,
  308. .timer = &realview_pb11mp_timer,
  309. .init_machine = realview_pb11mp_init,
  310. MACHINE_END