rd88f5181l-fxo-setup.c 4.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164
  1. /*
  2. * arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
  3. *
  4. * Marvell Orion-VoIP FXO Reference Design Setup
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without any
  8. * warranty of any kind, whether express or implied.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/init.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/pci.h>
  14. #include <linux/irq.h>
  15. #include <linux/mtd/physmap.h>
  16. #include <linux/mv643xx_eth.h>
  17. #include <linux/ethtool.h>
  18. #include <asm/mach-types.h>
  19. #include <asm/gpio.h>
  20. #include <asm/leds.h>
  21. #include <asm/mach/arch.h>
  22. #include <asm/mach/pci.h>
  23. #include <mach/orion5x.h>
  24. #include "common.h"
  25. #include "mpp.h"
  26. /*****************************************************************************
  27. * RD-88F5181L FXO Info
  28. ****************************************************************************/
  29. /*
  30. * 8M NOR flash Device bus boot chip select
  31. */
  32. #define RD88F5181L_FXO_NOR_BOOT_BASE 0xff800000
  33. #define RD88F5181L_FXO_NOR_BOOT_SIZE SZ_8M
  34. /*****************************************************************************
  35. * 8M NOR Flash on Device bus Boot chip select
  36. ****************************************************************************/
  37. static struct physmap_flash_data rd88f5181l_fxo_nor_boot_flash_data = {
  38. .width = 1,
  39. };
  40. static struct resource rd88f5181l_fxo_nor_boot_flash_resource = {
  41. .flags = IORESOURCE_MEM,
  42. .start = RD88F5181L_FXO_NOR_BOOT_BASE,
  43. .end = RD88F5181L_FXO_NOR_BOOT_BASE +
  44. RD88F5181L_FXO_NOR_BOOT_SIZE - 1,
  45. };
  46. static struct platform_device rd88f5181l_fxo_nor_boot_flash = {
  47. .name = "physmap-flash",
  48. .id = 0,
  49. .dev = {
  50. .platform_data = &rd88f5181l_fxo_nor_boot_flash_data,
  51. },
  52. .num_resources = 1,
  53. .resource = &rd88f5181l_fxo_nor_boot_flash_resource,
  54. };
  55. /*****************************************************************************
  56. * General Setup
  57. ****************************************************************************/
  58. static struct orion5x_mpp_mode rd88f5181l_fxo_mpp_modes[] __initdata = {
  59. { 0, MPP_GPIO }, /* LED1 CardBus LED (front panel) */
  60. { 1, MPP_GPIO }, /* PCI_intA */
  61. { 2, MPP_GPIO }, /* Hard Reset / Factory Init*/
  62. { 3, MPP_GPIO }, /* FXS or DAA select */
  63. { 4, MPP_GPIO }, /* LED6 - phone LED (front panel) */
  64. { 5, MPP_GPIO }, /* LED5 - phone LED (front panel) */
  65. { 6, MPP_PCI_CLK }, /* CPU PCI refclk */
  66. { 7, MPP_PCI_CLK }, /* PCI/PCIe refclk */
  67. { 8, MPP_GPIO }, /* CardBus reset */
  68. { 9, MPP_GPIO }, /* GE_RXERR */
  69. { 10, MPP_GPIO }, /* LED2 MiniPCI LED (front panel) */
  70. { 11, MPP_GPIO }, /* Lifeline control */
  71. { 12, MPP_GIGE }, /* GE_TXD[4] */
  72. { 13, MPP_GIGE }, /* GE_TXD[5] */
  73. { 14, MPP_GIGE }, /* GE_TXD[6] */
  74. { 15, MPP_GIGE }, /* GE_TXD[7] */
  75. { 16, MPP_GIGE }, /* GE_RXD[4] */
  76. { 17, MPP_GIGE }, /* GE_RXD[5] */
  77. { 18, MPP_GIGE }, /* GE_RXD[6] */
  78. { 19, MPP_GIGE }, /* GE_RXD[7] */
  79. { -1 },
  80. };
  81. static struct mv643xx_eth_platform_data rd88f5181l_fxo_eth_data = {
  82. .phy_addr = MV643XX_ETH_PHY_NONE,
  83. .speed = SPEED_1000,
  84. .duplex = DUPLEX_FULL,
  85. };
  86. static void __init rd88f5181l_fxo_init(void)
  87. {
  88. /*
  89. * Setup basic Orion functions. Need to be called early.
  90. */
  91. orion5x_init();
  92. orion5x_mpp_conf(rd88f5181l_fxo_mpp_modes);
  93. /*
  94. * Configure peripherals.
  95. */
  96. orion5x_ehci0_init();
  97. orion5x_eth_init(&rd88f5181l_fxo_eth_data);
  98. orion5x_uart0_init();
  99. orion5x_setup_dev_boot_win(RD88F5181L_FXO_NOR_BOOT_BASE,
  100. RD88F5181L_FXO_NOR_BOOT_SIZE);
  101. platform_device_register(&rd88f5181l_fxo_nor_boot_flash);
  102. }
  103. static int __init
  104. rd88f5181l_fxo_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
  105. {
  106. int irq;
  107. /*
  108. * Check for devices with hard-wired IRQs.
  109. */
  110. irq = orion5x_pci_map_irq(dev, slot, pin);
  111. if (irq != -1)
  112. return irq;
  113. /*
  114. * Mini-PCI / Cardbus slot.
  115. */
  116. return gpio_to_irq(1);
  117. }
  118. static struct hw_pci rd88f5181l_fxo_pci __initdata = {
  119. .nr_controllers = 2,
  120. .swizzle = pci_std_swizzle,
  121. .setup = orion5x_pci_sys_setup,
  122. .scan = orion5x_pci_sys_scan_bus,
  123. .map_irq = rd88f5181l_fxo_pci_map_irq,
  124. };
  125. static int __init rd88f5181l_fxo_pci_init(void)
  126. {
  127. if (machine_is_rd88f5181l_fxo()) {
  128. orion5x_pci_set_cardbus_mode();
  129. pci_common_init(&rd88f5181l_fxo_pci);
  130. }
  131. return 0;
  132. }
  133. subsys_initcall(rd88f5181l_fxo_pci_init);
  134. MACHINE_START(RD88F5181L_FXO, "Marvell Orion-VoIP FXO Reference Design")
  135. /* Maintainer: Nicolas Pitre <nico@marvell.com> */
  136. .phys_io = ORION5X_REGS_PHYS_BASE,
  137. .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
  138. .boot_params = 0x00000100,
  139. .init_machine = rd88f5181l_fxo_init,
  140. .map_io = orion5x_map_io,
  141. .init_irq = orion5x_init_irq,
  142. .timer = &orion5x_timer,
  143. .fixup = tag_fixup_mem32,
  144. MACHINE_END