pcm038.c 5.0 KB

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  1. /*
  2. * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
  3. * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  17. * MA 02110-1301, USA.
  18. */
  19. #include <linux/platform_device.h>
  20. #include <linux/mtd/physmap.h>
  21. #include <asm/mach/arch.h>
  22. #include <asm/mach-types.h>
  23. #include <mach/common.h>
  24. #include <mach/hardware.h>
  25. #include <mach/iomux-mx1-mx2.h>
  26. #include <asm/mach/time.h>
  27. #include <mach/imx-uart.h>
  28. #include <mach/board-pcm038.h>
  29. #include "devices.h"
  30. /*
  31. * Phytec's phyCORE-i.MX27 comes with 32MiB flash,
  32. * 16 bit width
  33. */
  34. static struct physmap_flash_data pcm038_flash_data = {
  35. .width = 2,
  36. };
  37. static struct resource pcm038_flash_resource = {
  38. .start = 0xc0000000,
  39. .end = 0xc1ffffff,
  40. .flags = IORESOURCE_MEM,
  41. };
  42. static struct platform_device pcm038_nor_mtd_device = {
  43. .name = "physmap-flash",
  44. .id = 0,
  45. .dev = {
  46. .platform_data = &pcm038_flash_data,
  47. },
  48. .num_resources = 1,
  49. .resource = &pcm038_flash_resource,
  50. };
  51. static int mxc_uart0_pins[] = {
  52. PE12_PF_UART1_TXD,
  53. PE13_PF_UART1_RXD,
  54. PE14_PF_UART1_CTS,
  55. PE15_PF_UART1_RTS
  56. };
  57. static int uart_mxc_port0_init(struct platform_device *pdev)
  58. {
  59. return mxc_gpio_setup_multiple_pins(mxc_uart0_pins,
  60. ARRAY_SIZE(mxc_uart0_pins),
  61. MXC_GPIO_ALLOC_MODE_NORMAL, "UART0");
  62. }
  63. static int uart_mxc_port0_exit(struct platform_device *pdev)
  64. {
  65. return mxc_gpio_setup_multiple_pins(mxc_uart0_pins,
  66. ARRAY_SIZE(mxc_uart0_pins),
  67. MXC_GPIO_ALLOC_MODE_RELEASE, "UART0");
  68. }
  69. static int mxc_uart1_pins[] = {
  70. PE3_PF_UART2_CTS,
  71. PE4_PF_UART2_RTS,
  72. PE6_PF_UART2_TXD,
  73. PE7_PF_UART2_RXD
  74. };
  75. static int uart_mxc_port1_init(struct platform_device *pdev)
  76. {
  77. return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
  78. ARRAY_SIZE(mxc_uart1_pins),
  79. MXC_GPIO_ALLOC_MODE_NORMAL, "UART1");
  80. }
  81. static int uart_mxc_port1_exit(struct platform_device *pdev)
  82. {
  83. return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
  84. ARRAY_SIZE(mxc_uart1_pins),
  85. MXC_GPIO_ALLOC_MODE_RELEASE, "UART1");
  86. }
  87. static int mxc_uart2_pins[] = { PE10_PF_UART3_CTS,
  88. PE9_PF_UART3_RXD,
  89. PE10_PF_UART3_CTS,
  90. PE9_PF_UART3_RXD };
  91. static int uart_mxc_port2_init(struct platform_device *pdev)
  92. {
  93. return mxc_gpio_setup_multiple_pins(mxc_uart2_pins,
  94. ARRAY_SIZE(mxc_uart2_pins),
  95. MXC_GPIO_ALLOC_MODE_NORMAL, "UART2");
  96. }
  97. static int uart_mxc_port2_exit(struct platform_device *pdev)
  98. {
  99. return mxc_gpio_setup_multiple_pins(mxc_uart2_pins,
  100. ARRAY_SIZE(mxc_uart2_pins),
  101. MXC_GPIO_ALLOC_MODE_RELEASE, "UART2");
  102. }
  103. static struct imxuart_platform_data uart_pdata[] = {
  104. {
  105. .init = uart_mxc_port0_init,
  106. .exit = uart_mxc_port0_exit,
  107. .flags = IMXUART_HAVE_RTSCTS,
  108. }, {
  109. .init = uart_mxc_port1_init,
  110. .exit = uart_mxc_port1_exit,
  111. .flags = IMXUART_HAVE_RTSCTS,
  112. }, {
  113. .init = uart_mxc_port2_init,
  114. .exit = uart_mxc_port2_exit,
  115. .flags = IMXUART_HAVE_RTSCTS,
  116. },
  117. };
  118. static int mxc_fec_pins[] = {
  119. PD0_AIN_FEC_TXD0,
  120. PD1_AIN_FEC_TXD1,
  121. PD2_AIN_FEC_TXD2,
  122. PD3_AIN_FEC_TXD3,
  123. PD4_AOUT_FEC_RX_ER,
  124. PD5_AOUT_FEC_RXD1,
  125. PD6_AOUT_FEC_RXD2,
  126. PD7_AOUT_FEC_RXD3,
  127. PD8_AF_FEC_MDIO,
  128. PD9_AIN_FEC_MDC,
  129. PD10_AOUT_FEC_CRS,
  130. PD11_AOUT_FEC_TX_CLK,
  131. PD12_AOUT_FEC_RXD0,
  132. PD13_AOUT_FEC_RX_DV,
  133. PD14_AOUT_FEC_CLR,
  134. PD15_AOUT_FEC_COL,
  135. PD16_AIN_FEC_TX_ER,
  136. PF23_AIN_FEC_TX_EN
  137. };
  138. static void gpio_fec_active(void)
  139. {
  140. mxc_gpio_setup_multiple_pins(mxc_fec_pins,
  141. ARRAY_SIZE(mxc_fec_pins),
  142. MXC_GPIO_ALLOC_MODE_NORMAL, "FEC");
  143. }
  144. static void gpio_fec_inactive(void)
  145. {
  146. mxc_gpio_setup_multiple_pins(mxc_fec_pins,
  147. ARRAY_SIZE(mxc_fec_pins),
  148. MXC_GPIO_ALLOC_MODE_RELEASE, "FEC");
  149. }
  150. static struct platform_device *platform_devices[] __initdata = {
  151. &pcm038_nor_mtd_device,
  152. };
  153. static void __init pcm038_init(void)
  154. {
  155. gpio_fec_active();
  156. mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
  157. mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);
  158. mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);
  159. platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
  160. #ifdef CONFIG_MACH_PCM970_BASEBOARD
  161. pcm970_baseboard_init();
  162. #endif
  163. }
  164. static void __init pcm038_timer_init(void)
  165. {
  166. mxc_clocks_init(26000000);
  167. mxc_timer_init("gpt_clk.0");
  168. }
  169. struct sys_timer pcm038_timer = {
  170. .init = pcm038_timer_init,
  171. };
  172. MACHINE_START(PCM038, "phyCORE-i.MX27")
  173. .phys_io = AIPI_BASE_ADDR,
  174. .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
  175. .boot_params = PHYS_OFFSET + 0x100,
  176. .map_io = mxc_map_io,
  177. .init_irq = mxc_init_irq,
  178. .init_machine = pcm038_init,
  179. .timer = &pcm038_timer,
  180. MACHINE_END