gpio.h 4.1 KB

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  1. /****************************************************************************/
  2. /*
  3. * arch/arm/mach-l7200/include/mach/gpio.h
  4. *
  5. * Registers and helper functions for the L7200 Link-Up Systems
  6. * GPIO.
  7. *
  8. * (C) Copyright 2000, S A McConnell (samcconn@cotw.com)
  9. *
  10. * This file is subject to the terms and conditions of the GNU General Public
  11. * License. See the file COPYING in the main directory of this archive for
  12. * more details.
  13. */
  14. /****************************************************************************/
  15. #define GPIO_OFF 0x00005000 /* Offset from IO_START to the GPIO reg's. */
  16. /* IO_START and IO_BASE are defined in hardware.h */
  17. #define GPIO_START (IO_START_2 + GPIO_OFF) /* Physical addr of the GPIO reg. */
  18. #define GPIO_BASE (IO_BASE_2 + GPIO_OFF) /* Virtual addr of the GPIO reg. */
  19. /* Offsets from the start of the GPIO for all the registers. */
  20. #define PADR_OFF 0x000
  21. #define PADDR_OFF 0x004
  22. #define PASBSR_OFF 0x008
  23. #define PAEENR_OFF 0x00c
  24. #define PAESNR_OFF 0x010
  25. #define PAESTR_OFF 0x014
  26. #define PAIMR_OFF 0x018
  27. #define PAINT_OFF 0x01c
  28. #define PBDR_OFF 0x020
  29. #define PBDDR_OFF 0x024
  30. #define PBSBSR_OFF 0x028
  31. #define PBIMR_OFF 0x038
  32. #define PBINT_OFF 0x03c
  33. #define PCDR_OFF 0x040
  34. #define PCDDR_OFF 0x044
  35. #define PCSBSR_OFF 0x048
  36. #define PCIMR_OFF 0x058
  37. #define PCINT_OFF 0x05c
  38. #define PDDR_OFF 0x060
  39. #define PDDDR_OFF 0x064
  40. #define PDSBSR_OFF 0x068
  41. #define PDEENR_OFF 0x06c
  42. #define PDESNR_OFF 0x070
  43. #define PDESTR_OFF 0x074
  44. #define PDIMR_OFF 0x078
  45. #define PDINT_OFF 0x07c
  46. #define PEDR_OFF 0x080
  47. #define PEDDR_OFF 0x084
  48. #define PESBSR_OFF 0x088
  49. #define PEEENR_OFF 0x08c
  50. #define PEESNR_OFF 0x090
  51. #define PEESTR_OFF 0x094
  52. #define PEIMR_OFF 0x098
  53. #define PEINT_OFF 0x09c
  54. /* Define the GPIO registers for use by device drivers and the kernel. */
  55. #define PADR (*(volatile unsigned long *)(GPIO_BASE+PADR_OFF))
  56. #define PADDR (*(volatile unsigned long *)(GPIO_BASE+PADDR_OFF))
  57. #define PASBSR (*(volatile unsigned long *)(GPIO_BASE+PASBSR_OFF))
  58. #define PAEENR (*(volatile unsigned long *)(GPIO_BASE+PAEENR_OFF))
  59. #define PAESNR (*(volatile unsigned long *)(GPIO_BASE+PAESNR_OFF))
  60. #define PAESTR (*(volatile unsigned long *)(GPIO_BASE+PAESTR_OFF))
  61. #define PAIMR (*(volatile unsigned long *)(GPIO_BASE+PAIMR_OFF))
  62. #define PAINT (*(volatile unsigned long *)(GPIO_BASE+PAINT_OFF))
  63. #define PBDR (*(volatile unsigned long *)(GPIO_BASE+PBDR_OFF))
  64. #define PBDDR (*(volatile unsigned long *)(GPIO_BASE+PBDDR_OFF))
  65. #define PBSBSR (*(volatile unsigned long *)(GPIO_BASE+PBSBSR_OFF))
  66. #define PBIMR (*(volatile unsigned long *)(GPIO_BASE+PBIMR_OFF))
  67. #define PBINT (*(volatile unsigned long *)(GPIO_BASE+PBINT_OFF))
  68. #define PCDR (*(volatile unsigned long *)(GPIO_BASE+PCDR_OFF))
  69. #define PCDDR (*(volatile unsigned long *)(GPIO_BASE+PCDDR_OFF))
  70. #define PCSBSR (*(volatile unsigned long *)(GPIO_BASE+PCSBSR_OFF))
  71. #define PCIMR (*(volatile unsigned long *)(GPIO_BASE+PCIMR_OFF))
  72. #define PCINT (*(volatile unsigned long *)(GPIO_BASE+PCINT_OFF))
  73. #define PDDR (*(volatile unsigned long *)(GPIO_BASE+PDDR_OFF))
  74. #define PDDDR (*(volatile unsigned long *)(GPIO_BASE+PDDDR_OFF))
  75. #define PDSBSR (*(volatile unsigned long *)(GPIO_BASE+PDSBSR_OFF))
  76. #define PDEENR (*(volatile unsigned long *)(GPIO_BASE+PDEENR_OFF))
  77. #define PDESNR (*(volatile unsigned long *)(GPIO_BASE+PDESNR_OFF))
  78. #define PDESTR (*(volatile unsigned long *)(GPIO_BASE+PDESTR_OFF))
  79. #define PDIMR (*(volatile unsigned long *)(GPIO_BASE+PDIMR_OFF))
  80. #define PDINT (*(volatile unsigned long *)(GPIO_BASE+PDINT_OFF))
  81. #define PEDR (*(volatile unsigned long *)(GPIO_BASE+PEDR_OFF))
  82. #define PEDDR (*(volatile unsigned long *)(GPIO_BASE+PEDDR_OFF))
  83. #define PESBSR (*(volatile unsigned long *)(GPIO_BASE+PESBSR_OFF))
  84. #define PEEENR (*(volatile unsigned long *)(GPIO_BASE+PEEENR_OFF))
  85. #define PEESNR (*(volatile unsigned long *)(GPIO_BASE+PEESNR_OFF))
  86. #define PEESTR (*(volatile unsigned long *)(GPIO_BASE+PEESTR_OFF))
  87. #define PEIMR (*(volatile unsigned long *)(GPIO_BASE+PEIMR_OFF))
  88. #define PEINT (*(volatile unsigned long *)(GPIO_BASE+PEINT_OFF))
  89. #define VEE_EN 0x02
  90. #define BACKLIGHT_EN 0x04