Strona główna Odkrywaj Pomoc
Zarejestruj się Zaloguj się
phyus
/
linux-vybrid_public
8
0
Forkuj 0
Pliki Problemy 0 Oczekujące zmiany 0 Wiki
Drzewo: f901b64472
Gałęzie Tagi
linux-vybrid_pu...
/
arch
/
arm
/
mach-davinci
/
include
/
mach
/
hardware.h

hardware.h 2.0 KB
Historia Czysty

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152 
  1. /*
    2. 

  2.  * Common hardware definitions
    3. 

  3.  *
    4. 

  4.  * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
    5. 

  5.  *
    6. 

  6.  * 2007 (c) MontaVista Software, Inc. This file is licensed under
    7. 

  7.  * the terms of the GNU General Public License version 2. This program
    8. 

  8.  * is licensed "as is" without any warranty of any kind, whether express
    9. 

  9.  * or implied.
    10. 

  10.  */
    11. 

  11. #ifndef __ASM_ARCH_HARDWARE_H
    12. 

  12. #define __ASM_ARCH_HARDWARE_H
    13. 

  13. 

  14. /*
    15. 

  15.  * Base register addresses
    16. 

  16.  */
    17. 

  17. #define DAVINCI_DMA_3PCC_BASE			(0x01C00000)
    18. 

  18. #define DAVINCI_DMA_3PTC0_BASE			(0x01C10000)
    19. 

  19. #define DAVINCI_DMA_3PTC1_BASE			(0x01C10400)
    20. 

  20. #define DAVINCI_I2C_BASE			(0x01C21000)
    21. 

  21. #define DAVINCI_PWM0_BASE			(0x01C22000)
    22. 

  22. #define DAVINCI_PWM1_BASE			(0x01C22400)
    23. 

  23. #define DAVINCI_PWM2_BASE			(0x01C22800)
    24. 

  24. #define DAVINCI_SYSTEM_MODULE_BASE		(0x01C40000)
    25. 

  25. #define DAVINCI_PLL_CNTRL0_BASE			(0x01C40800)
    26. 

  26. #define DAVINCI_PLL_CNTRL1_BASE			(0x01C40C00)
    27. 

  27. #define DAVINCI_PWR_SLEEP_CNTRL_BASE		(0x01C41000)
    28. 

  28. #define DAVINCI_SYSTEM_DFT_BASE			(0x01C42000)
    29. 

  29. #define DAVINCI_IEEE1394_BASE			(0x01C60000)
    30. 

  30. #define DAVINCI_USB_OTG_BASE			(0x01C64000)
    31. 

  31. #define DAVINCI_CFC_ATA_BASE			(0x01C66000)
    32. 

  32. #define DAVINCI_SPI_BASE			(0x01C66800)
    33. 

  33. #define DAVINCI_GPIO_BASE			(0x01C67000)
    34. 

  34. #define DAVINCI_UHPI_BASE			(0x01C67800)
    35. 

  35. #define DAVINCI_VPSS_REGS_BASE			(0x01C70000)
    36. 

  36. #define DAVINCI_EMAC_CNTRL_REGS_BASE		(0x01C80000)
    37. 

  37. #define DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE	(0x01C81000)
    38. 

  38. #define DAVINCI_EMAC_WRAPPER_RAM_BASE		(0x01C82000)
    39. 

  39. #define DAVINCI_MDIO_CNTRL_REGS_BASE		(0x01C84000)
    40. 

  40. #define DAVINCI_IMCOP_BASE			(0x01CC0000)
    41. 

  41. #define DAVINCI_ASYNC_EMIF_CNTRL_BASE		(0x01E00000)
    42. 

  42. #define DAVINCI_VLYNQ_BASE			(0x01E01000)
    43. 

  43. #define DAVINCI_MCBSP_BASE			(0x01E02000)
    44. 

  44. #define DAVINCI_MMC_SD_BASE			(0x01E10000)
    45. 

  45. #define DAVINCI_MS_BASE				(0x01E20000)
    46. 

  46. #define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE	(0x02000000)
    47. 

  47. #define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE	(0x04000000)
    48. 

  48. #define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE	(0x06000000)
    49. 

  49. #define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE	(0x08000000)
    50. 

  50. #define DAVINCI_VLYNQ_REMOTE_BASE		(0x0C000000)
    51. 

  51. 

  52. #endif /* __ASM_ARCH_HARDWARE_H */
    53.