machinecheck 3.0 KB

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  1. Configurable sysfs parameters for the x86-64 machine check code.
  2. Machine checks report internal hardware error conditions detected
  3. by the CPU. Uncorrected errors typically cause a machine check
  4. (often with panic), corrected ones cause a machine check log entry.
  5. Machine checks are organized in banks (normally associated with
  6. a hardware subsystem) and subevents in a bank. The exact meaning
  7. of the banks and subevent is CPU specific.
  8. mcelog knows how to decode them.
  9. When you see the "Machine check errors logged" message in the system
  10. log then mcelog should run to collect and decode machine check entries
  11. from /dev/mcelog. Normally mcelog should be run regularly from a cronjob.
  12. Each CPU has a directory in /sys/devices/system/machinecheck/machinecheckN
  13. (N = CPU number)
  14. The directory contains some configurable entries:
  15. Entries:
  16. bankNctl
  17. (N bank number)
  18. 64bit Hex bitmask enabling/disabling specific subevents for bank N
  19. When a bit in the bitmask is zero then the respective
  20. subevent will not be reported.
  21. By default all events are enabled.
  22. Note that BIOS maintain another mask to disable specific events
  23. per bank. This is not visible here
  24. The following entries appear for each CPU, but they are truly shared
  25. between all CPUs.
  26. check_interval
  27. How often to poll for corrected machine check errors, in seconds
  28. (Note output is hexademical). Default 5 minutes. When the poller
  29. finds MCEs it triggers an exponential speedup (poll more often) on
  30. the polling interval. When the poller stops finding MCEs, it
  31. triggers an exponential backoff (poll less often) on the polling
  32. interval. The check_interval variable is both the initial and
  33. maximum polling interval.
  34. tolerant
  35. Tolerance level. When a machine check exception occurs for a non
  36. corrected machine check the kernel can take different actions.
  37. Since machine check exceptions can happen any time it is sometimes
  38. risky for the kernel to kill a process because it defies
  39. normal kernel locking rules. The tolerance level configures
  40. how hard the kernel tries to recover even at some risk of
  41. deadlock. Higher tolerant values trade potentially better uptime
  42. with the risk of a crash or even corruption (for tolerant >= 3).
  43. 0: always panic on uncorrected errors, log corrected errors
  44. 1: panic or SIGBUS on uncorrected errors, log corrected errors
  45. 2: SIGBUS or log uncorrected errors, log corrected errors
  46. 3: never panic or SIGBUS, log all errors (for testing only)
  47. Default: 1
  48. Note this only makes a difference if the CPU allows recovery
  49. from a machine check exception. Current x86 CPUs generally do not.
  50. trigger
  51. Program to run when a machine check event is detected.
  52. This is an alternative to running mcelog regularly from cron
  53. and allows to detect events faster.
  54. TBD document entries for AMD threshold interrupt configuration
  55. For more details about the x86 machine check architecture
  56. see the Intel and AMD architecture manuals from their developer websites.
  57. For more details about the architecture see
  58. see http://one.firstfloor.org/~andi/mce.pdf