pmc.txt 2.5 KB

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  1. * Power Management Controller
  2. Properties:
  3. - compatible: "fsl,<chip>-pmc".
  4. "fsl,mpc8349-pmc" should be listed for any chip whose PMC is
  5. compatible. "fsl,mpc8313-pmc" should also be listed for any chip
  6. whose PMC is compatible, and implies deep-sleep capability.
  7. "fsl,mpc8548-pmc" should be listed for any chip whose PMC is
  8. compatible. "fsl,mpc8536-pmc" should also be listed for any chip
  9. whose PMC is compatible, and implies deep-sleep capability.
  10. "fsl,mpc8641d-pmc" should be listed for any chip whose PMC is
  11. compatible; all statements below that apply to "fsl,mpc8548-pmc" also
  12. apply to "fsl,mpc8641d-pmc".
  13. Compatibility does not include bit assigments in SCCR/PMCDR/DEVDISR; these
  14. bit assigments are indicated via the sleep specifier in each device's
  15. sleep property.
  16. - reg: For devices compatible with "fsl,mpc8349-pmc", the first resource
  17. is the PMC block, and the second resource is the Clock Configuration
  18. block.
  19. For devices compatible with "fsl,mpc8548-pmc", the first resource
  20. is a 32-byte block beginning with DEVDISR.
  21. - interrupts: For "fsl,mpc8349-pmc"-compatible devices, the first
  22. resource is the PMC block interrupt.
  23. - fsl,mpc8313-wakeup-timer: For "fsl,mpc8313-pmc"-compatible devices,
  24. this is a phandle to an "fsl,gtm" node on which timer 4 can be used as
  25. a wakeup source from deep sleep.
  26. Sleep specifiers:
  27. fsl,mpc8349-pmc: Sleep specifiers consist of one cell. For each bit
  28. that is set in the cell, the corresponding bit in SCCR will be saved
  29. and cleared on suspend, and restored on resume. This sleep controller
  30. supports disabling and resuming devices at any time.
  31. fsl,mpc8536-pmc: Sleep specifiers consist of three cells, the third of
  32. which will be ORed into PMCDR upon suspend, and cleared from PMCDR
  33. upon resume. The first two cells are as described for fsl,mpc8578-pmc.
  34. This sleep controller only supports disabling devices during system
  35. sleep, or permanently.
  36. fsl,mpc8548-pmc: Sleep specifiers consist of one or two cells, the
  37. first of which will be ORed into DEVDISR (and the second into
  38. DEVDISR2, if present -- this cell should be zero or absent if the
  39. hardware does not have DEVDISR2) upon a request for permanent device
  40. disabling. This sleep controller does not support configuring devices
  41. to disable during system sleep (unless supported by another compatible
  42. match), or dynamically.
  43. Example:
  44. power@b00 {
  45. compatible = "fsl,mpc8313-pmc", "fsl,mpc8349-pmc";
  46. reg = <0xb00 0x100 0xa00 0x100>;
  47. interrupts = <80 8>;
  48. };