cpqphp_core.c 38 KB

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  1. /*
  2. * Compaq Hot Plug Controller Driver
  3. *
  4. * Copyright (C) 1995,2001 Compaq Computer Corporation
  5. * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com>
  6. * Copyright (C) 2001 IBM Corp.
  7. *
  8. * All rights reserved.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or (at
  13. * your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful, but
  16. * WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  18. * NON INFRINGEMENT. See the GNU General Public License for more
  19. * details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24. *
  25. * Send feedback to <greg@kroah.com>
  26. *
  27. * Jan 12, 2003 - Added 66/100/133MHz PCI-X support,
  28. * Torben Mathiasen <torben.mathiasen@hp.com>
  29. *
  30. */
  31. #include <linux/config.h>
  32. #include <linux/module.h>
  33. #include <linux/moduleparam.h>
  34. #include <linux/kernel.h>
  35. #include <linux/types.h>
  36. #include <linux/proc_fs.h>
  37. #include <linux/slab.h>
  38. #include <linux/workqueue.h>
  39. #include <linux/pci.h>
  40. #include <linux/init.h>
  41. #include <linux/interrupt.h>
  42. #include <asm/uaccess.h>
  43. #include "cpqphp.h"
  44. #include "cpqphp_nvram.h"
  45. #include "../../../arch/i386/pci/pci.h" /* horrible hack showing how processor dependent we are... */
  46. /* Global variables */
  47. int cpqhp_debug;
  48. int cpqhp_legacy_mode;
  49. struct controller *cpqhp_ctrl_list; /* = NULL */
  50. struct pci_func *cpqhp_slot_list[256];
  51. /* local variables */
  52. static void __iomem *smbios_table;
  53. static void __iomem *smbios_start;
  54. static void __iomem *cpqhp_rom_start;
  55. static int power_mode;
  56. static int debug;
  57. #define DRIVER_VERSION "0.9.8"
  58. #define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>"
  59. #define DRIVER_DESC "Compaq Hot Plug PCI Controller Driver"
  60. MODULE_AUTHOR(DRIVER_AUTHOR);
  61. MODULE_DESCRIPTION(DRIVER_DESC);
  62. MODULE_LICENSE("GPL");
  63. module_param(power_mode, bool, 0644);
  64. MODULE_PARM_DESC(power_mode, "Power mode enabled or not");
  65. module_param(debug, bool, 0644);
  66. MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
  67. #define CPQHPC_MODULE_MINOR 208
  68. static int one_time_init (void);
  69. static int set_attention_status (struct hotplug_slot *slot, u8 value);
  70. static int process_SI (struct hotplug_slot *slot);
  71. static int process_SS (struct hotplug_slot *slot);
  72. static int hardware_test (struct hotplug_slot *slot, u32 value);
  73. static int get_power_status (struct hotplug_slot *slot, u8 *value);
  74. static int get_attention_status (struct hotplug_slot *slot, u8 *value);
  75. static int get_latch_status (struct hotplug_slot *slot, u8 *value);
  76. static int get_adapter_status (struct hotplug_slot *slot, u8 *value);
  77. static int get_max_bus_speed (struct hotplug_slot *slot, enum pci_bus_speed *value);
  78. static int get_cur_bus_speed (struct hotplug_slot *slot, enum pci_bus_speed *value);
  79. static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
  80. .owner = THIS_MODULE,
  81. .set_attention_status = set_attention_status,
  82. .enable_slot = process_SI,
  83. .disable_slot = process_SS,
  84. .hardware_test = hardware_test,
  85. .get_power_status = get_power_status,
  86. .get_attention_status = get_attention_status,
  87. .get_latch_status = get_latch_status,
  88. .get_adapter_status = get_adapter_status,
  89. .get_max_bus_speed = get_max_bus_speed,
  90. .get_cur_bus_speed = get_cur_bus_speed,
  91. };
  92. static inline int is_slot64bit(struct slot *slot)
  93. {
  94. return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0;
  95. }
  96. static inline int is_slot66mhz(struct slot *slot)
  97. {
  98. return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0;
  99. }
  100. /**
  101. * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region.
  102. *
  103. * @begin: begin pointer for region to be scanned.
  104. * @end: end pointer for region to be scanned.
  105. *
  106. * Returns pointer to the head of the SMBIOS tables (or NULL)
  107. *
  108. */
  109. static void __iomem * detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end)
  110. {
  111. void __iomem *fp;
  112. void __iomem *endp;
  113. u8 temp1, temp2, temp3, temp4;
  114. int status = 0;
  115. endp = (end - sizeof(u32) + 1);
  116. for (fp = begin; fp <= endp; fp += 16) {
  117. temp1 = readb(fp);
  118. temp2 = readb(fp+1);
  119. temp3 = readb(fp+2);
  120. temp4 = readb(fp+3);
  121. if (temp1 == '_' &&
  122. temp2 == 'S' &&
  123. temp3 == 'M' &&
  124. temp4 == '_') {
  125. status = 1;
  126. break;
  127. }
  128. }
  129. if (!status)
  130. fp = NULL;
  131. dbg("Discovered SMBIOS Entry point at %p\n", fp);
  132. return fp;
  133. }
  134. /**
  135. * init_SERR - Initializes the per slot SERR generation.
  136. *
  137. * For unexpected switch opens
  138. *
  139. */
  140. static int init_SERR(struct controller * ctrl)
  141. {
  142. u32 tempdword;
  143. u32 number_of_slots;
  144. u8 physical_slot;
  145. if (!ctrl)
  146. return 1;
  147. tempdword = ctrl->first_slot;
  148. number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
  149. // Loop through slots
  150. while (number_of_slots) {
  151. physical_slot = tempdword;
  152. writeb(0, ctrl->hpc_reg + SLOT_SERR);
  153. tempdword++;
  154. number_of_slots--;
  155. }
  156. return 0;
  157. }
  158. /* nice debugging output */
  159. static int pci_print_IRQ_route (void)
  160. {
  161. struct irq_routing_table *routing_table;
  162. int len;
  163. int loop;
  164. u8 tbus, tdevice, tslot;
  165. routing_table = pcibios_get_irq_routing_table();
  166. if (routing_table == NULL) {
  167. err("No BIOS Routing Table??? Not good\n");
  168. return -ENOMEM;
  169. }
  170. len = (routing_table->size - sizeof(struct irq_routing_table)) /
  171. sizeof(struct irq_info);
  172. // Make sure I got at least one entry
  173. if (len == 0) {
  174. kfree(routing_table);
  175. return -1;
  176. }
  177. dbg("bus dev func slot\n");
  178. for (loop = 0; loop < len; ++loop) {
  179. tbus = routing_table->slots[loop].bus;
  180. tdevice = routing_table->slots[loop].devfn;
  181. tslot = routing_table->slots[loop].slot;
  182. dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot);
  183. }
  184. kfree(routing_table);
  185. return 0;
  186. }
  187. /**
  188. * get_subsequent_smbios_entry: get the next entry from bios table.
  189. *
  190. * Gets the first entry if previous == NULL
  191. * Otherwise, returns the next entry
  192. * Uses global SMBIOS Table pointer
  193. *
  194. * @curr: %NULL or pointer to previously returned structure
  195. *
  196. * returns a pointer to an SMBIOS structure or NULL if none found
  197. */
  198. static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start,
  199. void __iomem *smbios_table,
  200. void __iomem *curr)
  201. {
  202. u8 bail = 0;
  203. u8 previous_byte = 1;
  204. void __iomem *p_temp;
  205. void __iomem *p_max;
  206. if (!smbios_table || !curr)
  207. return(NULL);
  208. // set p_max to the end of the table
  209. p_max = smbios_start + readw(smbios_table + ST_LENGTH);
  210. p_temp = curr;
  211. p_temp += readb(curr + SMBIOS_GENERIC_LENGTH);
  212. while ((p_temp < p_max) && !bail) {
  213. /* Look for the double NULL terminator
  214. * The first condition is the previous byte
  215. * and the second is the curr */
  216. if (!previous_byte && !(readb(p_temp))) {
  217. bail = 1;
  218. }
  219. previous_byte = readb(p_temp);
  220. p_temp++;
  221. }
  222. if (p_temp < p_max) {
  223. return p_temp;
  224. } else {
  225. return NULL;
  226. }
  227. }
  228. /**
  229. * get_SMBIOS_entry
  230. *
  231. * @type:SMBIOS structure type to be returned
  232. * @previous: %NULL or pointer to previously returned structure
  233. *
  234. * Gets the first entry of the specified type if previous == NULL
  235. * Otherwise, returns the next entry of the given type.
  236. * Uses global SMBIOS Table pointer
  237. * Uses get_subsequent_smbios_entry
  238. *
  239. * returns a pointer to an SMBIOS structure or %NULL if none found
  240. */
  241. static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start,
  242. void __iomem *smbios_table,
  243. u8 type,
  244. void __iomem *previous)
  245. {
  246. if (!smbios_table)
  247. return NULL;
  248. if (!previous) {
  249. previous = smbios_start;
  250. } else {
  251. previous = get_subsequent_smbios_entry(smbios_start,
  252. smbios_table, previous);
  253. }
  254. while (previous) {
  255. if (readb(previous + SMBIOS_GENERIC_TYPE) != type) {
  256. previous = get_subsequent_smbios_entry(smbios_start,
  257. smbios_table, previous);
  258. } else {
  259. break;
  260. }
  261. }
  262. return previous;
  263. }
  264. static void release_slot(struct hotplug_slot *hotplug_slot)
  265. {
  266. struct slot *slot = hotplug_slot->private;
  267. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  268. kfree(slot->hotplug_slot->info);
  269. kfree(slot->hotplug_slot->name);
  270. kfree(slot->hotplug_slot);
  271. kfree(slot);
  272. }
  273. static int ctrl_slot_setup(struct controller *ctrl,
  274. void __iomem *smbios_start,
  275. void __iomem *smbios_table)
  276. {
  277. struct slot *new_slot;
  278. u8 number_of_slots;
  279. u8 slot_device;
  280. u8 slot_number;
  281. u8 ctrl_slot;
  282. u32 tempdword;
  283. void __iomem *slot_entry= NULL;
  284. int result = -ENOMEM;
  285. dbg("%s\n", __FUNCTION__);
  286. tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
  287. number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
  288. slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
  289. slot_number = ctrl->first_slot;
  290. while (number_of_slots) {
  291. new_slot = kmalloc(sizeof(*new_slot), GFP_KERNEL);
  292. if (!new_slot)
  293. goto error;
  294. memset(new_slot, 0, sizeof(struct slot));
  295. new_slot->hotplug_slot = kmalloc(sizeof(*(new_slot->hotplug_slot)),
  296. GFP_KERNEL);
  297. if (!new_slot->hotplug_slot)
  298. goto error_slot;
  299. memset(new_slot->hotplug_slot, 0, sizeof(struct hotplug_slot));
  300. new_slot->hotplug_slot->info =
  301. kmalloc(sizeof(*(new_slot->hotplug_slot->info)),
  302. GFP_KERNEL);
  303. if (!new_slot->hotplug_slot->info)
  304. goto error_hpslot;
  305. memset(new_slot->hotplug_slot->info, 0,
  306. sizeof(struct hotplug_slot_info));
  307. new_slot->hotplug_slot->name = kmalloc(SLOT_NAME_SIZE, GFP_KERNEL);
  308. if (!new_slot->hotplug_slot->name)
  309. goto error_info;
  310. new_slot->ctrl = ctrl;
  311. new_slot->bus = ctrl->bus;
  312. new_slot->device = slot_device;
  313. new_slot->number = slot_number;
  314. dbg("slot->number = %d\n",new_slot->number);
  315. slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9,
  316. slot_entry);
  317. while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) != new_slot->number)) {
  318. slot_entry = get_SMBIOS_entry(smbios_start,
  319. smbios_table, 9, slot_entry);
  320. }
  321. new_slot->p_sm_slot = slot_entry;
  322. init_timer(&new_slot->task_event);
  323. new_slot->task_event.expires = jiffies + 5 * HZ;
  324. new_slot->task_event.function = cpqhp_pushbutton_thread;
  325. //FIXME: these capabilities aren't used but if they are
  326. // they need to be correctly implemented
  327. new_slot->capabilities |= PCISLOT_REPLACE_SUPPORTED;
  328. new_slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED;
  329. if (is_slot64bit(new_slot))
  330. new_slot->capabilities |= PCISLOT_64_BIT_SUPPORTED;
  331. if (is_slot66mhz(new_slot))
  332. new_slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED;
  333. if (ctrl->speed == PCI_SPEED_66MHz)
  334. new_slot->capabilities |= PCISLOT_66_MHZ_OPERATION;
  335. ctrl_slot = slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4);
  336. // Check presence
  337. new_slot->capabilities |= ((((~tempdword) >> 23) | ((~tempdword) >> 15)) >> ctrl_slot) & 0x02;
  338. // Check the switch state
  339. new_slot->capabilities |= ((~tempdword & 0xFF) >> ctrl_slot) & 0x01;
  340. // Check the slot enable
  341. new_slot->capabilities |= ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04;
  342. /* register this slot with the hotplug pci core */
  343. new_slot->hotplug_slot->release = &release_slot;
  344. new_slot->hotplug_slot->private = new_slot;
  345. make_slot_name(new_slot->hotplug_slot->name, SLOT_NAME_SIZE, new_slot);
  346. new_slot->hotplug_slot->ops = &cpqphp_hotplug_slot_ops;
  347. new_slot->hotplug_slot->info->power_status = get_slot_enabled(ctrl, new_slot);
  348. new_slot->hotplug_slot->info->attention_status = cpq_get_attention_status(ctrl, new_slot);
  349. new_slot->hotplug_slot->info->latch_status = cpq_get_latch_status(ctrl, new_slot);
  350. new_slot->hotplug_slot->info->adapter_status = get_presence_status(ctrl, new_slot);
  351. dbg ("registering bus %d, dev %d, number %d, "
  352. "ctrl->slot_device_offset %d, slot %d\n",
  353. new_slot->bus, new_slot->device,
  354. new_slot->number, ctrl->slot_device_offset,
  355. slot_number);
  356. result = pci_hp_register (new_slot->hotplug_slot);
  357. if (result) {
  358. err ("pci_hp_register failed with error %d\n", result);
  359. goto error_name;
  360. }
  361. new_slot->next = ctrl->slot;
  362. ctrl->slot = new_slot;
  363. number_of_slots--;
  364. slot_device++;
  365. slot_number++;
  366. }
  367. return 0;
  368. error_name:
  369. kfree(new_slot->hotplug_slot->name);
  370. error_info:
  371. kfree(new_slot->hotplug_slot->info);
  372. error_hpslot:
  373. kfree(new_slot->hotplug_slot);
  374. error_slot:
  375. kfree(new_slot);
  376. error:
  377. return result;
  378. }
  379. static int ctrl_slot_cleanup (struct controller * ctrl)
  380. {
  381. struct slot *old_slot, *next_slot;
  382. old_slot = ctrl->slot;
  383. ctrl->slot = NULL;
  384. while (old_slot) {
  385. /* memory will be freed by the release_slot callback */
  386. next_slot = old_slot->next;
  387. pci_hp_deregister (old_slot->hotplug_slot);
  388. old_slot = next_slot;
  389. }
  390. //Free IRQ associated with hot plug device
  391. free_irq(ctrl->interrupt, ctrl);
  392. //Unmap the memory
  393. iounmap(ctrl->hpc_reg);
  394. //Finally reclaim PCI mem
  395. release_mem_region(pci_resource_start(ctrl->pci_dev, 0),
  396. pci_resource_len(ctrl->pci_dev, 0));
  397. return(0);
  398. }
  399. //============================================================================
  400. // function: get_slot_mapping
  401. //
  402. // Description: Attempts to determine a logical slot mapping for a PCI
  403. // device. Won't work for more than one PCI-PCI bridge
  404. // in a slot.
  405. //
  406. // Input: u8 bus_num - bus number of PCI device
  407. // u8 dev_num - device number of PCI device
  408. // u8 *slot - Pointer to u8 where slot number will
  409. // be returned
  410. //
  411. // Output: SUCCESS or FAILURE
  412. //=============================================================================
  413. static int
  414. get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
  415. {
  416. struct irq_routing_table *PCIIRQRoutingInfoLength;
  417. u32 work;
  418. long len;
  419. long loop;
  420. u8 tbus, tdevice, tslot, bridgeSlot;
  421. dbg("%s: %p, %d, %d, %p\n", __FUNCTION__, bus, bus_num, dev_num, slot);
  422. bridgeSlot = 0xFF;
  423. PCIIRQRoutingInfoLength = pcibios_get_irq_routing_table();
  424. if (!PCIIRQRoutingInfoLength)
  425. return -1;
  426. len = (PCIIRQRoutingInfoLength->size -
  427. sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
  428. // Make sure I got at least one entry
  429. if (len == 0) {
  430. kfree(PCIIRQRoutingInfoLength);
  431. return -1;
  432. }
  433. for (loop = 0; loop < len; ++loop) {
  434. tbus = PCIIRQRoutingInfoLength->slots[loop].bus;
  435. tdevice = PCIIRQRoutingInfoLength->slots[loop].devfn >> 3;
  436. tslot = PCIIRQRoutingInfoLength->slots[loop].slot;
  437. if ((tbus == bus_num) && (tdevice == dev_num)) {
  438. *slot = tslot;
  439. kfree(PCIIRQRoutingInfoLength);
  440. return 0;
  441. } else {
  442. /* Did not get a match on the target PCI device. Check
  443. * if the current IRQ table entry is a PCI-to-PCI bridge
  444. * device. If so, and it's secondary bus matches the
  445. * bus number for the target device, I need to save the
  446. * bridge's slot number. If I can not find an entry for
  447. * the target device, I will have to assume it's on the
  448. * other side of the bridge, and assign it the bridge's
  449. * slot. */
  450. bus->number = tbus;
  451. pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0),
  452. PCI_REVISION_ID, &work);
  453. if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
  454. pci_bus_read_config_dword(bus,
  455. PCI_DEVFN(tdevice, 0),
  456. PCI_PRIMARY_BUS, &work);
  457. // See if bridge's secondary bus matches target bus.
  458. if (((work >> 8) & 0x000000FF) == (long) bus_num) {
  459. bridgeSlot = tslot;
  460. }
  461. }
  462. }
  463. }
  464. // If we got here, we didn't find an entry in the IRQ mapping table
  465. // for the target PCI device. If we did determine that the target
  466. // device is on the other side of a PCI-to-PCI bridge, return the
  467. // slot number for the bridge.
  468. if (bridgeSlot != 0xFF) {
  469. *slot = bridgeSlot;
  470. kfree(PCIIRQRoutingInfoLength);
  471. return 0;
  472. }
  473. kfree(PCIIRQRoutingInfoLength);
  474. // Couldn't find an entry in the routing table for this PCI device
  475. return -1;
  476. }
  477. /**
  478. * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off
  479. *
  480. */
  481. static int
  482. cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
  483. u32 status)
  484. {
  485. u8 hp_slot;
  486. if (func == NULL)
  487. return(1);
  488. hp_slot = func->device - ctrl->slot_device_offset;
  489. // Wait for exclusive access to hardware
  490. down(&ctrl->crit_sect);
  491. if (status == 1) {
  492. amber_LED_on (ctrl, hp_slot);
  493. } else if (status == 0) {
  494. amber_LED_off (ctrl, hp_slot);
  495. } else {
  496. // Done with exclusive hardware access
  497. up(&ctrl->crit_sect);
  498. return(1);
  499. }
  500. set_SOGO(ctrl);
  501. // Wait for SOBS to be unset
  502. wait_for_ctrl_irq (ctrl);
  503. // Done with exclusive hardware access
  504. up(&ctrl->crit_sect);
  505. return(0);
  506. }
  507. /**
  508. * set_attention_status - Turns the Amber LED for a slot on or off
  509. *
  510. */
  511. static int set_attention_status (struct hotplug_slot *hotplug_slot, u8 status)
  512. {
  513. struct pci_func *slot_func;
  514. struct slot *slot = hotplug_slot->private;
  515. struct controller *ctrl = slot->ctrl;
  516. u8 bus;
  517. u8 devfn;
  518. u8 device;
  519. u8 function;
  520. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  521. if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
  522. return -ENODEV;
  523. device = devfn >> 3;
  524. function = devfn & 0x7;
  525. dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
  526. slot_func = cpqhp_slot_find(bus, device, function);
  527. if (!slot_func)
  528. return -ENODEV;
  529. return cpqhp_set_attention_status(ctrl, slot_func, status);
  530. }
  531. static int process_SI(struct hotplug_slot *hotplug_slot)
  532. {
  533. struct pci_func *slot_func;
  534. struct slot *slot = hotplug_slot->private;
  535. struct controller *ctrl = slot->ctrl;
  536. u8 bus;
  537. u8 devfn;
  538. u8 device;
  539. u8 function;
  540. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  541. if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
  542. return -ENODEV;
  543. device = devfn >> 3;
  544. function = devfn & 0x7;
  545. dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
  546. slot_func = cpqhp_slot_find(bus, device, function);
  547. if (!slot_func)
  548. return -ENODEV;
  549. slot_func->bus = bus;
  550. slot_func->device = device;
  551. slot_func->function = function;
  552. slot_func->configured = 0;
  553. dbg("board_added(%p, %p)\n", slot_func, ctrl);
  554. return cpqhp_process_SI(ctrl, slot_func);
  555. }
  556. static int process_SS(struct hotplug_slot *hotplug_slot)
  557. {
  558. struct pci_func *slot_func;
  559. struct slot *slot = hotplug_slot->private;
  560. struct controller *ctrl = slot->ctrl;
  561. u8 bus;
  562. u8 devfn;
  563. u8 device;
  564. u8 function;
  565. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  566. if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
  567. return -ENODEV;
  568. device = devfn >> 3;
  569. function = devfn & 0x7;
  570. dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
  571. slot_func = cpqhp_slot_find(bus, device, function);
  572. if (!slot_func)
  573. return -ENODEV;
  574. dbg("In %s, slot_func = %p, ctrl = %p\n", __FUNCTION__, slot_func, ctrl);
  575. return cpqhp_process_SS(ctrl, slot_func);
  576. }
  577. static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value)
  578. {
  579. struct slot *slot = hotplug_slot->private;
  580. struct controller *ctrl = slot->ctrl;
  581. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  582. return cpqhp_hardware_test(ctrl, value);
  583. }
  584. static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value)
  585. {
  586. struct slot *slot = hotplug_slot->private;
  587. struct controller *ctrl = slot->ctrl;
  588. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  589. *value = get_slot_enabled(ctrl, slot);
  590. return 0;
  591. }
  592. static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
  593. {
  594. struct slot *slot = hotplug_slot->private;
  595. struct controller *ctrl = slot->ctrl;
  596. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  597. *value = cpq_get_attention_status(ctrl, slot);
  598. return 0;
  599. }
  600. static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
  601. {
  602. struct slot *slot = hotplug_slot->private;
  603. struct controller *ctrl = slot->ctrl;
  604. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  605. *value = cpq_get_latch_status(ctrl, slot);
  606. return 0;
  607. }
  608. static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
  609. {
  610. struct slot *slot = hotplug_slot->private;
  611. struct controller *ctrl = slot->ctrl;
  612. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  613. *value = get_presence_status(ctrl, slot);
  614. return 0;
  615. }
  616. static int get_max_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
  617. {
  618. struct slot *slot = hotplug_slot->private;
  619. struct controller *ctrl = slot->ctrl;
  620. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  621. *value = ctrl->speed_capability;
  622. return 0;
  623. }
  624. static int get_cur_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
  625. {
  626. struct slot *slot = hotplug_slot->private;
  627. struct controller *ctrl = slot->ctrl;
  628. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  629. *value = ctrl->speed;
  630. return 0;
  631. }
  632. static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  633. {
  634. u8 num_of_slots = 0;
  635. u8 hp_slot = 0;
  636. u8 device;
  637. u8 rev;
  638. u8 bus_cap;
  639. u16 temp_word;
  640. u16 vendor_id;
  641. u16 subsystem_vid;
  642. u16 subsystem_deviceid;
  643. u32 rc;
  644. struct controller *ctrl;
  645. struct pci_func *func;
  646. // Need to read VID early b/c it's used to differentiate CPQ and INTC discovery
  647. rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id);
  648. if (rc || ((vendor_id != PCI_VENDOR_ID_COMPAQ) && (vendor_id != PCI_VENDOR_ID_INTEL))) {
  649. err(msg_HPC_non_compaq_or_intel);
  650. return -ENODEV;
  651. }
  652. dbg("Vendor ID: %x\n", vendor_id);
  653. rc = pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
  654. dbg("revision: %d\n", rev);
  655. if (rc || ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!rev))) {
  656. err(msg_HPC_rev_error);
  657. return -ENODEV;
  658. }
  659. /* Check for the proper subsytem ID's
  660. * Intel uses a different SSID programming model than Compaq.
  661. * For Intel, each SSID bit identifies a PHP capability.
  662. * Also Intel HPC's may have RID=0.
  663. */
  664. if ((rev > 2) || (vendor_id == PCI_VENDOR_ID_INTEL)) {
  665. // TODO: This code can be made to support non-Compaq or Intel subsystem IDs
  666. rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid);
  667. if (rc) {
  668. err("%s : pci_read_config_word failed\n", __FUNCTION__);
  669. return rc;
  670. }
  671. dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
  672. if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
  673. err(msg_HPC_non_compaq_or_intel);
  674. return -ENODEV;
  675. }
  676. ctrl = (struct controller *) kmalloc(sizeof(struct controller), GFP_KERNEL);
  677. if (!ctrl) {
  678. err("%s : out of memory\n", __FUNCTION__);
  679. return -ENOMEM;
  680. }
  681. memset(ctrl, 0, sizeof(struct controller));
  682. rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &subsystem_deviceid);
  683. if (rc) {
  684. err("%s : pci_read_config_word failed\n", __FUNCTION__);
  685. goto err_free_ctrl;
  686. }
  687. info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid);
  688. /* Set Vendor ID, so it can be accessed later from other functions */
  689. ctrl->vendor_id = vendor_id;
  690. switch (subsystem_vid) {
  691. case PCI_VENDOR_ID_COMPAQ:
  692. if (rev >= 0x13) { /* CIOBX */
  693. ctrl->push_flag = 1;
  694. ctrl->slot_switch_type = 1;
  695. ctrl->push_button = 1;
  696. ctrl->pci_config_space = 1;
  697. ctrl->defeature_PHP = 1;
  698. ctrl->pcix_support = 1;
  699. ctrl->pcix_speed_capability = 1;
  700. pci_read_config_byte(pdev, 0x41, &bus_cap);
  701. if (bus_cap & 0x80) {
  702. dbg("bus max supports 133MHz PCI-X\n");
  703. ctrl->speed_capability = PCI_SPEED_133MHz_PCIX;
  704. break;
  705. }
  706. if (bus_cap & 0x40) {
  707. dbg("bus max supports 100MHz PCI-X\n");
  708. ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
  709. break;
  710. }
  711. if (bus_cap & 20) {
  712. dbg("bus max supports 66MHz PCI-X\n");
  713. ctrl->speed_capability = PCI_SPEED_66MHz_PCIX;
  714. break;
  715. }
  716. if (bus_cap & 10) {
  717. dbg("bus max supports 66MHz PCI\n");
  718. ctrl->speed_capability = PCI_SPEED_66MHz;
  719. break;
  720. }
  721. break;
  722. }
  723. switch (subsystem_deviceid) {
  724. case PCI_SUB_HPC_ID:
  725. /* Original 6500/7000 implementation */
  726. ctrl->slot_switch_type = 1;
  727. ctrl->speed_capability = PCI_SPEED_33MHz;
  728. ctrl->push_button = 0;
  729. ctrl->pci_config_space = 1;
  730. ctrl->defeature_PHP = 1;
  731. ctrl->pcix_support = 0;
  732. ctrl->pcix_speed_capability = 0;
  733. break;
  734. case PCI_SUB_HPC_ID2:
  735. /* First Pushbutton implementation */
  736. ctrl->push_flag = 1;
  737. ctrl->slot_switch_type = 1;
  738. ctrl->speed_capability = PCI_SPEED_33MHz;
  739. ctrl->push_button = 1;
  740. ctrl->pci_config_space = 1;
  741. ctrl->defeature_PHP = 1;
  742. ctrl->pcix_support = 0;
  743. ctrl->pcix_speed_capability = 0;
  744. break;
  745. case PCI_SUB_HPC_ID_INTC:
  746. /* Third party (6500/7000) */
  747. ctrl->slot_switch_type = 1;
  748. ctrl->speed_capability = PCI_SPEED_33MHz;
  749. ctrl->push_button = 0;
  750. ctrl->pci_config_space = 1;
  751. ctrl->defeature_PHP = 1;
  752. ctrl->pcix_support = 0;
  753. ctrl->pcix_speed_capability = 0;
  754. break;
  755. case PCI_SUB_HPC_ID3:
  756. /* First 66 Mhz implementation */
  757. ctrl->push_flag = 1;
  758. ctrl->slot_switch_type = 1;
  759. ctrl->speed_capability = PCI_SPEED_66MHz;
  760. ctrl->push_button = 1;
  761. ctrl->pci_config_space = 1;
  762. ctrl->defeature_PHP = 1;
  763. ctrl->pcix_support = 0;
  764. ctrl->pcix_speed_capability = 0;
  765. break;
  766. case PCI_SUB_HPC_ID4:
  767. /* First PCI-X implementation, 100MHz */
  768. ctrl->push_flag = 1;
  769. ctrl->slot_switch_type = 1;
  770. ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
  771. ctrl->push_button = 1;
  772. ctrl->pci_config_space = 1;
  773. ctrl->defeature_PHP = 1;
  774. ctrl->pcix_support = 1;
  775. ctrl->pcix_speed_capability = 0;
  776. break;
  777. default:
  778. err(msg_HPC_not_supported);
  779. rc = -ENODEV;
  780. goto err_free_ctrl;
  781. }
  782. break;
  783. case PCI_VENDOR_ID_INTEL:
  784. /* Check for speed capability (0=33, 1=66) */
  785. if (subsystem_deviceid & 0x0001) {
  786. ctrl->speed_capability = PCI_SPEED_66MHz;
  787. } else {
  788. ctrl->speed_capability = PCI_SPEED_33MHz;
  789. }
  790. /* Check for push button */
  791. if (subsystem_deviceid & 0x0002) {
  792. /* no push button */
  793. ctrl->push_button = 0;
  794. } else {
  795. /* push button supported */
  796. ctrl->push_button = 1;
  797. }
  798. /* Check for slot switch type (0=mechanical, 1=not mechanical) */
  799. if (subsystem_deviceid & 0x0004) {
  800. /* no switch */
  801. ctrl->slot_switch_type = 0;
  802. } else {
  803. /* switch */
  804. ctrl->slot_switch_type = 1;
  805. }
  806. /* PHP Status (0=De-feature PHP, 1=Normal operation) */
  807. if (subsystem_deviceid & 0x0008) {
  808. ctrl->defeature_PHP = 1; // PHP supported
  809. } else {
  810. ctrl->defeature_PHP = 0; // PHP not supported
  811. }
  812. /* Alternate Base Address Register Interface (0=not supported, 1=supported) */
  813. if (subsystem_deviceid & 0x0010) {
  814. ctrl->alternate_base_address = 1; // supported
  815. } else {
  816. ctrl->alternate_base_address = 0; // not supported
  817. }
  818. /* PCI Config Space Index (0=not supported, 1=supported) */
  819. if (subsystem_deviceid & 0x0020) {
  820. ctrl->pci_config_space = 1; // supported
  821. } else {
  822. ctrl->pci_config_space = 0; // not supported
  823. }
  824. /* PCI-X support */
  825. if (subsystem_deviceid & 0x0080) {
  826. /* PCI-X capable */
  827. ctrl->pcix_support = 1;
  828. /* Frequency of operation in PCI-X mode */
  829. if (subsystem_deviceid & 0x0040) {
  830. /* 133MHz PCI-X if bit 7 is 1 */
  831. ctrl->pcix_speed_capability = 1;
  832. } else {
  833. /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */
  834. /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */
  835. ctrl->pcix_speed_capability = 0;
  836. }
  837. } else {
  838. /* Conventional PCI */
  839. ctrl->pcix_support = 0;
  840. ctrl->pcix_speed_capability = 0;
  841. }
  842. break;
  843. default:
  844. err(msg_HPC_not_supported);
  845. rc = -ENODEV;
  846. goto err_free_ctrl;
  847. }
  848. } else {
  849. err(msg_HPC_not_supported);
  850. return -ENODEV;
  851. }
  852. // Tell the user that we found one.
  853. info("Initializing the PCI hot plug controller residing on PCI bus %d\n",
  854. pdev->bus->number);
  855. dbg("Hotplug controller capabilities:\n");
  856. dbg(" speed_capability %d\n", ctrl->speed_capability);
  857. dbg(" slot_switch_type %s\n", ctrl->slot_switch_type ?
  858. "switch present" : "no switch");
  859. dbg(" defeature_PHP %s\n", ctrl->defeature_PHP ?
  860. "PHP supported" : "PHP not supported");
  861. dbg(" alternate_base_address %s\n", ctrl->alternate_base_address ?
  862. "supported" : "not supported");
  863. dbg(" pci_config_space %s\n", ctrl->pci_config_space ?
  864. "supported" : "not supported");
  865. dbg(" pcix_speed_capability %s\n", ctrl->pcix_speed_capability ?
  866. "supported" : "not supported");
  867. dbg(" pcix_support %s\n", ctrl->pcix_support ?
  868. "supported" : "not supported");
  869. ctrl->pci_dev = pdev;
  870. pci_set_drvdata(pdev, ctrl);
  871. /* make our own copy of the pci bus structure,
  872. * as we like tweaking it a lot */
  873. ctrl->pci_bus = kmalloc(sizeof(*ctrl->pci_bus), GFP_KERNEL);
  874. if (!ctrl->pci_bus) {
  875. err("out of memory\n");
  876. rc = -ENOMEM;
  877. goto err_free_ctrl;
  878. }
  879. memcpy(ctrl->pci_bus, pdev->bus, sizeof(*ctrl->pci_bus));
  880. ctrl->bus = pdev->bus->number;
  881. ctrl->rev = rev;
  882. dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
  883. PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
  884. init_MUTEX(&ctrl->crit_sect);
  885. init_waitqueue_head(&ctrl->queue);
  886. /* initialize our threads if they haven't already been started up */
  887. rc = one_time_init();
  888. if (rc) {
  889. goto err_free_bus;
  890. }
  891. dbg("pdev = %p\n", pdev);
  892. dbg("pci resource start %lx\n", pci_resource_start(pdev, 0));
  893. dbg("pci resource len %lx\n", pci_resource_len(pdev, 0));
  894. if (!request_mem_region(pci_resource_start(pdev, 0),
  895. pci_resource_len(pdev, 0), MY_NAME)) {
  896. err("cannot reserve MMIO region\n");
  897. rc = -ENOMEM;
  898. goto err_free_bus;
  899. }
  900. ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0),
  901. pci_resource_len(pdev, 0));
  902. if (!ctrl->hpc_reg) {
  903. err("cannot remap MMIO region %lx @ %lx\n",
  904. pci_resource_len(pdev, 0),
  905. pci_resource_start(pdev, 0));
  906. rc = -ENODEV;
  907. goto err_free_mem_region;
  908. }
  909. // Check for 66Mhz operation
  910. ctrl->speed = get_controller_speed(ctrl);
  911. /********************************************************
  912. *
  913. * Save configuration headers for this and
  914. * subordinate PCI buses
  915. *
  916. ********************************************************/
  917. // find the physical slot number of the first hot plug slot
  918. /* Get slot won't work for devices behind bridges, but
  919. * in this case it will always be called for the "base"
  920. * bus/dev/func of a slot.
  921. * CS: this is leveraging the PCIIRQ routing code from the kernel
  922. * (pci-pc.c: get_irq_routing_table) */
  923. rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number,
  924. (readb(ctrl->hpc_reg + SLOT_MASK) >> 4),
  925. &(ctrl->first_slot));
  926. dbg("get_slot_mapping: first_slot = %d, returned = %d\n",
  927. ctrl->first_slot, rc);
  928. if (rc) {
  929. err(msg_initialization_err, rc);
  930. goto err_iounmap;
  931. }
  932. // Store PCI Config Space for all devices on this bus
  933. rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK));
  934. if (rc) {
  935. err("%s: unable to save PCI configuration data, error %d\n",
  936. __FUNCTION__, rc);
  937. goto err_iounmap;
  938. }
  939. /*
  940. * Get IO, memory, and IRQ resources for new devices
  941. */
  942. // The next line is required for cpqhp_find_available_resources
  943. ctrl->interrupt = pdev->irq;
  944. if (ctrl->interrupt < 0x10) {
  945. cpqhp_legacy_mode = 1;
  946. dbg("System seems to be configured for Full Table Mapped MPS mode\n");
  947. }
  948. ctrl->cfgspc_irq = 0;
  949. pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq);
  950. rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start);
  951. ctrl->add_support = !rc;
  952. if (rc) {
  953. dbg("cpqhp_find_available_resources = 0x%x\n", rc);
  954. err("unable to locate PCI configuration resources for hot plug add.\n");
  955. goto err_iounmap;
  956. }
  957. /*
  958. * Finish setting up the hot plug ctrl device
  959. */
  960. ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
  961. dbg("NumSlots %d \n", ctrl->slot_device_offset);
  962. ctrl->next_event = 0;
  963. /* Setup the slot information structures */
  964. rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table);
  965. if (rc) {
  966. err(msg_initialization_err, 6);
  967. err("%s: unable to save PCI configuration data, error %d\n",
  968. __FUNCTION__, rc);
  969. goto err_iounmap;
  970. }
  971. /* Mask all general input interrupts */
  972. writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
  973. /* set up the interrupt */
  974. dbg("HPC interrupt = %d \n", ctrl->interrupt);
  975. if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr,
  976. SA_SHIRQ, MY_NAME, ctrl)) {
  977. err("Can't get irq %d for the hotplug pci controller\n",
  978. ctrl->interrupt);
  979. rc = -ENODEV;
  980. goto err_iounmap;
  981. }
  982. /* Enable Shift Out interrupt and clear it, also enable SERR on power fault */
  983. temp_word = readw(ctrl->hpc_reg + MISC);
  984. temp_word |= 0x4006;
  985. writew(temp_word, ctrl->hpc_reg + MISC);
  986. // Changed 05/05/97 to clear all interrupts at start
  987. writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
  988. ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
  989. writel(0x0L, ctrl->hpc_reg + INT_MASK);
  990. if (!cpqhp_ctrl_list) {
  991. cpqhp_ctrl_list = ctrl;
  992. ctrl->next = NULL;
  993. } else {
  994. ctrl->next = cpqhp_ctrl_list;
  995. cpqhp_ctrl_list = ctrl;
  996. }
  997. // turn off empty slots here unless command line option "ON" set
  998. // Wait for exclusive access to hardware
  999. down(&ctrl->crit_sect);
  1000. num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
  1001. // find first device number for the ctrl
  1002. device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
  1003. while (num_of_slots) {
  1004. dbg("num_of_slots: %d\n", num_of_slots);
  1005. func = cpqhp_slot_find(ctrl->bus, device, 0);
  1006. if (!func)
  1007. break;
  1008. hp_slot = func->device - ctrl->slot_device_offset;
  1009. dbg("hp_slot: %d\n", hp_slot);
  1010. // We have to save the presence info for these slots
  1011. temp_word = ctrl->ctrl_int_comp >> 16;
  1012. func->presence_save = (temp_word >> hp_slot) & 0x01;
  1013. func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
  1014. if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
  1015. func->switch_save = 0;
  1016. } else {
  1017. func->switch_save = 0x10;
  1018. }
  1019. if (!power_mode) {
  1020. if (!func->is_a_board) {
  1021. green_LED_off(ctrl, hp_slot);
  1022. slot_disable(ctrl, hp_slot);
  1023. }
  1024. }
  1025. device++;
  1026. num_of_slots--;
  1027. }
  1028. if (!power_mode) {
  1029. set_SOGO(ctrl);
  1030. // Wait for SOBS to be unset
  1031. wait_for_ctrl_irq(ctrl);
  1032. }
  1033. rc = init_SERR(ctrl);
  1034. if (rc) {
  1035. err("init_SERR failed\n");
  1036. up(&ctrl->crit_sect);
  1037. goto err_free_irq;
  1038. }
  1039. // Done with exclusive hardware access
  1040. up(&ctrl->crit_sect);
  1041. cpqhp_create_ctrl_files(ctrl);
  1042. return 0;
  1043. err_free_irq:
  1044. free_irq(ctrl->interrupt, ctrl);
  1045. err_iounmap:
  1046. iounmap(ctrl->hpc_reg);
  1047. err_free_mem_region:
  1048. release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
  1049. err_free_bus:
  1050. kfree(ctrl->pci_bus);
  1051. err_free_ctrl:
  1052. kfree(ctrl);
  1053. return rc;
  1054. }
  1055. static int one_time_init(void)
  1056. {
  1057. int loop;
  1058. int retval = 0;
  1059. static int initialized = 0;
  1060. if (initialized)
  1061. return 0;
  1062. power_mode = 0;
  1063. retval = pci_print_IRQ_route();
  1064. if (retval)
  1065. goto error;
  1066. dbg("Initialize + Start the notification mechanism \n");
  1067. retval = cpqhp_event_start_thread();
  1068. if (retval)
  1069. goto error;
  1070. dbg("Initialize slot lists\n");
  1071. for (loop = 0; loop < 256; loop++) {
  1072. cpqhp_slot_list[loop] = NULL;
  1073. }
  1074. // FIXME: We also need to hook the NMI handler eventually.
  1075. // this also needs to be worked with Christoph
  1076. // register_NMI_handler();
  1077. // Map rom address
  1078. cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
  1079. if (!cpqhp_rom_start) {
  1080. err ("Could not ioremap memory region for ROM\n");
  1081. retval = -EIO;
  1082. goto error;
  1083. }
  1084. /* Now, map the int15 entry point if we are on compaq specific hardware */
  1085. compaq_nvram_init(cpqhp_rom_start);
  1086. /* Map smbios table entry point structure */
  1087. smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start,
  1088. cpqhp_rom_start + ROM_PHY_LEN);
  1089. if (!smbios_table) {
  1090. err ("Could not find the SMBIOS pointer in memory\n");
  1091. retval = -EIO;
  1092. goto error_rom_start;
  1093. }
  1094. smbios_start = ioremap(readl(smbios_table + ST_ADDRESS),
  1095. readw(smbios_table + ST_LENGTH));
  1096. if (!smbios_start) {
  1097. err ("Could not ioremap memory region taken from SMBIOS values\n");
  1098. retval = -EIO;
  1099. goto error_smbios_start;
  1100. }
  1101. initialized = 1;
  1102. return retval;
  1103. error_smbios_start:
  1104. iounmap(smbios_start);
  1105. error_rom_start:
  1106. iounmap(cpqhp_rom_start);
  1107. error:
  1108. return retval;
  1109. }
  1110. static void __exit unload_cpqphpd(void)
  1111. {
  1112. struct pci_func *next;
  1113. struct pci_func *TempSlot;
  1114. int loop;
  1115. u32 rc;
  1116. struct controller *ctrl;
  1117. struct controller *tctrl;
  1118. struct pci_resource *res;
  1119. struct pci_resource *tres;
  1120. rc = compaq_nvram_store(cpqhp_rom_start);
  1121. ctrl = cpqhp_ctrl_list;
  1122. while (ctrl) {
  1123. if (ctrl->hpc_reg) {
  1124. u16 misc;
  1125. rc = read_slot_enable (ctrl);
  1126. writeb(0, ctrl->hpc_reg + SLOT_SERR);
  1127. writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
  1128. misc = readw(ctrl->hpc_reg + MISC);
  1129. misc &= 0xFFFD;
  1130. writew(misc, ctrl->hpc_reg + MISC);
  1131. }
  1132. ctrl_slot_cleanup(ctrl);
  1133. res = ctrl->io_head;
  1134. while (res) {
  1135. tres = res;
  1136. res = res->next;
  1137. kfree(tres);
  1138. }
  1139. res = ctrl->mem_head;
  1140. while (res) {
  1141. tres = res;
  1142. res = res->next;
  1143. kfree(tres);
  1144. }
  1145. res = ctrl->p_mem_head;
  1146. while (res) {
  1147. tres = res;
  1148. res = res->next;
  1149. kfree(tres);
  1150. }
  1151. res = ctrl->bus_head;
  1152. while (res) {
  1153. tres = res;
  1154. res = res->next;
  1155. kfree(tres);
  1156. }
  1157. kfree (ctrl->pci_bus);
  1158. tctrl = ctrl;
  1159. ctrl = ctrl->next;
  1160. kfree(tctrl);
  1161. }
  1162. for (loop = 0; loop < 256; loop++) {
  1163. next = cpqhp_slot_list[loop];
  1164. while (next != NULL) {
  1165. res = next->io_head;
  1166. while (res) {
  1167. tres = res;
  1168. res = res->next;
  1169. kfree(tres);
  1170. }
  1171. res = next->mem_head;
  1172. while (res) {
  1173. tres = res;
  1174. res = res->next;
  1175. kfree(tres);
  1176. }
  1177. res = next->p_mem_head;
  1178. while (res) {
  1179. tres = res;
  1180. res = res->next;
  1181. kfree(tres);
  1182. }
  1183. res = next->bus_head;
  1184. while (res) {
  1185. tres = res;
  1186. res = res->next;
  1187. kfree(tres);
  1188. }
  1189. TempSlot = next;
  1190. next = next->next;
  1191. kfree(TempSlot);
  1192. }
  1193. }
  1194. // Stop the notification mechanism
  1195. cpqhp_event_stop_thread();
  1196. //unmap the rom address
  1197. if (cpqhp_rom_start)
  1198. iounmap(cpqhp_rom_start);
  1199. if (smbios_start)
  1200. iounmap(smbios_start);
  1201. }
  1202. static struct pci_device_id hpcd_pci_tbl[] = {
  1203. {
  1204. /* handle any PCI Hotplug controller */
  1205. .class = ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00),
  1206. .class_mask = ~0,
  1207. /* no matter who makes it */
  1208. .vendor = PCI_ANY_ID,
  1209. .device = PCI_ANY_ID,
  1210. .subvendor = PCI_ANY_ID,
  1211. .subdevice = PCI_ANY_ID,
  1212. }, { /* end: all zeroes */ }
  1213. };
  1214. MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl);
  1215. static struct pci_driver cpqhpc_driver = {
  1216. .name = "compaq_pci_hotplug",
  1217. .id_table = hpcd_pci_tbl,
  1218. .probe = cpqhpc_probe,
  1219. /* remove: cpqhpc_remove_one, */
  1220. };
  1221. static int __init cpqhpc_init(void)
  1222. {
  1223. int result;
  1224. cpqhp_debug = debug;
  1225. info (DRIVER_DESC " version: " DRIVER_VERSION "\n");
  1226. result = pci_register_driver(&cpqhpc_driver);
  1227. dbg("pci_register_driver = %d\n", result);
  1228. return result;
  1229. }
  1230. static void __exit cpqhpc_cleanup(void)
  1231. {
  1232. dbg("unload_cpqphpd()\n");
  1233. unload_cpqphpd();
  1234. dbg("pci_unregister_driver\n");
  1235. pci_unregister_driver(&cpqhpc_driver);
  1236. }
  1237. module_init(cpqhpc_init);
  1238. module_exit(cpqhpc_cleanup);