bfin_adv7393fb.c 20 KB

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  1. /*
  2. * Frame buffer driver for ADV7393/2 video encoder
  3. *
  4. * Copyright 2006-2009 Analog Devices Inc.
  5. * Licensed under the GPL-2 or late.
  6. */
  7. /*
  8. * TODO: Remove Globals
  9. * TODO: Code Cleanup
  10. */
  11. #define pr_fmt(fmt) DRIVER_NAME ": " fmt
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/errno.h>
  15. #include <linux/string.h>
  16. #include <linux/mm.h>
  17. #include <linux/tty.h>
  18. #include <linux/slab.h>
  19. #include <linux/delay.h>
  20. #include <linux/fb.h>
  21. #include <linux/ioport.h>
  22. #include <linux/init.h>
  23. #include <linux/types.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/sched.h>
  26. #include <asm/blackfin.h>
  27. #include <asm/irq.h>
  28. #include <asm/dma.h>
  29. #include <linux/uaccess.h>
  30. #include <linux/gpio.h>
  31. #include <asm/portmux.h>
  32. #include <linux/dma-mapping.h>
  33. #include <linux/proc_fs.h>
  34. #include <linux/platform_device.h>
  35. #include <linux/i2c.h>
  36. #include <linux/i2c-dev.h>
  37. #include "bfin_adv7393fb.h"
  38. static int mode = VMODE;
  39. static int mem = VMEM;
  40. static int nocursor = 1;
  41. static const unsigned short ppi_pins[] = {
  42. P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
  43. P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,
  44. P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,
  45. P_PPI0_D8, P_PPI0_D9, P_PPI0_D10, P_PPI0_D11,
  46. P_PPI0_D12, P_PPI0_D13, P_PPI0_D14, P_PPI0_D15,
  47. 0
  48. };
  49. /*
  50. * card parameters
  51. */
  52. static struct bfin_adv7393_fb_par {
  53. /* structure holding blackfin / adv7393 paramters when
  54. screen is blanked */
  55. struct {
  56. u8 Mode; /* ntsc/pal/? */
  57. } vga_state;
  58. atomic_t ref_count;
  59. } bfin_par;
  60. /* --------------------------------------------------------------------- */
  61. static struct fb_var_screeninfo bfin_adv7393_fb_defined = {
  62. .xres = 720,
  63. .yres = 480,
  64. .xres_virtual = 720,
  65. .yres_virtual = 480,
  66. .bits_per_pixel = 16,
  67. .activate = FB_ACTIVATE_TEST,
  68. .height = -1,
  69. .width = -1,
  70. .left_margin = 0,
  71. .right_margin = 0,
  72. .upper_margin = 0,
  73. .lower_margin = 0,
  74. .vmode = FB_VMODE_INTERLACED,
  75. .red = {11, 5, 0},
  76. .green = {5, 6, 0},
  77. .blue = {0, 5, 0},
  78. .transp = {0, 0, 0},
  79. };
  80. static struct fb_fix_screeninfo bfin_adv7393_fb_fix __devinitdata = {
  81. .id = "BFIN ADV7393",
  82. .smem_len = 720 * 480 * 2,
  83. .type = FB_TYPE_PACKED_PIXELS,
  84. .visual = FB_VISUAL_TRUECOLOR,
  85. .xpanstep = 0,
  86. .ypanstep = 0,
  87. .line_length = 720 * 2,
  88. .accel = FB_ACCEL_NONE
  89. };
  90. static struct fb_ops bfin_adv7393_fb_ops = {
  91. .owner = THIS_MODULE,
  92. .fb_open = bfin_adv7393_fb_open,
  93. .fb_release = bfin_adv7393_fb_release,
  94. .fb_check_var = bfin_adv7393_fb_check_var,
  95. .fb_pan_display = bfin_adv7393_fb_pan_display,
  96. .fb_blank = bfin_adv7393_fb_blank,
  97. .fb_fillrect = cfb_fillrect,
  98. .fb_copyarea = cfb_copyarea,
  99. .fb_imageblit = cfb_imageblit,
  100. .fb_cursor = bfin_adv7393_fb_cursor,
  101. .fb_setcolreg = bfin_adv7393_fb_setcolreg,
  102. };
  103. static int dma_desc_list(struct adv7393fb_device *fbdev, u16 arg)
  104. {
  105. if (arg == BUILD) { /* Build */
  106. fbdev->vb1 = l1_data_sram_zalloc(sizeof(struct dmasg));
  107. if (fbdev->vb1 == NULL)
  108. goto error;
  109. fbdev->av1 = l1_data_sram_zalloc(sizeof(struct dmasg));
  110. if (fbdev->av1 == NULL)
  111. goto error;
  112. fbdev->vb2 = l1_data_sram_zalloc(sizeof(struct dmasg));
  113. if (fbdev->vb2 == NULL)
  114. goto error;
  115. fbdev->av2 = l1_data_sram_zalloc(sizeof(struct dmasg));
  116. if (fbdev->av2 == NULL)
  117. goto error;
  118. /* Build linked DMA descriptor list */
  119. fbdev->vb1->next_desc_addr = fbdev->av1;
  120. fbdev->av1->next_desc_addr = fbdev->vb2;
  121. fbdev->vb2->next_desc_addr = fbdev->av2;
  122. fbdev->av2->next_desc_addr = fbdev->vb1;
  123. /* Save list head */
  124. fbdev->descriptor_list_head = fbdev->av2;
  125. /* Vertical Blanking Field 1 */
  126. fbdev->vb1->start_addr = VB_DUMMY_MEMORY_SOURCE;
  127. fbdev->vb1->cfg = DMA_CFG_VAL;
  128. fbdev->vb1->x_count =
  129. fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank;
  130. fbdev->vb1->x_modify = 0;
  131. fbdev->vb1->y_count = fbdev->modes[mode].vb1_lines;
  132. fbdev->vb1->y_modify = 0;
  133. /* Active Video Field 1 */
  134. fbdev->av1->start_addr = (unsigned long)fbdev->fb_mem;
  135. fbdev->av1->cfg = DMA_CFG_VAL;
  136. fbdev->av1->x_count =
  137. fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank;
  138. fbdev->av1->x_modify = fbdev->modes[mode].bpp / 8;
  139. fbdev->av1->y_count = fbdev->modes[mode].a_lines;
  140. fbdev->av1->y_modify =
  141. (fbdev->modes[mode].xres - fbdev->modes[mode].boeft_blank +
  142. 1) * (fbdev->modes[mode].bpp / 8);
  143. /* Vertical Blanking Field 2 */
  144. fbdev->vb2->start_addr = VB_DUMMY_MEMORY_SOURCE;
  145. fbdev->vb2->cfg = DMA_CFG_VAL;
  146. fbdev->vb2->x_count =
  147. fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank;
  148. fbdev->vb2->x_modify = 0;
  149. fbdev->vb2->y_count = fbdev->modes[mode].vb2_lines;
  150. fbdev->vb2->y_modify = 0;
  151. /* Active Video Field 2 */
  152. fbdev->av2->start_addr =
  153. (unsigned long)fbdev->fb_mem + fbdev->line_len;
  154. fbdev->av2->cfg = DMA_CFG_VAL;
  155. fbdev->av2->x_count =
  156. fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank;
  157. fbdev->av2->x_modify = (fbdev->modes[mode].bpp / 8);
  158. fbdev->av2->y_count = fbdev->modes[mode].a_lines;
  159. fbdev->av2->y_modify =
  160. (fbdev->modes[mode].xres - fbdev->modes[mode].boeft_blank +
  161. 1) * (fbdev->modes[mode].bpp / 8);
  162. return 1;
  163. }
  164. error:
  165. l1_data_sram_free(fbdev->vb1);
  166. l1_data_sram_free(fbdev->av1);
  167. l1_data_sram_free(fbdev->vb2);
  168. l1_data_sram_free(fbdev->av2);
  169. return 0;
  170. }
  171. static int bfin_config_dma(struct adv7393fb_device *fbdev)
  172. {
  173. BUG_ON(!(fbdev->fb_mem));
  174. set_dma_x_count(CH_PPI, fbdev->descriptor_list_head->x_count);
  175. set_dma_x_modify(CH_PPI, fbdev->descriptor_list_head->x_modify);
  176. set_dma_y_count(CH_PPI, fbdev->descriptor_list_head->y_count);
  177. set_dma_y_modify(CH_PPI, fbdev->descriptor_list_head->y_modify);
  178. set_dma_start_addr(CH_PPI, fbdev->descriptor_list_head->start_addr);
  179. set_dma_next_desc_addr(CH_PPI,
  180. fbdev->descriptor_list_head->next_desc_addr);
  181. set_dma_config(CH_PPI, fbdev->descriptor_list_head->cfg);
  182. return 1;
  183. }
  184. static void bfin_disable_dma(void)
  185. {
  186. bfin_write_DMA0_CONFIG(bfin_read_DMA0_CONFIG() & ~DMAEN);
  187. }
  188. static void bfin_config_ppi(struct adv7393fb_device *fbdev)
  189. {
  190. if (ANOMALY_05000183) {
  191. bfin_write_TIMER2_CONFIG(WDTH_CAP);
  192. bfin_write_TIMER_ENABLE(TIMEN2);
  193. }
  194. bfin_write_PPI_CONTROL(0x381E);
  195. bfin_write_PPI_FRAME(fbdev->modes[mode].tot_lines);
  196. bfin_write_PPI_COUNT(fbdev->modes[mode].xres +
  197. fbdev->modes[mode].boeft_blank - 1);
  198. bfin_write_PPI_DELAY(fbdev->modes[mode].aoeft_blank - 1);
  199. }
  200. static void bfin_enable_ppi(void)
  201. {
  202. bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() | PORT_EN);
  203. }
  204. static void bfin_disable_ppi(void)
  205. {
  206. bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() & ~PORT_EN);
  207. }
  208. static inline int adv7393_write(struct i2c_client *client, u8 reg, u8 value)
  209. {
  210. return i2c_smbus_write_byte_data(client, reg, value);
  211. }
  212. static inline int adv7393_read(struct i2c_client *client, u8 reg)
  213. {
  214. return i2c_smbus_read_byte_data(client, reg);
  215. }
  216. static int
  217. adv7393_write_block(struct i2c_client *client,
  218. const u8 *data, unsigned int len)
  219. {
  220. int ret = -1;
  221. u8 reg;
  222. while (len >= 2) {
  223. reg = *data++;
  224. ret = adv7393_write(client, reg, *data++);
  225. if (ret < 0)
  226. break;
  227. len -= 2;
  228. }
  229. return ret;
  230. }
  231. static int adv7393_mode(struct i2c_client *client, u16 mode)
  232. {
  233. switch (mode) {
  234. case POWER_ON: /* ADV7393 Sleep mode OFF */
  235. adv7393_write(client, 0x00, 0x1E);
  236. break;
  237. case POWER_DOWN: /* ADV7393 Sleep mode ON */
  238. adv7393_write(client, 0x00, 0x1F);
  239. break;
  240. case BLANK_OFF: /* Pixel Data Valid */
  241. adv7393_write(client, 0x82, 0xCB);
  242. break;
  243. case BLANK_ON: /* Pixel Data Invalid */
  244. adv7393_write(client, 0x82, 0x8B);
  245. break;
  246. default:
  247. return -EINVAL;
  248. break;
  249. }
  250. return 0;
  251. }
  252. static irqreturn_t ppi_irq_error(int irq, void *dev_id)
  253. {
  254. struct adv7393fb_device *fbdev = (struct adv7393fb_device *)dev_id;
  255. u16 status = bfin_read_PPI_STATUS();
  256. pr_debug("%s: PPI Status = 0x%X\n", __func__, status);
  257. if (status) {
  258. bfin_disable_dma(); /* TODO: Check Sequence */
  259. bfin_disable_ppi();
  260. bfin_clear_PPI_STATUS();
  261. bfin_config_dma(fbdev);
  262. bfin_enable_ppi();
  263. }
  264. return IRQ_HANDLED;
  265. }
  266. static int proc_output(char *buf)
  267. {
  268. char *p = buf;
  269. p += sprintf(p,
  270. "Usage:\n"
  271. "echo 0x[REG][Value] > adv7393\n"
  272. "example: echo 0x1234 >adv7393\n"
  273. "writes 0x34 into Register 0x12\n");
  274. return p - buf;
  275. }
  276. static int
  277. adv7393_read_proc(char *page, char **start, off_t off,
  278. int count, int *eof, void *data)
  279. {
  280. int len;
  281. len = proc_output(page);
  282. if (len <= off + count)
  283. *eof = 1;
  284. *start = page + off;
  285. len -= off;
  286. if (len > count)
  287. len = count;
  288. if (len < 0)
  289. len = 0;
  290. return len;
  291. }
  292. static int
  293. adv7393_write_proc(struct file *file, const char __user * buffer,
  294. unsigned long count, void *data)
  295. {
  296. struct adv7393fb_device *fbdev = data;
  297. char line[8];
  298. unsigned int val;
  299. int ret;
  300. ret = copy_from_user(line, buffer, count);
  301. if (ret)
  302. return -EFAULT;
  303. val = simple_strtoul(line, NULL, 0);
  304. adv7393_write(fbdev->client, val >> 8, val & 0xff);
  305. return count;
  306. }
  307. static int __devinit bfin_adv7393_fb_probe(struct i2c_client *client,
  308. const struct i2c_device_id *id)
  309. {
  310. int ret = 0;
  311. struct proc_dir_entry *entry;
  312. int num_modes = ARRAY_SIZE(known_modes);
  313. struct adv7393fb_device *fbdev = NULL;
  314. if (mem > 2) {
  315. dev_err(&client->dev, "mem out of allowed range [1;2]\n");
  316. return -EINVAL;
  317. }
  318. if (mode > num_modes) {
  319. dev_err(&client->dev, "mode %d: not supported", mode);
  320. return -EFAULT;
  321. }
  322. fbdev = kzalloc(sizeof(*fbdev), GFP_KERNEL);
  323. if (!fbdev) {
  324. dev_err(&client->dev, "failed to allocate device private record");
  325. return -ENOMEM;
  326. }
  327. i2c_set_clientdata(client, fbdev);
  328. fbdev->modes = known_modes;
  329. fbdev->client = client;
  330. fbdev->fb_len =
  331. mem * fbdev->modes[mode].xres * fbdev->modes[mode].xres *
  332. (fbdev->modes[mode].bpp / 8);
  333. fbdev->line_len =
  334. fbdev->modes[mode].xres * (fbdev->modes[mode].bpp / 8);
  335. /* Workaround "PPI Does Not Start Properly In Specific Mode" */
  336. if (ANOMALY_05000400) {
  337. ret = gpio_request_one(P_IDENT(P_PPI0_FS3), GPIOF_OUT_INIT_LOW,
  338. "PPI0_FS3")
  339. if (ret) {
  340. dev_err(&client->dev, "PPI0_FS3 GPIO request failed\n");
  341. ret = -EBUSY;
  342. goto out_8;
  343. }
  344. }
  345. if (peripheral_request_list(ppi_pins, DRIVER_NAME)) {
  346. dev_err(&client->dev, "requesting PPI peripheral failed\n");
  347. ret = -EFAULT;
  348. goto out_8;
  349. }
  350. fbdev->fb_mem =
  351. dma_alloc_coherent(NULL, fbdev->fb_len, &fbdev->dma_handle,
  352. GFP_KERNEL);
  353. if (NULL == fbdev->fb_mem) {
  354. dev_err(&client->dev, "couldn't allocate dma buffer (%d bytes)\n",
  355. (u32) fbdev->fb_len);
  356. ret = -ENOMEM;
  357. goto out_7;
  358. }
  359. fbdev->info.screen_base = (void *)fbdev->fb_mem;
  360. bfin_adv7393_fb_fix.smem_start = (int)fbdev->fb_mem;
  361. bfin_adv7393_fb_fix.smem_len = fbdev->fb_len;
  362. bfin_adv7393_fb_fix.line_length = fbdev->line_len;
  363. if (mem > 1)
  364. bfin_adv7393_fb_fix.ypanstep = 1;
  365. bfin_adv7393_fb_defined.red.length = 5;
  366. bfin_adv7393_fb_defined.green.length = 6;
  367. bfin_adv7393_fb_defined.blue.length = 5;
  368. bfin_adv7393_fb_defined.xres = fbdev->modes[mode].xres;
  369. bfin_adv7393_fb_defined.yres = fbdev->modes[mode].yres;
  370. bfin_adv7393_fb_defined.xres_virtual = fbdev->modes[mode].xres;
  371. bfin_adv7393_fb_defined.yres_virtual = mem * fbdev->modes[mode].yres;
  372. bfin_adv7393_fb_defined.bits_per_pixel = fbdev->modes[mode].bpp;
  373. fbdev->info.fbops = &bfin_adv7393_fb_ops;
  374. fbdev->info.var = bfin_adv7393_fb_defined;
  375. fbdev->info.fix = bfin_adv7393_fb_fix;
  376. fbdev->info.par = &bfin_par;
  377. fbdev->info.flags = FBINFO_DEFAULT;
  378. fbdev->info.pseudo_palette = kzalloc(sizeof(u32) * 16, GFP_KERNEL);
  379. if (!fbdev->info.pseudo_palette) {
  380. dev_err(&client->dev, "failed to allocate pseudo_palette\n");
  381. ret = -ENOMEM;
  382. goto out_6;
  383. }
  384. if (fb_alloc_cmap(&fbdev->info.cmap, BFIN_LCD_NBR_PALETTE_ENTRIES, 0) < 0) {
  385. dev_err(&client->dev, "failed to allocate colormap (%d entries)\n",
  386. BFIN_LCD_NBR_PALETTE_ENTRIES);
  387. ret = -EFAULT;
  388. goto out_5;
  389. }
  390. if (request_dma(CH_PPI, "BF5xx_PPI_DMA") < 0) {
  391. dev_err(&client->dev, "unable to request PPI DMA\n");
  392. ret = -EFAULT;
  393. goto out_4;
  394. }
  395. if (request_irq(IRQ_PPI_ERROR, ppi_irq_error, 0,
  396. "PPI ERROR", fbdev) < 0) {
  397. dev_err(&client->dev, "unable to request PPI ERROR IRQ\n");
  398. ret = -EFAULT;
  399. goto out_3;
  400. }
  401. fbdev->open = 0;
  402. ret = adv7393_write_block(client, fbdev->modes[mode].adv7393_i2c_initd,
  403. fbdev->modes[mode].adv7393_i2c_initd_len);
  404. if (ret) {
  405. dev_err(&client->dev, "i2c attach: init error\n");
  406. goto out_1;
  407. }
  408. if (register_framebuffer(&fbdev->info) < 0) {
  409. dev_err(&client->dev, "unable to register framebuffer\n");
  410. ret = -EFAULT;
  411. goto out_1;
  412. }
  413. dev_info(&client->dev, "fb%d: %s frame buffer device\n",
  414. fbdev->info.node, fbdev->info.fix.id);
  415. dev_info(&client->dev, "fb memory address : 0x%p\n", fbdev->fb_mem);
  416. entry = create_proc_entry("driver/adv7393", 0, NULL);
  417. if (!entry) {
  418. dev_err(&client->dev, "unable to create /proc entry\n");
  419. ret = -EFAULT;
  420. goto out_0;
  421. }
  422. entry->read_proc = adv7393_read_proc;
  423. entry->write_proc = adv7393_write_proc;
  424. entry->data = fbdev;
  425. return 0;
  426. out_0:
  427. unregister_framebuffer(&fbdev->info);
  428. out_1:
  429. free_irq(IRQ_PPI_ERROR, fbdev);
  430. out_3:
  431. free_dma(CH_PPI);
  432. out_4:
  433. dma_free_coherent(NULL, fbdev->fb_len, fbdev->fb_mem,
  434. fbdev->dma_handle);
  435. out_5:
  436. fb_dealloc_cmap(&fbdev->info.cmap);
  437. out_6:
  438. kfree(fbdev->info.pseudo_palette);
  439. out_7:
  440. peripheral_free_list(ppi_pins);
  441. out_8:
  442. kfree(fbdev);
  443. return ret;
  444. }
  445. static int bfin_adv7393_fb_open(struct fb_info *info, int user)
  446. {
  447. struct adv7393fb_device *fbdev = to_adv7393fb_device(info);
  448. fbdev->info.screen_base = (void *)fbdev->fb_mem;
  449. if (!fbdev->info.screen_base) {
  450. dev_err(&fbdev->client->dev, "unable to map device\n");
  451. return -ENOMEM;
  452. }
  453. fbdev->open = 1;
  454. dma_desc_list(fbdev, BUILD);
  455. adv7393_mode(fbdev->client, BLANK_OFF);
  456. bfin_config_ppi(fbdev);
  457. bfin_config_dma(fbdev);
  458. bfin_enable_ppi();
  459. return 0;
  460. }
  461. static int bfin_adv7393_fb_release(struct fb_info *info, int user)
  462. {
  463. struct adv7393fb_device *fbdev = to_adv7393fb_device(info);
  464. adv7393_mode(fbdev->client, BLANK_ON);
  465. bfin_disable_dma();
  466. bfin_disable_ppi();
  467. dma_desc_list(fbdev, DESTRUCT);
  468. fbdev->open = 0;
  469. return 0;
  470. }
  471. static int
  472. bfin_adv7393_fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
  473. {
  474. switch (var->bits_per_pixel) {
  475. case 16:/* DIRECTCOLOUR, 64k */
  476. var->red.offset = info->var.red.offset;
  477. var->green.offset = info->var.green.offset;
  478. var->blue.offset = info->var.blue.offset;
  479. var->red.length = info->var.red.length;
  480. var->green.length = info->var.green.length;
  481. var->blue.length = info->var.blue.length;
  482. var->transp.offset = 0;
  483. var->transp.length = 0;
  484. var->transp.msb_right = 0;
  485. var->red.msb_right = 0;
  486. var->green.msb_right = 0;
  487. var->blue.msb_right = 0;
  488. break;
  489. default:
  490. pr_debug("%s: depth not supported: %u BPP\n", __func__,
  491. var->bits_per_pixel);
  492. return -EINVAL;
  493. }
  494. if (info->var.xres != var->xres ||
  495. info->var.yres != var->yres ||
  496. info->var.xres_virtual != var->xres_virtual ||
  497. info->var.yres_virtual != var->yres_virtual) {
  498. pr_debug("%s: Resolution not supported: X%u x Y%u\n",
  499. __func__, var->xres, var->yres);
  500. return -EINVAL;
  501. }
  502. /*
  503. * Memory limit
  504. */
  505. if ((info->fix.line_length * var->yres_virtual) > info->fix.smem_len) {
  506. pr_debug("%s: Memory Limit requested yres_virtual = %u\n",
  507. __func__, var->yres_virtual);
  508. return -ENOMEM;
  509. }
  510. return 0;
  511. }
  512. static int
  513. bfin_adv7393_fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
  514. {
  515. int dy;
  516. u32 dmaaddr;
  517. struct adv7393fb_device *fbdev = to_adv7393fb_device(info);
  518. if (!var || !info)
  519. return -EINVAL;
  520. if (var->xoffset - info->var.xoffset) {
  521. /* No support for X panning for now! */
  522. return -EINVAL;
  523. }
  524. dy = var->yoffset - info->var.yoffset;
  525. if (dy) {
  526. pr_debug("%s: Panning screen of %d lines\n", __func__, dy);
  527. dmaaddr = fbdev->av1->start_addr;
  528. dmaaddr += (info->fix.line_length * dy);
  529. /* TODO: Wait for current frame to finished */
  530. fbdev->av1->start_addr = (unsigned long)dmaaddr;
  531. fbdev->av2->start_addr = (unsigned long)dmaaddr + fbdev->line_len;
  532. }
  533. return 0;
  534. }
  535. /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
  536. static int bfin_adv7393_fb_blank(int blank, struct fb_info *info)
  537. {
  538. struct adv7393fb_device *fbdev = to_adv7393fb_device(info);
  539. switch (blank) {
  540. case VESA_NO_BLANKING:
  541. /* Turn on panel */
  542. adv7393_mode(fbdev->client, BLANK_OFF);
  543. break;
  544. case VESA_VSYNC_SUSPEND:
  545. case VESA_HSYNC_SUSPEND:
  546. case VESA_POWERDOWN:
  547. /* Turn off panel */
  548. adv7393_mode(fbdev->client, BLANK_ON);
  549. break;
  550. default:
  551. return -EINVAL;
  552. break;
  553. }
  554. return 0;
  555. }
  556. int bfin_adv7393_fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
  557. {
  558. if (nocursor)
  559. return 0;
  560. else
  561. return -EINVAL; /* just to force soft_cursor() call */
  562. }
  563. static int bfin_adv7393_fb_setcolreg(u_int regno, u_int red, u_int green,
  564. u_int blue, u_int transp,
  565. struct fb_info *info)
  566. {
  567. if (regno >= BFIN_LCD_NBR_PALETTE_ENTRIES)
  568. return -EINVAL;
  569. if (info->var.grayscale)
  570. /* grayscale = 0.30*R + 0.59*G + 0.11*B */
  571. red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
  572. if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
  573. u32 value;
  574. /* Place color in the pseudopalette */
  575. if (regno > 16)
  576. return -EINVAL;
  577. red >>= (16 - info->var.red.length);
  578. green >>= (16 - info->var.green.length);
  579. blue >>= (16 - info->var.blue.length);
  580. value = (red << info->var.red.offset) |
  581. (green << info->var.green.offset)|
  582. (blue << info->var.blue.offset);
  583. value &= 0xFFFF;
  584. ((u32 *) (info->pseudo_palette))[regno] = value;
  585. }
  586. return 0;
  587. }
  588. static int __devexit bfin_adv7393_fb_remove(struct i2c_client *client)
  589. {
  590. struct adv7393fb_device *fbdev = i2c_get_clientdata(client);
  591. adv7393_mode(client, POWER_DOWN);
  592. if (fbdev->fb_mem)
  593. dma_free_coherent(NULL, fbdev->fb_len, fbdev->fb_mem, fbdev->dma_handle);
  594. free_dma(CH_PPI);
  595. free_irq(IRQ_PPI_ERROR, fbdev);
  596. unregister_framebuffer(&fbdev->info);
  597. remove_proc_entry("driver/adv7393", NULL);
  598. fb_dealloc_cmap(&fbdev->info.cmap);
  599. kfree(fbdev->info.pseudo_palette);
  600. if (ANOMALY_05000400)
  601. gpio_free(P_IDENT(P_PPI0_FS3)); /* FS3 */
  602. peripheral_free_list(ppi_pins);
  603. kfree(fbdev);
  604. return 0;
  605. }
  606. #ifdef CONFIG_PM
  607. static int bfin_adv7393_fb_suspend(struct device *dev)
  608. {
  609. struct adv7393fb_device *fbdev = dev_get_drvdata(dev);
  610. if (fbdev->open) {
  611. bfin_disable_dma();
  612. bfin_disable_ppi();
  613. dma_desc_list(fbdev, DESTRUCT);
  614. }
  615. adv7393_mode(fbdev->client, POWER_DOWN);
  616. return 0;
  617. }
  618. static int bfin_adv7393_fb_resume(struct device *dev)
  619. {
  620. struct adv7393fb_device *fbdev = dev_get_drvdata(dev);
  621. adv7393_mode(fbdev->client, POWER_ON);
  622. if (fbdev->open) {
  623. dma_desc_list(fbdev, BUILD);
  624. bfin_config_ppi(fbdev);
  625. bfin_config_dma(fbdev);
  626. bfin_enable_ppi();
  627. }
  628. return 0;
  629. }
  630. static const struct dev_pm_ops bfin_adv7393_dev_pm_ops = {
  631. .suspend = bfin_adv7393_fb_suspend,
  632. .resume = bfin_adv7393_fb_resume,
  633. };
  634. #endif
  635. static const struct i2c_device_id bfin_adv7393_id[] = {
  636. {DRIVER_NAME, 0},
  637. {}
  638. };
  639. MODULE_DEVICE_TABLE(i2c, bfin_adv7393_id);
  640. static struct i2c_driver bfin_adv7393_fb_driver = {
  641. .driver = {
  642. .name = DRIVER_NAME,
  643. #ifdef CONFIG_PM
  644. .pm = &bfin_adv7393_dev_pm_ops,
  645. #endif
  646. },
  647. .probe = bfin_adv7393_fb_probe,
  648. .remove = __devexit_p(bfin_adv7393_fb_remove),
  649. .id_table = bfin_adv7393_id,
  650. };
  651. static int __init bfin_adv7393_fb_driver_init(void)
  652. {
  653. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  654. request_module("i2c-bfin-twi");
  655. #else
  656. request_module("i2c-gpio");
  657. #endif
  658. return i2c_add_driver(&bfin_adv7393_fb_driver);
  659. }
  660. module_init(bfin_adv7393_fb_driver_init);
  661. static void __exit bfin_adv7393_fb_driver_cleanup(void)
  662. {
  663. i2c_del_driver(&bfin_adv7393_fb_driver);
  664. }
  665. module_exit(bfin_adv7393_fb_driver_cleanup);
  666. MODULE_LICENSE("GPL");
  667. MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
  668. MODULE_DESCRIPTION("Frame buffer driver for ADV7393/2 Video Encoder");
  669. module_param(mode, int, 0);
  670. MODULE_PARM_DESC(mode,
  671. "Video Mode (0=NTSC,1=PAL,2=NTSC 640x480,3=PAL 640x480,4=NTSC YCbCr input,5=PAL YCbCr input)");
  672. module_param(mem, int, 0);
  673. MODULE_PARM_DESC(mem,
  674. "Size of frame buffer memory 1=Single 2=Double Size (allows y-panning / frame stacking)");
  675. module_param(nocursor, int, 0644);
  676. MODULE_PARM_DESC(nocursor, "cursor enable/disable");