events.c 13 KB

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  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is recieved, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. Hardware interrupts. Not supported at present.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <asm/ptrace.h>
  29. #include <asm/irq.h>
  30. #include <asm/sync_bitops.h>
  31. #include <asm/xen/hypercall.h>
  32. #include <xen/events.h>
  33. #include <xen/interface/xen.h>
  34. #include <xen/interface/event_channel.h>
  35. #include "xen-ops.h"
  36. /*
  37. * This lock protects updates to the following mapping and reference-count
  38. * arrays. The lock does not need to be acquired to read the mapping tables.
  39. */
  40. static DEFINE_SPINLOCK(irq_mapping_update_lock);
  41. /* IRQ <-> VIRQ mapping. */
  42. static DEFINE_PER_CPU(int, virq_to_irq[NR_VIRQS]) = {[0 ... NR_VIRQS-1] = -1};
  43. /* IRQ <-> IPI mapping */
  44. static DEFINE_PER_CPU(int, ipi_to_irq[XEN_NR_IPIS]) = {[0 ... XEN_NR_IPIS-1] = -1};
  45. /* Packed IRQ information: binding type, sub-type index, and event channel. */
  46. struct packed_irq
  47. {
  48. unsigned short evtchn;
  49. unsigned char index;
  50. unsigned char type;
  51. };
  52. static struct packed_irq irq_info[NR_IRQS];
  53. /* Binding types. */
  54. enum {
  55. IRQT_UNBOUND,
  56. IRQT_PIRQ,
  57. IRQT_VIRQ,
  58. IRQT_IPI,
  59. IRQT_EVTCHN
  60. };
  61. /* Convenient shorthand for packed representation of an unbound IRQ. */
  62. #define IRQ_UNBOUND mk_irq_info(IRQT_UNBOUND, 0, 0)
  63. static int evtchn_to_irq[NR_EVENT_CHANNELS] = {
  64. [0 ... NR_EVENT_CHANNELS-1] = -1
  65. };
  66. static unsigned long cpu_evtchn_mask[NR_CPUS][NR_EVENT_CHANNELS/BITS_PER_LONG];
  67. static u8 cpu_evtchn[NR_EVENT_CHANNELS];
  68. /* Reference counts for bindings to IRQs. */
  69. static int irq_bindcount[NR_IRQS];
  70. /* Xen will never allocate port zero for any purpose. */
  71. #define VALID_EVTCHN(chn) ((chn) != 0)
  72. /*
  73. * Force a proper event-channel callback from Xen after clearing the
  74. * callback mask. We do this in a very simple manner, by making a call
  75. * down into Xen. The pending flag will be checked by Xen on return.
  76. */
  77. void force_evtchn_callback(void)
  78. {
  79. (void)HYPERVISOR_xen_version(0, NULL);
  80. }
  81. EXPORT_SYMBOL_GPL(force_evtchn_callback);
  82. static struct irq_chip xen_dynamic_chip;
  83. /* Constructor for packed IRQ information. */
  84. static inline struct packed_irq mk_irq_info(u32 type, u32 index, u32 evtchn)
  85. {
  86. return (struct packed_irq) { evtchn, index, type };
  87. }
  88. /*
  89. * Accessors for packed IRQ information.
  90. */
  91. static inline unsigned int evtchn_from_irq(int irq)
  92. {
  93. return irq_info[irq].evtchn;
  94. }
  95. static inline unsigned int index_from_irq(int irq)
  96. {
  97. return irq_info[irq].index;
  98. }
  99. static inline unsigned int type_from_irq(int irq)
  100. {
  101. return irq_info[irq].type;
  102. }
  103. static inline unsigned long active_evtchns(unsigned int cpu,
  104. struct shared_info *sh,
  105. unsigned int idx)
  106. {
  107. return (sh->evtchn_pending[idx] &
  108. cpu_evtchn_mask[cpu][idx] &
  109. ~sh->evtchn_mask[idx]);
  110. }
  111. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  112. {
  113. int irq = evtchn_to_irq[chn];
  114. BUG_ON(irq == -1);
  115. #ifdef CONFIG_SMP
  116. irq_desc[irq].affinity = cpumask_of_cpu(cpu);
  117. #endif
  118. __clear_bit(chn, cpu_evtchn_mask[cpu_evtchn[chn]]);
  119. __set_bit(chn, cpu_evtchn_mask[cpu]);
  120. cpu_evtchn[chn] = cpu;
  121. }
  122. static void init_evtchn_cpu_bindings(void)
  123. {
  124. #ifdef CONFIG_SMP
  125. int i;
  126. /* By default all event channels notify CPU#0. */
  127. for (i = 0; i < NR_IRQS; i++)
  128. irq_desc[i].affinity = cpumask_of_cpu(0);
  129. #endif
  130. memset(cpu_evtchn, 0, sizeof(cpu_evtchn));
  131. memset(cpu_evtchn_mask[0], ~0, sizeof(cpu_evtchn_mask[0]));
  132. }
  133. static inline unsigned int cpu_from_evtchn(unsigned int evtchn)
  134. {
  135. return cpu_evtchn[evtchn];
  136. }
  137. static inline void clear_evtchn(int port)
  138. {
  139. struct shared_info *s = HYPERVISOR_shared_info;
  140. sync_clear_bit(port, &s->evtchn_pending[0]);
  141. }
  142. static inline void set_evtchn(int port)
  143. {
  144. struct shared_info *s = HYPERVISOR_shared_info;
  145. sync_set_bit(port, &s->evtchn_pending[0]);
  146. }
  147. /**
  148. * notify_remote_via_irq - send event to remote end of event channel via irq
  149. * @irq: irq of event channel to send event to
  150. *
  151. * Unlike notify_remote_via_evtchn(), this is safe to use across
  152. * save/restore. Notifications on a broken connection are silently
  153. * dropped.
  154. */
  155. void notify_remote_via_irq(int irq)
  156. {
  157. int evtchn = evtchn_from_irq(irq);
  158. if (VALID_EVTCHN(evtchn))
  159. notify_remote_via_evtchn(evtchn);
  160. }
  161. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  162. static void mask_evtchn(int port)
  163. {
  164. struct shared_info *s = HYPERVISOR_shared_info;
  165. sync_set_bit(port, &s->evtchn_mask[0]);
  166. }
  167. static void unmask_evtchn(int port)
  168. {
  169. struct shared_info *s = HYPERVISOR_shared_info;
  170. unsigned int cpu = get_cpu();
  171. BUG_ON(!irqs_disabled());
  172. /* Slow path (hypercall) if this is a non-local port. */
  173. if (unlikely(cpu != cpu_from_evtchn(port))) {
  174. struct evtchn_unmask unmask = { .port = port };
  175. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  176. } else {
  177. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  178. sync_clear_bit(port, &s->evtchn_mask[0]);
  179. /*
  180. * The following is basically the equivalent of
  181. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  182. * the interrupt edge' if the channel is masked.
  183. */
  184. if (sync_test_bit(port, &s->evtchn_pending[0]) &&
  185. !sync_test_and_set_bit(port / BITS_PER_LONG,
  186. &vcpu_info->evtchn_pending_sel))
  187. vcpu_info->evtchn_upcall_pending = 1;
  188. }
  189. put_cpu();
  190. }
  191. static int find_unbound_irq(void)
  192. {
  193. int irq;
  194. /* Only allocate from dynirq range */
  195. for (irq = 0; irq < NR_IRQS; irq++)
  196. if (irq_bindcount[irq] == 0)
  197. break;
  198. if (irq == NR_IRQS)
  199. panic("No available IRQ to bind to: increase NR_IRQS!\n");
  200. return irq;
  201. }
  202. static int bind_evtchn_to_irq(unsigned int evtchn)
  203. {
  204. int irq;
  205. spin_lock(&irq_mapping_update_lock);
  206. irq = evtchn_to_irq[evtchn];
  207. if (irq == -1) {
  208. irq = find_unbound_irq();
  209. dynamic_irq_init(irq);
  210. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  211. handle_level_irq, "event");
  212. evtchn_to_irq[evtchn] = irq;
  213. irq_info[irq] = mk_irq_info(IRQT_EVTCHN, 0, evtchn);
  214. }
  215. irq_bindcount[irq]++;
  216. spin_unlock(&irq_mapping_update_lock);
  217. return irq;
  218. }
  219. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  220. {
  221. struct evtchn_bind_ipi bind_ipi;
  222. int evtchn, irq;
  223. spin_lock(&irq_mapping_update_lock);
  224. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  225. if (irq == -1) {
  226. irq = find_unbound_irq();
  227. if (irq < 0)
  228. goto out;
  229. dynamic_irq_init(irq);
  230. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  231. handle_level_irq, "ipi");
  232. bind_ipi.vcpu = cpu;
  233. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  234. &bind_ipi) != 0)
  235. BUG();
  236. evtchn = bind_ipi.port;
  237. evtchn_to_irq[evtchn] = irq;
  238. irq_info[irq] = mk_irq_info(IRQT_IPI, ipi, evtchn);
  239. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  240. bind_evtchn_to_cpu(evtchn, cpu);
  241. }
  242. irq_bindcount[irq]++;
  243. out:
  244. spin_unlock(&irq_mapping_update_lock);
  245. return irq;
  246. }
  247. static int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  248. {
  249. struct evtchn_bind_virq bind_virq;
  250. int evtchn, irq;
  251. spin_lock(&irq_mapping_update_lock);
  252. irq = per_cpu(virq_to_irq, cpu)[virq];
  253. if (irq == -1) {
  254. bind_virq.virq = virq;
  255. bind_virq.vcpu = cpu;
  256. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  257. &bind_virq) != 0)
  258. BUG();
  259. evtchn = bind_virq.port;
  260. irq = find_unbound_irq();
  261. dynamic_irq_init(irq);
  262. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  263. handle_level_irq, "virq");
  264. evtchn_to_irq[evtchn] = irq;
  265. irq_info[irq] = mk_irq_info(IRQT_VIRQ, virq, evtchn);
  266. per_cpu(virq_to_irq, cpu)[virq] = irq;
  267. bind_evtchn_to_cpu(evtchn, cpu);
  268. }
  269. irq_bindcount[irq]++;
  270. spin_unlock(&irq_mapping_update_lock);
  271. return irq;
  272. }
  273. static void unbind_from_irq(unsigned int irq)
  274. {
  275. struct evtchn_close close;
  276. int evtchn = evtchn_from_irq(irq);
  277. spin_lock(&irq_mapping_update_lock);
  278. if (VALID_EVTCHN(evtchn) && (--irq_bindcount[irq] == 0)) {
  279. close.port = evtchn;
  280. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  281. BUG();
  282. switch (type_from_irq(irq)) {
  283. case IRQT_VIRQ:
  284. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  285. [index_from_irq(irq)] = -1;
  286. break;
  287. default:
  288. break;
  289. }
  290. /* Closed ports are implicitly re-bound to VCPU0. */
  291. bind_evtchn_to_cpu(evtchn, 0);
  292. evtchn_to_irq[evtchn] = -1;
  293. irq_info[irq] = IRQ_UNBOUND;
  294. dynamic_irq_init(irq);
  295. }
  296. spin_unlock(&irq_mapping_update_lock);
  297. }
  298. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  299. irqreturn_t (*handler)(int, void *),
  300. unsigned long irqflags,
  301. const char *devname, void *dev_id)
  302. {
  303. unsigned int irq;
  304. int retval;
  305. irq = bind_evtchn_to_irq(evtchn);
  306. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  307. if (retval != 0) {
  308. unbind_from_irq(irq);
  309. return retval;
  310. }
  311. return irq;
  312. }
  313. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  314. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  315. irqreturn_t (*handler)(int, void *),
  316. unsigned long irqflags, const char *devname, void *dev_id)
  317. {
  318. unsigned int irq;
  319. int retval;
  320. irq = bind_virq_to_irq(virq, cpu);
  321. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  322. if (retval != 0) {
  323. unbind_from_irq(irq);
  324. return retval;
  325. }
  326. return irq;
  327. }
  328. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  329. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  330. unsigned int cpu,
  331. irq_handler_t handler,
  332. unsigned long irqflags,
  333. const char *devname,
  334. void *dev_id)
  335. {
  336. int irq, retval;
  337. irq = bind_ipi_to_irq(ipi, cpu);
  338. if (irq < 0)
  339. return irq;
  340. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  341. if (retval != 0) {
  342. unbind_from_irq(irq);
  343. return retval;
  344. }
  345. return irq;
  346. }
  347. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  348. {
  349. free_irq(irq, dev_id);
  350. unbind_from_irq(irq);
  351. }
  352. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  353. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  354. {
  355. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  356. BUG_ON(irq < 0);
  357. notify_remote_via_irq(irq);
  358. }
  359. /*
  360. * Search the CPUs pending events bitmasks. For each one found, map
  361. * the event number to an irq, and feed it into do_IRQ() for
  362. * handling.
  363. *
  364. * Xen uses a two-level bitmap to speed searching. The first level is
  365. * a bitset of words which contain pending event bits. The second
  366. * level is a bitset of pending events themselves.
  367. */
  368. fastcall void xen_evtchn_do_upcall(struct pt_regs *regs)
  369. {
  370. int cpu = get_cpu();
  371. struct shared_info *s = HYPERVISOR_shared_info;
  372. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  373. unsigned long pending_words;
  374. vcpu_info->evtchn_upcall_pending = 0;
  375. /* NB. No need for a barrier here -- XCHG is a barrier on x86. */
  376. pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
  377. while (pending_words != 0) {
  378. unsigned long pending_bits;
  379. int word_idx = __ffs(pending_words);
  380. pending_words &= ~(1UL << word_idx);
  381. while ((pending_bits = active_evtchns(cpu, s, word_idx)) != 0) {
  382. int bit_idx = __ffs(pending_bits);
  383. int port = (word_idx * BITS_PER_LONG) + bit_idx;
  384. int irq = evtchn_to_irq[port];
  385. if (irq != -1) {
  386. regs->orig_eax = ~irq;
  387. do_IRQ(regs);
  388. }
  389. }
  390. }
  391. put_cpu();
  392. }
  393. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  394. static void rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  395. {
  396. struct evtchn_bind_vcpu bind_vcpu;
  397. int evtchn = evtchn_from_irq(irq);
  398. if (!VALID_EVTCHN(evtchn))
  399. return;
  400. /* Send future instances of this interrupt to other vcpu. */
  401. bind_vcpu.port = evtchn;
  402. bind_vcpu.vcpu = tcpu;
  403. /*
  404. * If this fails, it usually just indicates that we're dealing with a
  405. * virq or IPI channel, which don't actually need to be rebound. Ignore
  406. * it, but don't do the xenlinux-level rebind in that case.
  407. */
  408. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  409. bind_evtchn_to_cpu(evtchn, tcpu);
  410. }
  411. static void set_affinity_irq(unsigned irq, cpumask_t dest)
  412. {
  413. unsigned tcpu = first_cpu(dest);
  414. rebind_irq_to_cpu(irq, tcpu);
  415. }
  416. static void enable_dynirq(unsigned int irq)
  417. {
  418. int evtchn = evtchn_from_irq(irq);
  419. if (VALID_EVTCHN(evtchn))
  420. unmask_evtchn(evtchn);
  421. }
  422. static void disable_dynirq(unsigned int irq)
  423. {
  424. int evtchn = evtchn_from_irq(irq);
  425. if (VALID_EVTCHN(evtchn))
  426. mask_evtchn(evtchn);
  427. }
  428. static void ack_dynirq(unsigned int irq)
  429. {
  430. int evtchn = evtchn_from_irq(irq);
  431. move_native_irq(irq);
  432. if (VALID_EVTCHN(evtchn))
  433. clear_evtchn(evtchn);
  434. }
  435. static int retrigger_dynirq(unsigned int irq)
  436. {
  437. int evtchn = evtchn_from_irq(irq);
  438. int ret = 0;
  439. if (VALID_EVTCHN(evtchn)) {
  440. set_evtchn(evtchn);
  441. ret = 1;
  442. }
  443. return ret;
  444. }
  445. static struct irq_chip xen_dynamic_chip __read_mostly = {
  446. .name = "xen-dyn",
  447. .mask = disable_dynirq,
  448. .unmask = enable_dynirq,
  449. .ack = ack_dynirq,
  450. .set_affinity = set_affinity_irq,
  451. .retrigger = retrigger_dynirq,
  452. };
  453. void __init xen_init_IRQ(void)
  454. {
  455. int i;
  456. init_evtchn_cpu_bindings();
  457. /* No event channels are 'live' right now. */
  458. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  459. mask_evtchn(i);
  460. /* Dynamic IRQ space is currently unbound. Zero the refcnts. */
  461. for (i = 0; i < NR_IRQS; i++)
  462. irq_bindcount[i] = 0;
  463. irq_ctx_init(smp_processor_id());
  464. }