rt2x00pci.c 12 KB

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  1. /*
  2. Copyright (C) 2004 - 2007 rt2x00 SourceForge Project
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the
  14. Free Software Foundation, Inc.,
  15. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. /*
  18. Module: rt2x00pci
  19. Abstract: rt2x00 generic pci device routines.
  20. */
  21. #include <linux/dma-mapping.h>
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/pci.h>
  25. #include "rt2x00.h"
  26. #include "rt2x00pci.h"
  27. /*
  28. * Beacon handlers.
  29. */
  30. int rt2x00pci_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  31. struct ieee80211_tx_control *control)
  32. {
  33. struct rt2x00_dev *rt2x00dev = hw->priv;
  34. struct skb_desc *desc;
  35. struct data_ring *ring;
  36. struct data_entry *entry;
  37. /*
  38. * Just in case mac80211 doesn't set this correctly,
  39. * but we need this queue set for the descriptor
  40. * initialization.
  41. */
  42. control->queue = IEEE80211_TX_QUEUE_BEACON;
  43. ring = rt2x00lib_get_ring(rt2x00dev, control->queue);
  44. entry = rt2x00_get_data_entry(ring);
  45. /*
  46. * Fill in skb descriptor
  47. */
  48. desc = get_skb_desc(skb);
  49. desc->desc_len = ring->desc_size;
  50. desc->data_len = skb->len;
  51. desc->desc = entry->priv;
  52. desc->data = skb->data;
  53. desc->ring = ring;
  54. desc->entry = entry;
  55. memcpy(entry->data_addr, skb->data, skb->len);
  56. rt2x00lib_write_tx_desc(rt2x00dev, skb, control);
  57. /*
  58. * Enable beacon generation.
  59. */
  60. rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, control->queue);
  61. return 0;
  62. }
  63. EXPORT_SYMBOL_GPL(rt2x00pci_beacon_update);
  64. /*
  65. * TX data handlers.
  66. */
  67. int rt2x00pci_write_tx_data(struct rt2x00_dev *rt2x00dev,
  68. struct data_ring *ring, struct sk_buff *skb,
  69. struct ieee80211_tx_control *control)
  70. {
  71. struct data_entry *entry = rt2x00_get_data_entry(ring);
  72. __le32 *txd = entry->priv;
  73. struct skb_desc *desc;
  74. u32 word;
  75. if (rt2x00_ring_full(ring)) {
  76. ieee80211_stop_queue(rt2x00dev->hw, control->queue);
  77. return -EINVAL;
  78. }
  79. rt2x00_desc_read(txd, 0, &word);
  80. if (rt2x00_get_field32(word, TXD_ENTRY_OWNER_NIC) ||
  81. rt2x00_get_field32(word, TXD_ENTRY_VALID)) {
  82. ERROR(rt2x00dev,
  83. "Arrived at non-free entry in the non-full queue %d.\n"
  84. "Please file bug report to %s.\n",
  85. control->queue, DRV_PROJECT);
  86. ieee80211_stop_queue(rt2x00dev->hw, control->queue);
  87. return -EINVAL;
  88. }
  89. /*
  90. * Fill in skb descriptor
  91. */
  92. desc = get_skb_desc(skb);
  93. desc->desc_len = ring->desc_size;
  94. desc->data_len = skb->len;
  95. desc->desc = entry->priv;
  96. desc->data = skb->data;
  97. desc->ring = ring;
  98. desc->entry = entry;
  99. memcpy(entry->data_addr, skb->data, skb->len);
  100. rt2x00lib_write_tx_desc(rt2x00dev, skb, control);
  101. rt2x00_ring_index_inc(ring);
  102. if (rt2x00_ring_full(ring))
  103. ieee80211_stop_queue(rt2x00dev->hw, control->queue);
  104. return 0;
  105. }
  106. EXPORT_SYMBOL_GPL(rt2x00pci_write_tx_data);
  107. /*
  108. * TX/RX data handlers.
  109. */
  110. void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev)
  111. {
  112. struct data_ring *ring = rt2x00dev->rx;
  113. struct data_entry *entry;
  114. struct sk_buff *skb;
  115. struct ieee80211_hdr *hdr;
  116. struct skb_desc *skbdesc;
  117. struct rxdata_entry_desc desc;
  118. int header_size;
  119. __le32 *rxd;
  120. int align;
  121. u32 word;
  122. while (1) {
  123. entry = rt2x00_get_data_entry(ring);
  124. rxd = entry->priv;
  125. rt2x00_desc_read(rxd, 0, &word);
  126. if (rt2x00_get_field32(word, RXD_ENTRY_OWNER_NIC))
  127. break;
  128. memset(&desc, 0, sizeof(desc));
  129. rt2x00dev->ops->lib->fill_rxdone(entry, &desc);
  130. hdr = (struct ieee80211_hdr *)entry->data_addr;
  131. header_size =
  132. ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_control));
  133. /*
  134. * The data behind the ieee80211 header must be
  135. * aligned on a 4 byte boundary.
  136. */
  137. align = header_size % 4;
  138. /*
  139. * Allocate the sk_buffer, initialize it and copy
  140. * all data into it.
  141. */
  142. skb = dev_alloc_skb(desc.size + align);
  143. if (!skb)
  144. return;
  145. skb_reserve(skb, align);
  146. memcpy(skb_put(skb, desc.size), entry->data_addr, desc.size);
  147. /*
  148. * Fill in skb descriptor
  149. */
  150. skbdesc = get_skb_desc(skb);
  151. skbdesc->desc_len = entry->ring->desc_size;
  152. skbdesc->data_len = skb->len;
  153. skbdesc->desc = entry->priv;
  154. skbdesc->data = skb->data;
  155. skbdesc->ring = ring;
  156. skbdesc->entry = entry;
  157. /*
  158. * Send the frame to rt2x00lib for further processing.
  159. */
  160. rt2x00lib_rxdone(entry, skb, &desc);
  161. if (test_bit(DEVICE_ENABLED_RADIO, &ring->rt2x00dev->flags)) {
  162. rt2x00_set_field32(&word, RXD_ENTRY_OWNER_NIC, 1);
  163. rt2x00_desc_write(rxd, 0, word);
  164. }
  165. rt2x00_ring_index_inc(ring);
  166. }
  167. }
  168. EXPORT_SYMBOL_GPL(rt2x00pci_rxdone);
  169. void rt2x00pci_txdone(struct rt2x00_dev *rt2x00dev, struct data_entry *entry,
  170. const int tx_status, const int retry)
  171. {
  172. u32 word;
  173. rt2x00lib_txdone(entry, tx_status, retry);
  174. /*
  175. * Make this entry available for reuse.
  176. */
  177. entry->flags = 0;
  178. rt2x00_desc_read(entry->priv, 0, &word);
  179. rt2x00_set_field32(&word, TXD_ENTRY_OWNER_NIC, 0);
  180. rt2x00_set_field32(&word, TXD_ENTRY_VALID, 0);
  181. rt2x00_desc_write(entry->priv, 0, word);
  182. rt2x00_ring_index_done_inc(entry->ring);
  183. /*
  184. * If the data ring was full before the txdone handler
  185. * we must make sure the packet queue in the mac80211 stack
  186. * is reenabled when the txdone handler has finished.
  187. */
  188. if (!rt2x00_ring_full(entry->ring))
  189. ieee80211_wake_queue(rt2x00dev->hw,
  190. entry->tx_status.control.queue);
  191. }
  192. EXPORT_SYMBOL_GPL(rt2x00pci_txdone);
  193. /*
  194. * Device initialization handlers.
  195. */
  196. #define priv_offset(__ring, __i) \
  197. ({ \
  198. ring->data_addr + (i * ring->desc_size); \
  199. })
  200. #define data_addr_offset(__ring, __i) \
  201. ({ \
  202. (__ring)->data_addr + \
  203. ((__ring)->stats.limit * (__ring)->desc_size) + \
  204. ((__i) * (__ring)->data_size); \
  205. })
  206. #define data_dma_offset(__ring, __i) \
  207. ({ \
  208. (__ring)->data_dma + \
  209. ((__ring)->stats.limit * (__ring)->desc_size) + \
  210. ((__i) * (__ring)->data_size); \
  211. })
  212. static int rt2x00pci_alloc_dma(struct rt2x00_dev *rt2x00dev,
  213. struct data_ring *ring)
  214. {
  215. unsigned int i;
  216. /*
  217. * Allocate DMA memory for descriptor and buffer.
  218. */
  219. ring->data_addr = pci_alloc_consistent(rt2x00dev_pci(rt2x00dev),
  220. rt2x00_get_ring_size(ring),
  221. &ring->data_dma);
  222. if (!ring->data_addr)
  223. return -ENOMEM;
  224. /*
  225. * Initialize all ring entries to contain valid
  226. * addresses.
  227. */
  228. for (i = 0; i < ring->stats.limit; i++) {
  229. ring->entry[i].priv = priv_offset(ring, i);
  230. ring->entry[i].data_addr = data_addr_offset(ring, i);
  231. ring->entry[i].data_dma = data_dma_offset(ring, i);
  232. }
  233. return 0;
  234. }
  235. static void rt2x00pci_free_dma(struct rt2x00_dev *rt2x00dev,
  236. struct data_ring *ring)
  237. {
  238. if (ring->data_addr)
  239. pci_free_consistent(rt2x00dev_pci(rt2x00dev),
  240. rt2x00_get_ring_size(ring),
  241. ring->data_addr, ring->data_dma);
  242. ring->data_addr = NULL;
  243. }
  244. int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev)
  245. {
  246. struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev);
  247. struct data_ring *ring;
  248. int status;
  249. /*
  250. * Allocate DMA
  251. */
  252. ring_for_each(rt2x00dev, ring) {
  253. status = rt2x00pci_alloc_dma(rt2x00dev, ring);
  254. if (status)
  255. goto exit;
  256. }
  257. /*
  258. * Register interrupt handler.
  259. */
  260. status = request_irq(pci_dev->irq, rt2x00dev->ops->lib->irq_handler,
  261. IRQF_SHARED, pci_name(pci_dev), rt2x00dev);
  262. if (status) {
  263. ERROR(rt2x00dev, "IRQ %d allocation failed (error %d).\n",
  264. pci_dev->irq, status);
  265. return status;
  266. }
  267. return 0;
  268. exit:
  269. rt2x00pci_uninitialize(rt2x00dev);
  270. return status;
  271. }
  272. EXPORT_SYMBOL_GPL(rt2x00pci_initialize);
  273. void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev)
  274. {
  275. struct data_ring *ring;
  276. /*
  277. * Free irq line.
  278. */
  279. free_irq(rt2x00dev_pci(rt2x00dev)->irq, rt2x00dev);
  280. /*
  281. * Free DMA
  282. */
  283. ring_for_each(rt2x00dev, ring)
  284. rt2x00pci_free_dma(rt2x00dev, ring);
  285. }
  286. EXPORT_SYMBOL_GPL(rt2x00pci_uninitialize);
  287. /*
  288. * PCI driver handlers.
  289. */
  290. static void rt2x00pci_free_reg(struct rt2x00_dev *rt2x00dev)
  291. {
  292. kfree(rt2x00dev->rf);
  293. rt2x00dev->rf = NULL;
  294. kfree(rt2x00dev->eeprom);
  295. rt2x00dev->eeprom = NULL;
  296. if (rt2x00dev->csr_addr) {
  297. iounmap(rt2x00dev->csr_addr);
  298. rt2x00dev->csr_addr = NULL;
  299. }
  300. }
  301. static int rt2x00pci_alloc_reg(struct rt2x00_dev *rt2x00dev)
  302. {
  303. struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev);
  304. rt2x00dev->csr_addr = ioremap(pci_resource_start(pci_dev, 0),
  305. pci_resource_len(pci_dev, 0));
  306. if (!rt2x00dev->csr_addr)
  307. goto exit;
  308. rt2x00dev->eeprom = kzalloc(rt2x00dev->ops->eeprom_size, GFP_KERNEL);
  309. if (!rt2x00dev->eeprom)
  310. goto exit;
  311. rt2x00dev->rf = kzalloc(rt2x00dev->ops->rf_size, GFP_KERNEL);
  312. if (!rt2x00dev->rf)
  313. goto exit;
  314. return 0;
  315. exit:
  316. ERROR_PROBE("Failed to allocate registers.\n");
  317. rt2x00pci_free_reg(rt2x00dev);
  318. return -ENOMEM;
  319. }
  320. int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
  321. {
  322. struct rt2x00_ops *ops = (struct rt2x00_ops *)id->driver_data;
  323. struct ieee80211_hw *hw;
  324. struct rt2x00_dev *rt2x00dev;
  325. int retval;
  326. retval = pci_request_regions(pci_dev, pci_name(pci_dev));
  327. if (retval) {
  328. ERROR_PROBE("PCI request regions failed.\n");
  329. return retval;
  330. }
  331. retval = pci_enable_device(pci_dev);
  332. if (retval) {
  333. ERROR_PROBE("Enable device failed.\n");
  334. goto exit_release_regions;
  335. }
  336. pci_set_master(pci_dev);
  337. if (pci_set_mwi(pci_dev))
  338. ERROR_PROBE("MWI not available.\n");
  339. if (pci_set_dma_mask(pci_dev, DMA_64BIT_MASK) &&
  340. pci_set_dma_mask(pci_dev, DMA_32BIT_MASK)) {
  341. ERROR_PROBE("PCI DMA not supported.\n");
  342. retval = -EIO;
  343. goto exit_disable_device;
  344. }
  345. hw = ieee80211_alloc_hw(sizeof(struct rt2x00_dev), ops->hw);
  346. if (!hw) {
  347. ERROR_PROBE("Failed to allocate hardware.\n");
  348. retval = -ENOMEM;
  349. goto exit_disable_device;
  350. }
  351. pci_set_drvdata(pci_dev, hw);
  352. rt2x00dev = hw->priv;
  353. rt2x00dev->dev = pci_dev;
  354. rt2x00dev->ops = ops;
  355. rt2x00dev->hw = hw;
  356. retval = rt2x00pci_alloc_reg(rt2x00dev);
  357. if (retval)
  358. goto exit_free_device;
  359. retval = rt2x00lib_probe_dev(rt2x00dev);
  360. if (retval)
  361. goto exit_free_reg;
  362. return 0;
  363. exit_free_reg:
  364. rt2x00pci_free_reg(rt2x00dev);
  365. exit_free_device:
  366. ieee80211_free_hw(hw);
  367. exit_disable_device:
  368. if (retval != -EBUSY)
  369. pci_disable_device(pci_dev);
  370. exit_release_regions:
  371. pci_release_regions(pci_dev);
  372. pci_set_drvdata(pci_dev, NULL);
  373. return retval;
  374. }
  375. EXPORT_SYMBOL_GPL(rt2x00pci_probe);
  376. void rt2x00pci_remove(struct pci_dev *pci_dev)
  377. {
  378. struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
  379. struct rt2x00_dev *rt2x00dev = hw->priv;
  380. /*
  381. * Free all allocated data.
  382. */
  383. rt2x00lib_remove_dev(rt2x00dev);
  384. rt2x00pci_free_reg(rt2x00dev);
  385. ieee80211_free_hw(hw);
  386. /*
  387. * Free the PCI device data.
  388. */
  389. pci_set_drvdata(pci_dev, NULL);
  390. pci_disable_device(pci_dev);
  391. pci_release_regions(pci_dev);
  392. }
  393. EXPORT_SYMBOL_GPL(rt2x00pci_remove);
  394. #ifdef CONFIG_PM
  395. int rt2x00pci_suspend(struct pci_dev *pci_dev, pm_message_t state)
  396. {
  397. struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
  398. struct rt2x00_dev *rt2x00dev = hw->priv;
  399. int retval;
  400. retval = rt2x00lib_suspend(rt2x00dev, state);
  401. if (retval)
  402. return retval;
  403. rt2x00pci_free_reg(rt2x00dev);
  404. pci_save_state(pci_dev);
  405. pci_disable_device(pci_dev);
  406. return pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state));
  407. }
  408. EXPORT_SYMBOL_GPL(rt2x00pci_suspend);
  409. int rt2x00pci_resume(struct pci_dev *pci_dev)
  410. {
  411. struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
  412. struct rt2x00_dev *rt2x00dev = hw->priv;
  413. int retval;
  414. if (pci_set_power_state(pci_dev, PCI_D0) ||
  415. pci_enable_device(pci_dev) ||
  416. pci_restore_state(pci_dev)) {
  417. ERROR(rt2x00dev, "Failed to resume device.\n");
  418. return -EIO;
  419. }
  420. retval = rt2x00pci_alloc_reg(rt2x00dev);
  421. if (retval)
  422. return retval;
  423. retval = rt2x00lib_resume(rt2x00dev);
  424. if (retval)
  425. goto exit_free_reg;
  426. return 0;
  427. exit_free_reg:
  428. rt2x00pci_free_reg(rt2x00dev);
  429. return retval;
  430. }
  431. EXPORT_SYMBOL_GPL(rt2x00pci_resume);
  432. #endif /* CONFIG_PM */
  433. /*
  434. * rt2x00pci module information.
  435. */
  436. MODULE_AUTHOR(DRV_PROJECT);
  437. MODULE_VERSION(DRV_VERSION);
  438. MODULE_DESCRIPTION("rt2x00 library");
  439. MODULE_LICENSE("GPL");