platform.c 5.7 KB

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  1. /*
  2. * DBAu1xxx board platform device registration
  3. *
  4. * Copyright (C) 2009 Manuel Lauss
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. */
  20. #include <linux/init.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/dma-mapping.h>
  23. #include <linux/platform_device.h>
  24. #include <asm/mach-au1x00/au1000.h>
  25. #include <asm/mach-au1x00/au1000_dma.h>
  26. #include <asm/mach-db1x00/bcsr.h>
  27. #include "../platform.h"
  28. struct pci_dev;
  29. /* DB1xxx PCMCIA interrupt sources:
  30. * CD0/1 GPIO0/3
  31. * STSCHG0/1 GPIO1/4
  32. * CARD0/1 GPIO2/5
  33. */
  34. #define F_SWAPPED (bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT)
  35. #if defined(CONFIG_MIPS_DB1000)
  36. #define DB1XXX_PCMCIA_CD0 AU1000_GPIO0_INT
  37. #define DB1XXX_PCMCIA_STSCHG0 AU1000_GPIO1_INT
  38. #define DB1XXX_PCMCIA_CARD0 AU1000_GPIO2_INT
  39. #define DB1XXX_PCMCIA_CD1 AU1000_GPIO3_INT
  40. #define DB1XXX_PCMCIA_STSCHG1 AU1000_GPIO4_INT
  41. #define DB1XXX_PCMCIA_CARD1 AU1000_GPIO5_INT
  42. #elif defined(CONFIG_MIPS_DB1100)
  43. #define DB1XXX_PCMCIA_CD0 AU1100_GPIO0_INT
  44. #define DB1XXX_PCMCIA_STSCHG0 AU1100_GPIO1_INT
  45. #define DB1XXX_PCMCIA_CARD0 AU1100_GPIO2_INT
  46. #define DB1XXX_PCMCIA_CD1 AU1100_GPIO3_INT
  47. #define DB1XXX_PCMCIA_STSCHG1 AU1100_GPIO4_INT
  48. #define DB1XXX_PCMCIA_CARD1 AU1100_GPIO5_INT
  49. #elif defined(CONFIG_MIPS_DB1500)
  50. #define DB1XXX_PCMCIA_CD0 AU1500_GPIO0_INT
  51. #define DB1XXX_PCMCIA_STSCHG0 AU1500_GPIO1_INT
  52. #define DB1XXX_PCMCIA_CARD0 AU1500_GPIO2_INT
  53. #define DB1XXX_PCMCIA_CD1 AU1500_GPIO3_INT
  54. #define DB1XXX_PCMCIA_STSCHG1 AU1500_GPIO4_INT
  55. #define DB1XXX_PCMCIA_CARD1 AU1500_GPIO5_INT
  56. static int db1500_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
  57. {
  58. if ((slot < 12) || (slot > 13) || pin == 0)
  59. return -1;
  60. if (slot == 12)
  61. return (pin == 1) ? AU1500_PCI_INTA : 0xff;
  62. if (slot == 13) {
  63. switch (pin) {
  64. case 1: return AU1500_PCI_INTA;
  65. case 2: return AU1500_PCI_INTB;
  66. case 3: return AU1500_PCI_INTC;
  67. case 4: return AU1500_PCI_INTD;
  68. }
  69. }
  70. return -1;
  71. }
  72. static struct resource alchemy_pci_host_res[] = {
  73. [0] = {
  74. .start = AU1500_PCI_PHYS_ADDR,
  75. .end = AU1500_PCI_PHYS_ADDR + 0xfff,
  76. .flags = IORESOURCE_MEM,
  77. },
  78. };
  79. static struct alchemy_pci_platdata db1500_pci_pd = {
  80. .board_map_irq = db1500_map_pci_irq,
  81. };
  82. static struct platform_device db1500_pci_host_dev = {
  83. .dev.platform_data = &db1500_pci_pd,
  84. .name = "alchemy-pci",
  85. .id = 0,
  86. .num_resources = ARRAY_SIZE(alchemy_pci_host_res),
  87. .resource = alchemy_pci_host_res,
  88. };
  89. static int __init db1500_pci_init(void)
  90. {
  91. return platform_device_register(&db1500_pci_host_dev);
  92. }
  93. /* must be arch_initcall; MIPS PCI scans busses in a subsys_initcall */
  94. arch_initcall(db1500_pci_init);
  95. #endif
  96. #ifdef CONFIG_MIPS_DB1100
  97. static struct resource au1100_lcd_resources[] = {
  98. [0] = {
  99. .start = AU1100_LCD_PHYS_ADDR,
  100. .end = AU1100_LCD_PHYS_ADDR + 0x800 - 1,
  101. .flags = IORESOURCE_MEM,
  102. },
  103. [1] = {
  104. .start = AU1100_LCD_INT,
  105. .end = AU1100_LCD_INT,
  106. .flags = IORESOURCE_IRQ,
  107. }
  108. };
  109. static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32);
  110. static struct platform_device au1100_lcd_device = {
  111. .name = "au1100-lcd",
  112. .id = 0,
  113. .dev = {
  114. .dma_mask = &au1100_lcd_dmamask,
  115. .coherent_dma_mask = DMA_BIT_MASK(32),
  116. },
  117. .num_resources = ARRAY_SIZE(au1100_lcd_resources),
  118. .resource = au1100_lcd_resources,
  119. };
  120. #endif
  121. static struct resource alchemy_ac97c_res[] = {
  122. [0] = {
  123. .start = AU1000_AC97_PHYS_ADDR,
  124. .end = AU1000_AC97_PHYS_ADDR + 0xfff,
  125. .flags = IORESOURCE_MEM,
  126. },
  127. [1] = {
  128. .start = DMA_ID_AC97C_TX,
  129. .end = DMA_ID_AC97C_TX,
  130. .flags = IORESOURCE_DMA,
  131. },
  132. [2] = {
  133. .start = DMA_ID_AC97C_RX,
  134. .end = DMA_ID_AC97C_RX,
  135. .flags = IORESOURCE_DMA,
  136. },
  137. };
  138. static struct platform_device alchemy_ac97c_dev = {
  139. .name = "alchemy-ac97c",
  140. .id = -1,
  141. .resource = alchemy_ac97c_res,
  142. .num_resources = ARRAY_SIZE(alchemy_ac97c_res),
  143. };
  144. static struct platform_device alchemy_ac97c_dma_dev = {
  145. .name = "alchemy-pcm-dma",
  146. .id = 0,
  147. };
  148. static struct platform_device db1x00_codec_dev = {
  149. .name = "ac97-codec",
  150. .id = -1,
  151. };
  152. static struct platform_device db1x00_audio_dev = {
  153. .name = "db1000-audio",
  154. };
  155. static int __init db1xxx_dev_init(void)
  156. {
  157. db1x_register_pcmcia_socket(
  158. AU1000_PCMCIA_ATTR_PHYS_ADDR,
  159. AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
  160. AU1000_PCMCIA_MEM_PHYS_ADDR,
  161. AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
  162. AU1000_PCMCIA_IO_PHYS_ADDR,
  163. AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1,
  164. DB1XXX_PCMCIA_CARD0, DB1XXX_PCMCIA_CD0,
  165. /*DB1XXX_PCMCIA_STSCHG0*/0, 0, 0);
  166. db1x_register_pcmcia_socket(
  167. AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004000000,
  168. AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1,
  169. AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004000000,
  170. AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004400000 - 1,
  171. AU1000_PCMCIA_IO_PHYS_ADDR + 0x004000000,
  172. AU1000_PCMCIA_IO_PHYS_ADDR + 0x004010000 - 1,
  173. DB1XXX_PCMCIA_CARD1, DB1XXX_PCMCIA_CD1,
  174. /*DB1XXX_PCMCIA_STSCHG1*/0, 0, 1);
  175. #ifdef CONFIG_MIPS_DB1100
  176. platform_device_register(&au1100_lcd_device);
  177. #endif
  178. platform_device_register(&db1x00_codec_dev);
  179. platform_device_register(&alchemy_ac97c_dma_dev);
  180. platform_device_register(&alchemy_ac97c_dev);
  181. platform_device_register(&db1x00_audio_dev);
  182. db1x_register_norflash(0x02000000, 4 /* 32bit */, F_SWAPPED);
  183. return 0;
  184. }
  185. device_initcall(db1xxx_dev_init);