rt2500usb.c 60 KB

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  1. /*
  2. Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the
  14. Free Software Foundation, Inc.,
  15. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. /*
  18. Module: rt2500usb
  19. Abstract: rt2500usb device specific routines.
  20. Supported chipsets: RT2570.
  21. */
  22. #include <linux/delay.h>
  23. #include <linux/etherdevice.h>
  24. #include <linux/init.h>
  25. #include <linux/kernel.h>
  26. #include <linux/module.h>
  27. #include <linux/usb.h>
  28. #include "rt2x00.h"
  29. #include "rt2x00usb.h"
  30. #include "rt2500usb.h"
  31. /*
  32. * Register access.
  33. * All access to the CSR registers will go through the methods
  34. * rt2500usb_register_read and rt2500usb_register_write.
  35. * BBP and RF register require indirect register access,
  36. * and use the CSR registers BBPCSR and RFCSR to achieve this.
  37. * These indirect registers work with busy bits,
  38. * and we will try maximal REGISTER_BUSY_COUNT times to access
  39. * the register while taking a REGISTER_BUSY_DELAY us delay
  40. * between each attampt. When the busy bit is still set at that time,
  41. * the access attempt is considered to have failed,
  42. * and we will print an error.
  43. * If the usb_cache_mutex is already held then the _lock variants must
  44. * be used instead.
  45. */
  46. static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
  47. const unsigned int offset,
  48. u16 *value)
  49. {
  50. __le16 reg;
  51. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  52. USB_VENDOR_REQUEST_IN, offset,
  53. &reg, sizeof(u16), REGISTER_TIMEOUT);
  54. *value = le16_to_cpu(reg);
  55. }
  56. static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
  57. const unsigned int offset,
  58. u16 *value)
  59. {
  60. __le16 reg;
  61. rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
  62. USB_VENDOR_REQUEST_IN, offset,
  63. &reg, sizeof(u16), REGISTER_TIMEOUT);
  64. *value = le16_to_cpu(reg);
  65. }
  66. static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
  67. const unsigned int offset,
  68. void *value, const u16 length)
  69. {
  70. int timeout = REGISTER_TIMEOUT * (length / sizeof(u16));
  71. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  72. USB_VENDOR_REQUEST_IN, offset,
  73. value, length, timeout);
  74. }
  75. static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
  76. const unsigned int offset,
  77. u16 value)
  78. {
  79. __le16 reg = cpu_to_le16(value);
  80. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  81. USB_VENDOR_REQUEST_OUT, offset,
  82. &reg, sizeof(u16), REGISTER_TIMEOUT);
  83. }
  84. static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
  85. const unsigned int offset,
  86. u16 value)
  87. {
  88. __le16 reg = cpu_to_le16(value);
  89. rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
  90. USB_VENDOR_REQUEST_OUT, offset,
  91. &reg, sizeof(u16), REGISTER_TIMEOUT);
  92. }
  93. static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
  94. const unsigned int offset,
  95. void *value, const u16 length)
  96. {
  97. int timeout = REGISTER_TIMEOUT * (length / sizeof(u16));
  98. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  99. USB_VENDOR_REQUEST_OUT, offset,
  100. value, length, timeout);
  101. }
  102. static u16 rt2500usb_bbp_check(struct rt2x00_dev *rt2x00dev)
  103. {
  104. u16 reg;
  105. unsigned int i;
  106. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  107. rt2500usb_register_read_lock(rt2x00dev, PHY_CSR8, &reg);
  108. if (!rt2x00_get_field16(reg, PHY_CSR8_BUSY))
  109. break;
  110. udelay(REGISTER_BUSY_DELAY);
  111. }
  112. return reg;
  113. }
  114. static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
  115. const unsigned int word, const u8 value)
  116. {
  117. u16 reg;
  118. mutex_lock(&rt2x00dev->usb_cache_mutex);
  119. /*
  120. * Wait until the BBP becomes ready.
  121. */
  122. reg = rt2500usb_bbp_check(rt2x00dev);
  123. if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
  124. ERROR(rt2x00dev, "PHY_CSR8 register busy. Write failed.\n");
  125. mutex_unlock(&rt2x00dev->usb_cache_mutex);
  126. return;
  127. }
  128. /*
  129. * Write the data into the BBP.
  130. */
  131. reg = 0;
  132. rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
  133. rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
  134. rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
  135. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
  136. mutex_unlock(&rt2x00dev->usb_cache_mutex);
  137. }
  138. static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
  139. const unsigned int word, u8 *value)
  140. {
  141. u16 reg;
  142. mutex_lock(&rt2x00dev->usb_cache_mutex);
  143. /*
  144. * Wait until the BBP becomes ready.
  145. */
  146. reg = rt2500usb_bbp_check(rt2x00dev);
  147. if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
  148. ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
  149. return;
  150. }
  151. /*
  152. * Write the request into the BBP.
  153. */
  154. reg = 0;
  155. rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
  156. rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
  157. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
  158. /*
  159. * Wait until the BBP becomes ready.
  160. */
  161. reg = rt2500usb_bbp_check(rt2x00dev);
  162. if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
  163. ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
  164. *value = 0xff;
  165. mutex_unlock(&rt2x00dev->usb_cache_mutex);
  166. return;
  167. }
  168. rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, &reg);
  169. *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
  170. mutex_unlock(&rt2x00dev->usb_cache_mutex);
  171. }
  172. static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
  173. const unsigned int word, const u32 value)
  174. {
  175. u16 reg;
  176. unsigned int i;
  177. if (!word)
  178. return;
  179. mutex_lock(&rt2x00dev->usb_cache_mutex);
  180. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  181. rt2500usb_register_read_lock(rt2x00dev, PHY_CSR10, &reg);
  182. if (!rt2x00_get_field16(reg, PHY_CSR10_RF_BUSY))
  183. goto rf_write;
  184. udelay(REGISTER_BUSY_DELAY);
  185. }
  186. mutex_unlock(&rt2x00dev->usb_cache_mutex);
  187. ERROR(rt2x00dev, "PHY_CSR10 register busy. Write failed.\n");
  188. return;
  189. rf_write:
  190. reg = 0;
  191. rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
  192. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
  193. reg = 0;
  194. rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
  195. rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
  196. rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
  197. rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
  198. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
  199. rt2x00_rf_write(rt2x00dev, word, value);
  200. mutex_unlock(&rt2x00dev->usb_cache_mutex);
  201. }
  202. #ifdef CONFIG_RT2X00_LIB_DEBUGFS
  203. #define CSR_OFFSET(__word) ( CSR_REG_BASE + ((__word) * sizeof(u16)) )
  204. static void rt2500usb_read_csr(struct rt2x00_dev *rt2x00dev,
  205. const unsigned int word, u32 *data)
  206. {
  207. rt2500usb_register_read(rt2x00dev, CSR_OFFSET(word), (u16 *) data);
  208. }
  209. static void rt2500usb_write_csr(struct rt2x00_dev *rt2x00dev,
  210. const unsigned int word, u32 data)
  211. {
  212. rt2500usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
  213. }
  214. static const struct rt2x00debug rt2500usb_rt2x00debug = {
  215. .owner = THIS_MODULE,
  216. .csr = {
  217. .read = rt2500usb_read_csr,
  218. .write = rt2500usb_write_csr,
  219. .word_size = sizeof(u16),
  220. .word_count = CSR_REG_SIZE / sizeof(u16),
  221. },
  222. .eeprom = {
  223. .read = rt2x00_eeprom_read,
  224. .write = rt2x00_eeprom_write,
  225. .word_size = sizeof(u16),
  226. .word_count = EEPROM_SIZE / sizeof(u16),
  227. },
  228. .bbp = {
  229. .read = rt2500usb_bbp_read,
  230. .write = rt2500usb_bbp_write,
  231. .word_size = sizeof(u8),
  232. .word_count = BBP_SIZE / sizeof(u8),
  233. },
  234. .rf = {
  235. .read = rt2x00_rf_read,
  236. .write = rt2500usb_rf_write,
  237. .word_size = sizeof(u32),
  238. .word_count = RF_SIZE / sizeof(u32),
  239. },
  240. };
  241. #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
  242. #ifdef CONFIG_RT2500USB_LEDS
  243. static void rt2500usb_led_brightness(struct led_classdev *led_cdev,
  244. enum led_brightness brightness)
  245. {
  246. struct rt2x00_led *led =
  247. container_of(led_cdev, struct rt2x00_led, led_dev);
  248. unsigned int enabled = brightness != LED_OFF;
  249. unsigned int activity =
  250. led->rt2x00dev->led_flags & LED_SUPPORT_ACTIVITY;
  251. if (in_atomic()) {
  252. NOTICE(led->rt2x00dev,
  253. "Ignoring LED brightness command for led %d", led->type);
  254. return;
  255. }
  256. if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC) {
  257. rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
  258. MAC_CSR20_LINK, enabled);
  259. rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
  260. MAC_CSR20_ACTIVITY, enabled && activity);
  261. }
  262. rt2500usb_register_write(led->rt2x00dev, MAC_CSR20,
  263. led->rt2x00dev->led_mcu_reg);
  264. }
  265. #else
  266. #define rt2500usb_led_brightness NULL
  267. #endif /* CONFIG_RT2500USB_LEDS */
  268. /*
  269. * Configuration handlers.
  270. */
  271. static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
  272. struct rt2x00_intf *intf,
  273. struct rt2x00intf_conf *conf,
  274. const unsigned int flags)
  275. {
  276. unsigned int bcn_preload;
  277. u16 reg;
  278. if (flags & CONFIG_UPDATE_TYPE) {
  279. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
  280. /*
  281. * Enable beacon config
  282. */
  283. bcn_preload = PREAMBLE + get_duration(IEEE80211_HEADER, 20);
  284. rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
  285. rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET, bcn_preload >> 6);
  286. rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW,
  287. 2 * (conf->type != IEEE80211_IF_TYPE_STA));
  288. rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
  289. /*
  290. * Enable synchronisation.
  291. */
  292. rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
  293. rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
  294. rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
  295. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  296. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
  297. rt2x00_set_field16(&reg, TXRX_CSR19_TBCN,
  298. (conf->sync == TSF_SYNC_BEACON));
  299. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
  300. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, conf->sync);
  301. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  302. }
  303. if (flags & CONFIG_UPDATE_MAC)
  304. rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
  305. (3 * sizeof(__le16)));
  306. if (flags & CONFIG_UPDATE_BSSID)
  307. rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
  308. (3 * sizeof(__le16)));
  309. }
  310. static int rt2500usb_config_preamble(struct rt2x00_dev *rt2x00dev,
  311. const int short_preamble,
  312. const int ack_timeout,
  313. const int ack_consume_time)
  314. {
  315. u16 reg;
  316. /*
  317. * When in atomic context, we should let rt2x00lib
  318. * try this configuration again later.
  319. */
  320. if (in_atomic())
  321. return -EAGAIN;
  322. rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
  323. rt2x00_set_field16(&reg, TXRX_CSR1_ACK_TIMEOUT, ack_timeout);
  324. rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
  325. rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
  326. rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
  327. !!short_preamble);
  328. rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
  329. return 0;
  330. }
  331. static void rt2500usb_config_phymode(struct rt2x00_dev *rt2x00dev,
  332. const int basic_rate_mask)
  333. {
  334. rt2500usb_register_write(rt2x00dev, TXRX_CSR11, basic_rate_mask);
  335. }
  336. static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
  337. struct rf_channel *rf, const int txpower)
  338. {
  339. /*
  340. * Set TXpower.
  341. */
  342. rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
  343. /*
  344. * For RT2525E we should first set the channel to half band higher.
  345. */
  346. if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
  347. static const u32 vals[] = {
  348. 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
  349. 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
  350. 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
  351. 0x00000902, 0x00000906
  352. };
  353. rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
  354. if (rf->rf4)
  355. rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
  356. }
  357. rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
  358. rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
  359. rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
  360. if (rf->rf4)
  361. rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
  362. }
  363. static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
  364. const int txpower)
  365. {
  366. u32 rf3;
  367. rt2x00_rf_read(rt2x00dev, 3, &rf3);
  368. rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
  369. rt2500usb_rf_write(rt2x00dev, 3, rf3);
  370. }
  371. static void rt2500usb_config_antenna(struct rt2x00_dev *rt2x00dev,
  372. struct antenna_setup *ant)
  373. {
  374. u8 r2;
  375. u8 r14;
  376. u16 csr5;
  377. u16 csr6;
  378. rt2500usb_bbp_read(rt2x00dev, 2, &r2);
  379. rt2500usb_bbp_read(rt2x00dev, 14, &r14);
  380. rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
  381. rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
  382. /*
  383. * Configure the TX antenna.
  384. */
  385. switch (ant->tx) {
  386. case ANTENNA_HW_DIVERSITY:
  387. rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
  388. rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
  389. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
  390. break;
  391. case ANTENNA_A:
  392. rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
  393. rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
  394. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
  395. break;
  396. case ANTENNA_SW_DIVERSITY:
  397. /*
  398. * NOTE: We should never come here because rt2x00lib is
  399. * supposed to catch this and send us the correct antenna
  400. * explicitely. However we are nog going to bug about this.
  401. * Instead, just default to antenna B.
  402. */
  403. case ANTENNA_B:
  404. rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
  405. rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
  406. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
  407. break;
  408. }
  409. /*
  410. * Configure the RX antenna.
  411. */
  412. switch (ant->rx) {
  413. case ANTENNA_HW_DIVERSITY:
  414. rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
  415. break;
  416. case ANTENNA_A:
  417. rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
  418. break;
  419. case ANTENNA_SW_DIVERSITY:
  420. /*
  421. * NOTE: We should never come here because rt2x00lib is
  422. * supposed to catch this and send us the correct antenna
  423. * explicitely. However we are nog going to bug about this.
  424. * Instead, just default to antenna B.
  425. */
  426. case ANTENNA_B:
  427. rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
  428. break;
  429. }
  430. /*
  431. * RT2525E and RT5222 need to flip TX I/Q
  432. */
  433. if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
  434. rt2x00_rf(&rt2x00dev->chip, RF5222)) {
  435. rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
  436. rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
  437. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
  438. /*
  439. * RT2525E does not need RX I/Q Flip.
  440. */
  441. if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
  442. rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
  443. } else {
  444. rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
  445. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
  446. }
  447. rt2500usb_bbp_write(rt2x00dev, 2, r2);
  448. rt2500usb_bbp_write(rt2x00dev, 14, r14);
  449. rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
  450. rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
  451. }
  452. static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev,
  453. struct rt2x00lib_conf *libconf)
  454. {
  455. u16 reg;
  456. rt2500usb_register_write(rt2x00dev, MAC_CSR10, libconf->slot_time);
  457. rt2500usb_register_write(rt2x00dev, MAC_CSR11, libconf->sifs);
  458. rt2500usb_register_write(rt2x00dev, MAC_CSR12, libconf->eifs);
  459. rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
  460. rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
  461. libconf->conf->beacon_int * 4);
  462. rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
  463. }
  464. static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
  465. struct rt2x00lib_conf *libconf,
  466. const unsigned int flags)
  467. {
  468. if (flags & CONFIG_UPDATE_PHYMODE)
  469. rt2500usb_config_phymode(rt2x00dev, libconf->basic_rates);
  470. if (flags & CONFIG_UPDATE_CHANNEL)
  471. rt2500usb_config_channel(rt2x00dev, &libconf->rf,
  472. libconf->conf->power_level);
  473. if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
  474. rt2500usb_config_txpower(rt2x00dev,
  475. libconf->conf->power_level);
  476. if (flags & CONFIG_UPDATE_ANTENNA)
  477. rt2500usb_config_antenna(rt2x00dev, &libconf->ant);
  478. if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
  479. rt2500usb_config_duration(rt2x00dev, libconf);
  480. }
  481. /*
  482. * Link tuning
  483. */
  484. static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
  485. struct link_qual *qual)
  486. {
  487. u16 reg;
  488. /*
  489. * Update FCS error count from register.
  490. */
  491. rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
  492. qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
  493. /*
  494. * Update False CCA count from register.
  495. */
  496. rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
  497. qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
  498. }
  499. static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
  500. {
  501. u16 eeprom;
  502. u16 value;
  503. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
  504. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
  505. rt2500usb_bbp_write(rt2x00dev, 24, value);
  506. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
  507. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
  508. rt2500usb_bbp_write(rt2x00dev, 25, value);
  509. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
  510. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
  511. rt2500usb_bbp_write(rt2x00dev, 61, value);
  512. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
  513. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
  514. rt2500usb_bbp_write(rt2x00dev, 17, value);
  515. rt2x00dev->link.vgc_level = value;
  516. }
  517. static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev)
  518. {
  519. int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
  520. u16 bbp_thresh;
  521. u16 vgc_bound;
  522. u16 sens;
  523. u16 r24;
  524. u16 r25;
  525. u16 r61;
  526. u16 r17_sens;
  527. u8 r17;
  528. u8 up_bound;
  529. u8 low_bound;
  530. /*
  531. * Read current r17 value, as well as the sensitivity values
  532. * for the r17 register.
  533. */
  534. rt2500usb_bbp_read(rt2x00dev, 17, &r17);
  535. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens);
  536. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound);
  537. up_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER);
  538. low_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCLOWER);
  539. /*
  540. * If we are not associated, we should go straight to the
  541. * dynamic CCA tuning.
  542. */
  543. if (!rt2x00dev->intf_associated)
  544. goto dynamic_cca_tune;
  545. /*
  546. * Determine the BBP tuning threshold and correctly
  547. * set BBP 24, 25 and 61.
  548. */
  549. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh);
  550. bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD);
  551. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24);
  552. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25);
  553. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61);
  554. if ((rssi + bbp_thresh) > 0) {
  555. r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH);
  556. r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH);
  557. r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH);
  558. } else {
  559. r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW);
  560. r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW);
  561. r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW);
  562. }
  563. rt2500usb_bbp_write(rt2x00dev, 24, r24);
  564. rt2500usb_bbp_write(rt2x00dev, 25, r25);
  565. rt2500usb_bbp_write(rt2x00dev, 61, r61);
  566. /*
  567. * A too low RSSI will cause too much false CCA which will
  568. * then corrupt the R17 tuning. To remidy this the tuning should
  569. * be stopped (While making sure the R17 value will not exceed limits)
  570. */
  571. if (rssi >= -40) {
  572. if (r17 != 0x60)
  573. rt2500usb_bbp_write(rt2x00dev, 17, 0x60);
  574. return;
  575. }
  576. /*
  577. * Special big-R17 for short distance
  578. */
  579. if (rssi >= -58) {
  580. sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW);
  581. if (r17 != sens)
  582. rt2500usb_bbp_write(rt2x00dev, 17, sens);
  583. return;
  584. }
  585. /*
  586. * Special mid-R17 for middle distance
  587. */
  588. if (rssi >= -74) {
  589. sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH);
  590. if (r17 != sens)
  591. rt2500usb_bbp_write(rt2x00dev, 17, sens);
  592. return;
  593. }
  594. /*
  595. * Leave short or middle distance condition, restore r17
  596. * to the dynamic tuning range.
  597. */
  598. low_bound = 0x32;
  599. if (rssi < -77)
  600. up_bound -= (-77 - rssi);
  601. if (up_bound < low_bound)
  602. up_bound = low_bound;
  603. if (r17 > up_bound) {
  604. rt2500usb_bbp_write(rt2x00dev, 17, up_bound);
  605. rt2x00dev->link.vgc_level = up_bound;
  606. return;
  607. }
  608. dynamic_cca_tune:
  609. /*
  610. * R17 is inside the dynamic tuning range,
  611. * start tuning the link based on the false cca counter.
  612. */
  613. if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
  614. rt2500usb_bbp_write(rt2x00dev, 17, ++r17);
  615. rt2x00dev->link.vgc_level = r17;
  616. } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
  617. rt2500usb_bbp_write(rt2x00dev, 17, --r17);
  618. rt2x00dev->link.vgc_level = r17;
  619. }
  620. }
  621. /*
  622. * Initialization functions.
  623. */
  624. static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
  625. {
  626. u16 reg;
  627. rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
  628. USB_MODE_TEST, REGISTER_TIMEOUT);
  629. rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
  630. 0x00f0, REGISTER_TIMEOUT);
  631. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  632. rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
  633. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  634. rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
  635. rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
  636. rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
  637. rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
  638. rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
  639. rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
  640. rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
  641. rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
  642. rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
  643. rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
  644. rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
  645. rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
  646. rt2500usb_register_read(rt2x00dev, MAC_CSR21, &reg);
  647. rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, 70);
  648. rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, 30);
  649. rt2500usb_register_write(rt2x00dev, MAC_CSR21, reg);
  650. rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
  651. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
  652. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
  653. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
  654. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
  655. rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
  656. rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
  657. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
  658. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
  659. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
  660. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
  661. rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
  662. rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
  663. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
  664. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
  665. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
  666. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
  667. rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
  668. rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
  669. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
  670. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
  671. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
  672. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
  673. rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
  674. rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
  675. rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
  676. if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
  677. return -EBUSY;
  678. rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
  679. rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
  680. rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
  681. rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
  682. rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
  683. if (rt2x00_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) {
  684. rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
  685. rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
  686. } else {
  687. reg = 0;
  688. rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
  689. rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
  690. }
  691. rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
  692. rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
  693. rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
  694. rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
  695. rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
  696. rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
  697. rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
  698. rt2x00dev->rx->data_size);
  699. rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
  700. rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
  701. rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
  702. rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0xff);
  703. rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
  704. rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
  705. rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
  706. rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
  707. rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
  708. rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
  709. rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
  710. rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
  711. rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
  712. rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
  713. return 0;
  714. }
  715. static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
  716. {
  717. unsigned int i;
  718. u16 eeprom;
  719. u8 value;
  720. u8 reg_id;
  721. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  722. rt2500usb_bbp_read(rt2x00dev, 0, &value);
  723. if ((value != 0xff) && (value != 0x00))
  724. goto continue_csr_init;
  725. NOTICE(rt2x00dev, "Waiting for BBP register.\n");
  726. udelay(REGISTER_BUSY_DELAY);
  727. }
  728. ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
  729. return -EACCES;
  730. continue_csr_init:
  731. rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
  732. rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
  733. rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
  734. rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
  735. rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
  736. rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
  737. rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
  738. rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
  739. rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
  740. rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
  741. rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
  742. rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
  743. rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
  744. rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
  745. rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
  746. rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
  747. rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
  748. rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
  749. rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
  750. rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
  751. rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
  752. rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
  753. rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
  754. rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
  755. rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
  756. rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
  757. rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
  758. rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
  759. rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
  760. rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
  761. rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
  762. for (i = 0; i < EEPROM_BBP_SIZE; i++) {
  763. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
  764. if (eeprom != 0xffff && eeprom != 0x0000) {
  765. reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
  766. value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
  767. rt2500usb_bbp_write(rt2x00dev, reg_id, value);
  768. }
  769. }
  770. return 0;
  771. }
  772. /*
  773. * Device state switch handlers.
  774. */
  775. static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
  776. enum dev_state state)
  777. {
  778. u16 reg;
  779. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  780. rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
  781. state == STATE_RADIO_RX_OFF);
  782. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  783. }
  784. static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
  785. {
  786. /*
  787. * Initialize all registers.
  788. */
  789. if (rt2500usb_init_registers(rt2x00dev) ||
  790. rt2500usb_init_bbp(rt2x00dev)) {
  791. ERROR(rt2x00dev, "Register initialization failed.\n");
  792. return -EIO;
  793. }
  794. return 0;
  795. }
  796. static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
  797. {
  798. rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
  799. rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
  800. /*
  801. * Disable synchronisation.
  802. */
  803. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
  804. rt2x00usb_disable_radio(rt2x00dev);
  805. }
  806. static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
  807. enum dev_state state)
  808. {
  809. u16 reg;
  810. u16 reg2;
  811. unsigned int i;
  812. char put_to_sleep;
  813. char bbp_state;
  814. char rf_state;
  815. put_to_sleep = (state != STATE_AWAKE);
  816. reg = 0;
  817. rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
  818. rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
  819. rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
  820. rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
  821. rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
  822. rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
  823. /*
  824. * Device is not guaranteed to be in the requested state yet.
  825. * We must wait until the register indicates that the
  826. * device has entered the correct state.
  827. */
  828. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  829. rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
  830. bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
  831. rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
  832. if (bbp_state == state && rf_state == state)
  833. return 0;
  834. rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
  835. msleep(30);
  836. }
  837. NOTICE(rt2x00dev, "Device failed to enter state %d, "
  838. "current device state: bbp %d and rf %d.\n",
  839. state, bbp_state, rf_state);
  840. return -EBUSY;
  841. }
  842. static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
  843. enum dev_state state)
  844. {
  845. int retval = 0;
  846. switch (state) {
  847. case STATE_RADIO_ON:
  848. retval = rt2500usb_enable_radio(rt2x00dev);
  849. break;
  850. case STATE_RADIO_OFF:
  851. rt2500usb_disable_radio(rt2x00dev);
  852. break;
  853. case STATE_RADIO_RX_ON:
  854. case STATE_RADIO_RX_ON_LINK:
  855. rt2500usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON);
  856. break;
  857. case STATE_RADIO_RX_OFF:
  858. case STATE_RADIO_RX_OFF_LINK:
  859. rt2500usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_OFF);
  860. break;
  861. case STATE_DEEP_SLEEP:
  862. case STATE_SLEEP:
  863. case STATE_STANDBY:
  864. case STATE_AWAKE:
  865. retval = rt2500usb_set_state(rt2x00dev, state);
  866. break;
  867. default:
  868. retval = -ENOTSUPP;
  869. break;
  870. }
  871. return retval;
  872. }
  873. /*
  874. * TX descriptor initialization
  875. */
  876. static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
  877. struct sk_buff *skb,
  878. struct txentry_desc *txdesc,
  879. struct ieee80211_tx_control *control)
  880. {
  881. struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
  882. __le32 *txd = skbdesc->desc;
  883. u32 word;
  884. /*
  885. * Start writing the descriptor words.
  886. */
  887. rt2x00_desc_read(txd, 1, &word);
  888. rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
  889. rt2x00_set_field32(&word, TXD_W1_AIFS, txdesc->aifs);
  890. rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
  891. rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
  892. rt2x00_desc_write(txd, 1, word);
  893. rt2x00_desc_read(txd, 2, &word);
  894. rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
  895. rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
  896. rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
  897. rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
  898. rt2x00_desc_write(txd, 2, word);
  899. rt2x00_desc_read(txd, 0, &word);
  900. rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, control->retry_limit);
  901. rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
  902. test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
  903. rt2x00_set_field32(&word, TXD_W0_ACK,
  904. test_bit(ENTRY_TXD_ACK, &txdesc->flags));
  905. rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
  906. test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
  907. rt2x00_set_field32(&word, TXD_W0_OFDM,
  908. test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags));
  909. rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
  910. !!(control->flags & IEEE80211_TXCTL_FIRST_FRAGMENT));
  911. rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
  912. rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skbdesc->data_len);
  913. rt2x00_set_field32(&word, TXD_W0_CIPHER, CIPHER_NONE);
  914. rt2x00_desc_write(txd, 0, word);
  915. }
  916. static int rt2500usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev,
  917. struct sk_buff *skb)
  918. {
  919. int length;
  920. /*
  921. * The length _must_ be a multiple of 2,
  922. * but it must _not_ be a multiple of the USB packet size.
  923. */
  924. length = roundup(skb->len, 2);
  925. length += (2 * !(length % rt2x00dev->usb_maxpacket));
  926. return length;
  927. }
  928. /*
  929. * TX data initialization
  930. */
  931. static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
  932. const unsigned int queue)
  933. {
  934. u16 reg;
  935. if (queue != RT2X00_BCN_QUEUE_BEACON)
  936. return;
  937. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  938. if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) {
  939. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
  940. /*
  941. * Beacon generation will fail initially.
  942. * To prevent this we need to register the TXRX_CSR19
  943. * register several times.
  944. */
  945. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  946. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
  947. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  948. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
  949. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  950. }
  951. }
  952. /*
  953. * RX control handlers
  954. */
  955. static void rt2500usb_fill_rxdone(struct queue_entry *entry,
  956. struct rxdone_entry_desc *rxdesc)
  957. {
  958. struct queue_entry_priv_usb_rx *priv_rx = entry->priv_data;
  959. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  960. __le32 *rxd =
  961. (__le32 *)(entry->skb->data +
  962. (priv_rx->urb->actual_length - entry->queue->desc_size));
  963. unsigned int offset = entry->queue->desc_size + 2;
  964. u32 word0;
  965. u32 word1;
  966. /*
  967. * Copy descriptor to the available headroom inside the skbuffer.
  968. * Remove the original copy by trimming the skbuffer.
  969. */
  970. skb_push(entry->skb, offset);
  971. memcpy(entry->skb->data, rxd, entry->queue->desc_size);
  972. rxd = (__le32 *)entry->skb->data;
  973. skb_pull(entry->skb, offset);
  974. skb_trim(entry->skb, rxdesc->size);
  975. /*
  976. * The descriptor is now aligned to 4 bytes and thus it is
  977. * now safe to read it on all architectures.
  978. */
  979. rt2x00_desc_read(rxd, 0, &word0);
  980. rt2x00_desc_read(rxd, 1, &word1);
  981. rxdesc->flags = 0;
  982. if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
  983. rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
  984. if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
  985. rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
  986. /*
  987. * Obtain the status about this packet.
  988. */
  989. rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
  990. rxdesc->rssi = rt2x00_get_field32(word1, RXD_W1_RSSI) -
  991. entry->queue->rt2x00dev->rssi_offset;
  992. rxdesc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM);
  993. rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
  994. rxdesc->my_bss = !!rt2x00_get_field32(word0, RXD_W0_MY_BSS);
  995. /*
  996. * Set descriptor and data pointer.
  997. */
  998. skbdesc->data = entry->skb->data;
  999. skbdesc->data_len = rxdesc->size;
  1000. skbdesc->desc = entry->skb->data - offset;
  1001. skbdesc->desc_len = entry->queue->desc_size;
  1002. }
  1003. /*
  1004. * Interrupt functions.
  1005. */
  1006. static void rt2500usb_beacondone(struct urb *urb)
  1007. {
  1008. struct queue_entry *entry = (struct queue_entry *)urb->context;
  1009. struct queue_entry_priv_usb_bcn *priv_bcn = entry->priv_data;
  1010. if (!test_bit(DEVICE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
  1011. return;
  1012. /*
  1013. * Check if this was the guardian beacon,
  1014. * if that was the case we need to send the real beacon now.
  1015. * Otherwise we should free the sk_buffer, the device
  1016. * should be doing the rest of the work now.
  1017. */
  1018. if (priv_bcn->guardian_urb == urb) {
  1019. usb_submit_urb(priv_bcn->urb, GFP_ATOMIC);
  1020. } else if (priv_bcn->urb == urb) {
  1021. dev_kfree_skb(entry->skb);
  1022. entry->skb = NULL;
  1023. }
  1024. }
  1025. /*
  1026. * Device probe functions.
  1027. */
  1028. static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
  1029. {
  1030. u16 word;
  1031. u8 *mac;
  1032. u8 bbp;
  1033. rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
  1034. /*
  1035. * Start validation of the data that has been read.
  1036. */
  1037. mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
  1038. if (!is_valid_ether_addr(mac)) {
  1039. DECLARE_MAC_BUF(macbuf);
  1040. random_ether_addr(mac);
  1041. EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
  1042. }
  1043. rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
  1044. if (word == 0xffff) {
  1045. rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
  1046. rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
  1047. ANTENNA_SW_DIVERSITY);
  1048. rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
  1049. ANTENNA_SW_DIVERSITY);
  1050. rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
  1051. LED_MODE_DEFAULT);
  1052. rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
  1053. rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
  1054. rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
  1055. rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
  1056. EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
  1057. }
  1058. rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
  1059. if (word == 0xffff) {
  1060. rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
  1061. rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
  1062. rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
  1063. rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
  1064. EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
  1065. }
  1066. rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
  1067. if (word == 0xffff) {
  1068. rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
  1069. DEFAULT_RSSI_OFFSET);
  1070. rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
  1071. EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
  1072. }
  1073. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
  1074. if (word == 0xffff) {
  1075. rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
  1076. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
  1077. EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
  1078. }
  1079. /*
  1080. * Switch lower vgc bound to current BBP R17 value,
  1081. * lower the value a bit for better quality.
  1082. */
  1083. rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
  1084. bbp -= 6;
  1085. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
  1086. if (word == 0xffff) {
  1087. rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
  1088. rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
  1089. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
  1090. EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
  1091. }
  1092. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
  1093. if (word == 0xffff) {
  1094. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
  1095. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
  1096. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
  1097. EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
  1098. } else {
  1099. rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
  1100. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
  1101. }
  1102. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
  1103. if (word == 0xffff) {
  1104. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
  1105. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
  1106. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
  1107. EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
  1108. }
  1109. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
  1110. if (word == 0xffff) {
  1111. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
  1112. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
  1113. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
  1114. EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
  1115. }
  1116. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
  1117. if (word == 0xffff) {
  1118. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
  1119. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
  1120. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
  1121. EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
  1122. }
  1123. return 0;
  1124. }
  1125. static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
  1126. {
  1127. u16 reg;
  1128. u16 value;
  1129. u16 eeprom;
  1130. /*
  1131. * Read EEPROM word for configuration.
  1132. */
  1133. rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
  1134. /*
  1135. * Identify RF chipset.
  1136. */
  1137. value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
  1138. rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
  1139. rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
  1140. if (!rt2x00_check_rev(&rt2x00dev->chip, 0)) {
  1141. ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
  1142. return -ENODEV;
  1143. }
  1144. if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
  1145. !rt2x00_rf(&rt2x00dev->chip, RF2523) &&
  1146. !rt2x00_rf(&rt2x00dev->chip, RF2524) &&
  1147. !rt2x00_rf(&rt2x00dev->chip, RF2525) &&
  1148. !rt2x00_rf(&rt2x00dev->chip, RF2525E) &&
  1149. !rt2x00_rf(&rt2x00dev->chip, RF5222)) {
  1150. ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
  1151. return -ENODEV;
  1152. }
  1153. /*
  1154. * Identify default antenna configuration.
  1155. */
  1156. rt2x00dev->default_ant.tx =
  1157. rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
  1158. rt2x00dev->default_ant.rx =
  1159. rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
  1160. /*
  1161. * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
  1162. * I am not 100% sure about this, but the legacy drivers do not
  1163. * indicate antenna swapping in software is required when
  1164. * diversity is enabled.
  1165. */
  1166. if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
  1167. rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
  1168. if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
  1169. rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
  1170. /*
  1171. * Store led mode, for correct led behaviour.
  1172. */
  1173. #ifdef CONFIG_RT2500USB_LEDS
  1174. value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
  1175. switch (value) {
  1176. case LED_MODE_ASUS:
  1177. case LED_MODE_ALPHA:
  1178. case LED_MODE_DEFAULT:
  1179. rt2x00dev->led_flags = LED_SUPPORT_RADIO;
  1180. break;
  1181. case LED_MODE_TXRX_ACTIVITY:
  1182. rt2x00dev->led_flags =
  1183. LED_SUPPORT_RADIO | LED_SUPPORT_ACTIVITY;
  1184. break;
  1185. case LED_MODE_SIGNAL_STRENGTH:
  1186. rt2x00dev->led_flags = LED_SUPPORT_RADIO;
  1187. break;
  1188. }
  1189. /*
  1190. * Store the current led register value, we need it later
  1191. * in set_brightness but that is called in irq context which
  1192. * means we can't use rt2500usb_register_read() at that time.
  1193. */
  1194. rt2500usb_register_read(rt2x00dev, MAC_CSR20, &rt2x00dev->led_mcu_reg);
  1195. #endif /* CONFIG_RT2500USB_LEDS */
  1196. /*
  1197. * Check if the BBP tuning should be disabled.
  1198. */
  1199. rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
  1200. if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
  1201. __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
  1202. /*
  1203. * Read the RSSI <-> dBm offset information.
  1204. */
  1205. rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
  1206. rt2x00dev->rssi_offset =
  1207. rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
  1208. return 0;
  1209. }
  1210. /*
  1211. * RF value list for RF2522
  1212. * Supports: 2.4 GHz
  1213. */
  1214. static const struct rf_channel rf_vals_bg_2522[] = {
  1215. { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
  1216. { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
  1217. { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
  1218. { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
  1219. { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
  1220. { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
  1221. { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
  1222. { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
  1223. { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
  1224. { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
  1225. { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
  1226. { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
  1227. { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
  1228. { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
  1229. };
  1230. /*
  1231. * RF value list for RF2523
  1232. * Supports: 2.4 GHz
  1233. */
  1234. static const struct rf_channel rf_vals_bg_2523[] = {
  1235. { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
  1236. { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
  1237. { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
  1238. { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
  1239. { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
  1240. { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
  1241. { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
  1242. { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
  1243. { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
  1244. { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
  1245. { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
  1246. { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
  1247. { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
  1248. { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
  1249. };
  1250. /*
  1251. * RF value list for RF2524
  1252. * Supports: 2.4 GHz
  1253. */
  1254. static const struct rf_channel rf_vals_bg_2524[] = {
  1255. { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
  1256. { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
  1257. { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
  1258. { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
  1259. { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
  1260. { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
  1261. { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
  1262. { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
  1263. { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
  1264. { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
  1265. { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
  1266. { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
  1267. { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
  1268. { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
  1269. };
  1270. /*
  1271. * RF value list for RF2525
  1272. * Supports: 2.4 GHz
  1273. */
  1274. static const struct rf_channel rf_vals_bg_2525[] = {
  1275. { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
  1276. { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
  1277. { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
  1278. { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
  1279. { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
  1280. { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
  1281. { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
  1282. { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
  1283. { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
  1284. { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
  1285. { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
  1286. { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
  1287. { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
  1288. { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
  1289. };
  1290. /*
  1291. * RF value list for RF2525e
  1292. * Supports: 2.4 GHz
  1293. */
  1294. static const struct rf_channel rf_vals_bg_2525e[] = {
  1295. { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
  1296. { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
  1297. { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
  1298. { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
  1299. { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
  1300. { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
  1301. { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
  1302. { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
  1303. { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
  1304. { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
  1305. { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
  1306. { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
  1307. { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
  1308. { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
  1309. };
  1310. /*
  1311. * RF value list for RF5222
  1312. * Supports: 2.4 GHz & 5.2 GHz
  1313. */
  1314. static const struct rf_channel rf_vals_5222[] = {
  1315. { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
  1316. { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
  1317. { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
  1318. { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
  1319. { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
  1320. { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
  1321. { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
  1322. { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
  1323. { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
  1324. { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
  1325. { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
  1326. { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
  1327. { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
  1328. { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
  1329. /* 802.11 UNI / HyperLan 2 */
  1330. { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
  1331. { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
  1332. { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
  1333. { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
  1334. { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
  1335. { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
  1336. { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
  1337. { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
  1338. /* 802.11 HyperLan 2 */
  1339. { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
  1340. { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
  1341. { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
  1342. { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
  1343. { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
  1344. { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
  1345. { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
  1346. { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
  1347. { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
  1348. { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
  1349. /* 802.11 UNII */
  1350. { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
  1351. { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
  1352. { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
  1353. { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
  1354. { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
  1355. };
  1356. static void rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
  1357. {
  1358. struct hw_mode_spec *spec = &rt2x00dev->spec;
  1359. u8 *txpower;
  1360. unsigned int i;
  1361. /*
  1362. * Initialize all hw fields.
  1363. */
  1364. rt2x00dev->hw->flags =
  1365. IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
  1366. IEEE80211_HW_RX_INCLUDES_FCS |
  1367. IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
  1368. rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
  1369. rt2x00dev->hw->max_signal = MAX_SIGNAL;
  1370. rt2x00dev->hw->max_rssi = MAX_RX_SSI;
  1371. rt2x00dev->hw->queues = 2;
  1372. SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev);
  1373. SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
  1374. rt2x00_eeprom_addr(rt2x00dev,
  1375. EEPROM_MAC_ADDR_0));
  1376. /*
  1377. * Convert tx_power array in eeprom.
  1378. */
  1379. txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
  1380. for (i = 0; i < 14; i++)
  1381. txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
  1382. /*
  1383. * Initialize hw_mode information.
  1384. */
  1385. spec->supported_bands = SUPPORT_BAND_2GHZ;
  1386. spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
  1387. spec->tx_power_a = NULL;
  1388. spec->tx_power_bg = txpower;
  1389. spec->tx_power_default = DEFAULT_TXPOWER;
  1390. if (rt2x00_rf(&rt2x00dev->chip, RF2522)) {
  1391. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
  1392. spec->channels = rf_vals_bg_2522;
  1393. } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) {
  1394. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
  1395. spec->channels = rf_vals_bg_2523;
  1396. } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) {
  1397. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
  1398. spec->channels = rf_vals_bg_2524;
  1399. } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) {
  1400. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
  1401. spec->channels = rf_vals_bg_2525;
  1402. } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
  1403. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
  1404. spec->channels = rf_vals_bg_2525e;
  1405. } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
  1406. spec->supported_bands |= SUPPORT_BAND_5GHZ;
  1407. spec->num_channels = ARRAY_SIZE(rf_vals_5222);
  1408. spec->channels = rf_vals_5222;
  1409. }
  1410. }
  1411. static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
  1412. {
  1413. int retval;
  1414. /*
  1415. * Allocate eeprom data.
  1416. */
  1417. retval = rt2500usb_validate_eeprom(rt2x00dev);
  1418. if (retval)
  1419. return retval;
  1420. retval = rt2500usb_init_eeprom(rt2x00dev);
  1421. if (retval)
  1422. return retval;
  1423. /*
  1424. * Initialize hw specifications.
  1425. */
  1426. rt2500usb_probe_hw_mode(rt2x00dev);
  1427. /*
  1428. * This device requires the atim queue
  1429. */
  1430. __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
  1431. __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags);
  1432. /*
  1433. * Set the rssi offset.
  1434. */
  1435. rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
  1436. return 0;
  1437. }
  1438. /*
  1439. * IEEE80211 stack callback functions.
  1440. */
  1441. static void rt2500usb_configure_filter(struct ieee80211_hw *hw,
  1442. unsigned int changed_flags,
  1443. unsigned int *total_flags,
  1444. int mc_count,
  1445. struct dev_addr_list *mc_list)
  1446. {
  1447. struct rt2x00_dev *rt2x00dev = hw->priv;
  1448. u16 reg;
  1449. /*
  1450. * Mask off any flags we are going to ignore from
  1451. * the total_flags field.
  1452. */
  1453. *total_flags &=
  1454. FIF_ALLMULTI |
  1455. FIF_FCSFAIL |
  1456. FIF_PLCPFAIL |
  1457. FIF_CONTROL |
  1458. FIF_OTHER_BSS |
  1459. FIF_PROMISC_IN_BSS;
  1460. /*
  1461. * Apply some rules to the filters:
  1462. * - Some filters imply different filters to be set.
  1463. * - Some things we can't filter out at all.
  1464. */
  1465. if (mc_count)
  1466. *total_flags |= FIF_ALLMULTI;
  1467. if (*total_flags & FIF_OTHER_BSS ||
  1468. *total_flags & FIF_PROMISC_IN_BSS)
  1469. *total_flags |= FIF_PROMISC_IN_BSS | FIF_OTHER_BSS;
  1470. /*
  1471. * Check if there is any work left for us.
  1472. */
  1473. if (rt2x00dev->packet_filter == *total_flags)
  1474. return;
  1475. rt2x00dev->packet_filter = *total_flags;
  1476. /*
  1477. * When in atomic context, reschedule and let rt2x00lib
  1478. * call this function again.
  1479. */
  1480. if (in_atomic()) {
  1481. queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->filter_work);
  1482. return;
  1483. }
  1484. /*
  1485. * Start configuration steps.
  1486. * Note that the version error will always be dropped
  1487. * and broadcast frames will always be accepted since
  1488. * there is no filter for it at this time.
  1489. */
  1490. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  1491. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
  1492. !(*total_flags & FIF_FCSFAIL));
  1493. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
  1494. !(*total_flags & FIF_PLCPFAIL));
  1495. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
  1496. !(*total_flags & FIF_CONTROL));
  1497. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
  1498. !(*total_flags & FIF_PROMISC_IN_BSS));
  1499. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
  1500. !(*total_flags & FIF_PROMISC_IN_BSS));
  1501. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
  1502. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
  1503. !(*total_flags & FIF_ALLMULTI));
  1504. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
  1505. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  1506. }
  1507. static int rt2500usb_beacon_update(struct ieee80211_hw *hw,
  1508. struct sk_buff *skb,
  1509. struct ieee80211_tx_control *control)
  1510. {
  1511. struct rt2x00_dev *rt2x00dev = hw->priv;
  1512. struct usb_device *usb_dev = rt2x00dev_usb_dev(rt2x00dev);
  1513. struct rt2x00_intf *intf = vif_to_intf(control->vif);
  1514. struct queue_entry_priv_usb_bcn *priv_bcn;
  1515. struct skb_frame_desc *skbdesc;
  1516. int pipe = usb_sndbulkpipe(usb_dev, 1);
  1517. int length;
  1518. if (unlikely(!intf->beacon))
  1519. return -ENOBUFS;
  1520. priv_bcn = intf->beacon->priv_data;
  1521. /*
  1522. * Add the descriptor in front of the skb.
  1523. */
  1524. skb_push(skb, intf->beacon->queue->desc_size);
  1525. memset(skb->data, 0, intf->beacon->queue->desc_size);
  1526. /*
  1527. * Fill in skb descriptor
  1528. */
  1529. skbdesc = get_skb_frame_desc(skb);
  1530. memset(skbdesc, 0, sizeof(*skbdesc));
  1531. skbdesc->flags |= FRAME_DESC_DRIVER_GENERATED;
  1532. skbdesc->data = skb->data + intf->beacon->queue->desc_size;
  1533. skbdesc->data_len = skb->len - intf->beacon->queue->desc_size;
  1534. skbdesc->desc = skb->data;
  1535. skbdesc->desc_len = intf->beacon->queue->desc_size;
  1536. skbdesc->entry = intf->beacon;
  1537. /*
  1538. * mac80211 doesn't provide the control->queue variable
  1539. * for beacons. Set our own queue identification so
  1540. * it can be used during descriptor initialization.
  1541. */
  1542. control->queue = RT2X00_BCN_QUEUE_BEACON;
  1543. rt2x00lib_write_tx_desc(rt2x00dev, skb, control);
  1544. /*
  1545. * USB devices cannot blindly pass the skb->len as the
  1546. * length of the data to usb_fill_bulk_urb. Pass the skb
  1547. * to the driver to determine what the length should be.
  1548. */
  1549. length = rt2500usb_get_tx_data_len(rt2x00dev, skb);
  1550. usb_fill_bulk_urb(priv_bcn->urb, usb_dev, pipe,
  1551. skb->data, length, rt2500usb_beacondone,
  1552. intf->beacon);
  1553. /*
  1554. * Second we need to create the guardian byte.
  1555. * We only need a single byte, so lets recycle
  1556. * the 'flags' field we are not using for beacons.
  1557. */
  1558. priv_bcn->guardian_data = 0;
  1559. usb_fill_bulk_urb(priv_bcn->guardian_urb, usb_dev, pipe,
  1560. &priv_bcn->guardian_data, 1, rt2500usb_beacondone,
  1561. intf->beacon);
  1562. /*
  1563. * Send out the guardian byte.
  1564. */
  1565. usb_submit_urb(priv_bcn->guardian_urb, GFP_ATOMIC);
  1566. /*
  1567. * Enable beacon generation.
  1568. */
  1569. rt2500usb_kick_tx_queue(rt2x00dev, control->queue);
  1570. return 0;
  1571. }
  1572. static const struct ieee80211_ops rt2500usb_mac80211_ops = {
  1573. .tx = rt2x00mac_tx,
  1574. .start = rt2x00mac_start,
  1575. .stop = rt2x00mac_stop,
  1576. .add_interface = rt2x00mac_add_interface,
  1577. .remove_interface = rt2x00mac_remove_interface,
  1578. .config = rt2x00mac_config,
  1579. .config_interface = rt2x00mac_config_interface,
  1580. .configure_filter = rt2500usb_configure_filter,
  1581. .get_stats = rt2x00mac_get_stats,
  1582. .bss_info_changed = rt2x00mac_bss_info_changed,
  1583. .conf_tx = rt2x00mac_conf_tx,
  1584. .get_tx_stats = rt2x00mac_get_tx_stats,
  1585. .beacon_update = rt2500usb_beacon_update,
  1586. };
  1587. static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
  1588. .probe_hw = rt2500usb_probe_hw,
  1589. .initialize = rt2x00usb_initialize,
  1590. .uninitialize = rt2x00usb_uninitialize,
  1591. .init_rxentry = rt2x00usb_init_rxentry,
  1592. .init_txentry = rt2x00usb_init_txentry,
  1593. .set_device_state = rt2500usb_set_device_state,
  1594. .link_stats = rt2500usb_link_stats,
  1595. .reset_tuner = rt2500usb_reset_tuner,
  1596. .link_tuner = rt2500usb_link_tuner,
  1597. .led_brightness = rt2500usb_led_brightness,
  1598. .write_tx_desc = rt2500usb_write_tx_desc,
  1599. .write_tx_data = rt2x00usb_write_tx_data,
  1600. .get_tx_data_len = rt2500usb_get_tx_data_len,
  1601. .kick_tx_queue = rt2500usb_kick_tx_queue,
  1602. .fill_rxdone = rt2500usb_fill_rxdone,
  1603. .config_intf = rt2500usb_config_intf,
  1604. .config_preamble = rt2500usb_config_preamble,
  1605. .config = rt2500usb_config,
  1606. };
  1607. static const struct data_queue_desc rt2500usb_queue_rx = {
  1608. .entry_num = RX_ENTRIES,
  1609. .data_size = DATA_FRAME_SIZE,
  1610. .desc_size = RXD_DESC_SIZE,
  1611. .priv_size = sizeof(struct queue_entry_priv_usb_rx),
  1612. };
  1613. static const struct data_queue_desc rt2500usb_queue_tx = {
  1614. .entry_num = TX_ENTRIES,
  1615. .data_size = DATA_FRAME_SIZE,
  1616. .desc_size = TXD_DESC_SIZE,
  1617. .priv_size = sizeof(struct queue_entry_priv_usb_tx),
  1618. };
  1619. static const struct data_queue_desc rt2500usb_queue_bcn = {
  1620. .entry_num = BEACON_ENTRIES,
  1621. .data_size = MGMT_FRAME_SIZE,
  1622. .desc_size = TXD_DESC_SIZE,
  1623. .priv_size = sizeof(struct queue_entry_priv_usb_bcn),
  1624. };
  1625. static const struct data_queue_desc rt2500usb_queue_atim = {
  1626. .entry_num = ATIM_ENTRIES,
  1627. .data_size = DATA_FRAME_SIZE,
  1628. .desc_size = TXD_DESC_SIZE,
  1629. .priv_size = sizeof(struct queue_entry_priv_usb_tx),
  1630. };
  1631. static const struct rt2x00_ops rt2500usb_ops = {
  1632. .name = KBUILD_MODNAME,
  1633. .max_sta_intf = 1,
  1634. .max_ap_intf = 1,
  1635. .eeprom_size = EEPROM_SIZE,
  1636. .rf_size = RF_SIZE,
  1637. .rx = &rt2500usb_queue_rx,
  1638. .tx = &rt2500usb_queue_tx,
  1639. .bcn = &rt2500usb_queue_bcn,
  1640. .atim = &rt2500usb_queue_atim,
  1641. .lib = &rt2500usb_rt2x00_ops,
  1642. .hw = &rt2500usb_mac80211_ops,
  1643. #ifdef CONFIG_RT2X00_LIB_DEBUGFS
  1644. .debugfs = &rt2500usb_rt2x00debug,
  1645. #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
  1646. };
  1647. /*
  1648. * rt2500usb module information.
  1649. */
  1650. static struct usb_device_id rt2500usb_device_table[] = {
  1651. /* ASUS */
  1652. { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
  1653. { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
  1654. /* Belkin */
  1655. { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
  1656. { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
  1657. { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
  1658. /* Cisco Systems */
  1659. { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
  1660. { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
  1661. { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
  1662. /* Conceptronic */
  1663. { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
  1664. /* D-LINK */
  1665. { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
  1666. /* Gigabyte */
  1667. { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
  1668. { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
  1669. /* Hercules */
  1670. { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
  1671. /* Melco */
  1672. { USB_DEVICE(0x0411, 0x005e), USB_DEVICE_DATA(&rt2500usb_ops) },
  1673. { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
  1674. { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
  1675. { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
  1676. { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
  1677. /* MSI */
  1678. { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
  1679. { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
  1680. { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
  1681. /* Ralink */
  1682. { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
  1683. { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
  1684. { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
  1685. { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
  1686. /* Siemens */
  1687. { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
  1688. /* SMC */
  1689. { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
  1690. /* Spairon */
  1691. { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
  1692. /* Trust */
  1693. { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
  1694. /* Zinwell */
  1695. { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
  1696. { 0, }
  1697. };
  1698. MODULE_AUTHOR(DRV_PROJECT);
  1699. MODULE_VERSION(DRV_VERSION);
  1700. MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
  1701. MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
  1702. MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
  1703. MODULE_LICENSE("GPL");
  1704. static struct usb_driver rt2500usb_driver = {
  1705. .name = KBUILD_MODNAME,
  1706. .id_table = rt2500usb_device_table,
  1707. .probe = rt2x00usb_probe,
  1708. .disconnect = rt2x00usb_disconnect,
  1709. .suspend = rt2x00usb_suspend,
  1710. .resume = rt2x00usb_resume,
  1711. };
  1712. static int __init rt2500usb_init(void)
  1713. {
  1714. return usb_register(&rt2500usb_driver);
  1715. }
  1716. static void __exit rt2500usb_exit(void)
  1717. {
  1718. usb_deregister(&rt2500usb_driver);
  1719. }
  1720. module_init(rt2500usb_init);
  1721. module_exit(rt2500usb_exit);