twl6040-core.c 15 KB

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  1. /*
  2. * MFD driver for TWL6040 audio device
  3. *
  4. * Authors: Misael Lopez Cruz <misael.lopez@ti.com>
  5. * Jorge Eduardo Candelaria <jorge.candelaria@ti.com>
  6. * Peter Ujfalusi <peter.ujfalusi@ti.com>
  7. *
  8. * Copyright: (C) 2011 Texas Instruments, Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful, but
  15. * WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  17. * General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  22. * 02110-1301 USA
  23. *
  24. */
  25. #include <linux/module.h>
  26. #include <linux/types.h>
  27. #include <linux/slab.h>
  28. #include <linux/kernel.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/gpio.h>
  31. #include <linux/delay.h>
  32. #include <linux/i2c/twl.h>
  33. #include <linux/mfd/core.h>
  34. #include <linux/mfd/twl6040.h>
  35. #define VIBRACTRL_MEMBER(reg) ((reg == TWL6040_REG_VIBCTLL) ? 0 : 1)
  36. int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg)
  37. {
  38. int ret;
  39. u8 val = 0;
  40. mutex_lock(&twl6040->io_mutex);
  41. /* Vibra control registers from cache */
  42. if (unlikely(reg == TWL6040_REG_VIBCTLL ||
  43. reg == TWL6040_REG_VIBCTLR)) {
  44. val = twl6040->vibra_ctrl_cache[VIBRACTRL_MEMBER(reg)];
  45. } else {
  46. ret = twl_i2c_read_u8(TWL_MODULE_AUDIO_VOICE, &val, reg);
  47. if (ret < 0) {
  48. mutex_unlock(&twl6040->io_mutex);
  49. return ret;
  50. }
  51. }
  52. mutex_unlock(&twl6040->io_mutex);
  53. return val;
  54. }
  55. EXPORT_SYMBOL(twl6040_reg_read);
  56. int twl6040_reg_write(struct twl6040 *twl6040, unsigned int reg, u8 val)
  57. {
  58. int ret;
  59. mutex_lock(&twl6040->io_mutex);
  60. ret = twl_i2c_write_u8(TWL_MODULE_AUDIO_VOICE, val, reg);
  61. /* Cache the vibra control registers */
  62. if (reg == TWL6040_REG_VIBCTLL || reg == TWL6040_REG_VIBCTLR)
  63. twl6040->vibra_ctrl_cache[VIBRACTRL_MEMBER(reg)] = val;
  64. mutex_unlock(&twl6040->io_mutex);
  65. return ret;
  66. }
  67. EXPORT_SYMBOL(twl6040_reg_write);
  68. int twl6040_set_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask)
  69. {
  70. int ret;
  71. u8 val;
  72. mutex_lock(&twl6040->io_mutex);
  73. ret = twl_i2c_read_u8(TWL_MODULE_AUDIO_VOICE, &val, reg);
  74. if (ret)
  75. goto out;
  76. val |= mask;
  77. ret = twl_i2c_write_u8(TWL_MODULE_AUDIO_VOICE, val, reg);
  78. out:
  79. mutex_unlock(&twl6040->io_mutex);
  80. return ret;
  81. }
  82. EXPORT_SYMBOL(twl6040_set_bits);
  83. int twl6040_clear_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask)
  84. {
  85. int ret;
  86. u8 val;
  87. mutex_lock(&twl6040->io_mutex);
  88. ret = twl_i2c_read_u8(TWL_MODULE_AUDIO_VOICE, &val, reg);
  89. if (ret)
  90. goto out;
  91. val &= ~mask;
  92. ret = twl_i2c_write_u8(TWL_MODULE_AUDIO_VOICE, val, reg);
  93. out:
  94. mutex_unlock(&twl6040->io_mutex);
  95. return ret;
  96. }
  97. EXPORT_SYMBOL(twl6040_clear_bits);
  98. /* twl6040 codec manual power-up sequence */
  99. static int twl6040_power_up(struct twl6040 *twl6040)
  100. {
  101. u8 ldoctl, ncpctl, lppllctl;
  102. int ret;
  103. /* enable high-side LDO, reference system and internal oscillator */
  104. ldoctl = TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA;
  105. ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  106. if (ret)
  107. return ret;
  108. usleep_range(10000, 10500);
  109. /* enable negative charge pump */
  110. ncpctl = TWL6040_NCPENA;
  111. ret = twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
  112. if (ret)
  113. goto ncp_err;
  114. usleep_range(1000, 1500);
  115. /* enable low-side LDO */
  116. ldoctl |= TWL6040_LSLDOENA;
  117. ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  118. if (ret)
  119. goto lsldo_err;
  120. usleep_range(1000, 1500);
  121. /* enable low-power PLL */
  122. lppllctl = TWL6040_LPLLENA;
  123. ret = twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
  124. if (ret)
  125. goto lppll_err;
  126. usleep_range(5000, 5500);
  127. /* disable internal oscillator */
  128. ldoctl &= ~TWL6040_OSCENA;
  129. ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  130. if (ret)
  131. goto osc_err;
  132. return 0;
  133. osc_err:
  134. lppllctl &= ~TWL6040_LPLLENA;
  135. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
  136. lppll_err:
  137. ldoctl &= ~TWL6040_LSLDOENA;
  138. twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  139. lsldo_err:
  140. ncpctl &= ~TWL6040_NCPENA;
  141. twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
  142. ncp_err:
  143. ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA);
  144. twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  145. return ret;
  146. }
  147. /* twl6040 manual power-down sequence */
  148. static void twl6040_power_down(struct twl6040 *twl6040)
  149. {
  150. u8 ncpctl, ldoctl, lppllctl;
  151. ncpctl = twl6040_reg_read(twl6040, TWL6040_REG_NCPCTL);
  152. ldoctl = twl6040_reg_read(twl6040, TWL6040_REG_LDOCTL);
  153. lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL);
  154. /* enable internal oscillator */
  155. ldoctl |= TWL6040_OSCENA;
  156. twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  157. usleep_range(1000, 1500);
  158. /* disable low-power PLL */
  159. lppllctl &= ~TWL6040_LPLLENA;
  160. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
  161. /* disable low-side LDO */
  162. ldoctl &= ~TWL6040_LSLDOENA;
  163. twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  164. /* disable negative charge pump */
  165. ncpctl &= ~TWL6040_NCPENA;
  166. twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
  167. /* disable high-side LDO, reference system and internal oscillator */
  168. ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA);
  169. twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  170. }
  171. static irqreturn_t twl6040_naudint_handler(int irq, void *data)
  172. {
  173. struct twl6040 *twl6040 = data;
  174. u8 intid, status;
  175. intid = twl6040_reg_read(twl6040, TWL6040_REG_INTID);
  176. if (intid & TWL6040_READYINT)
  177. complete(&twl6040->ready);
  178. if (intid & TWL6040_THINT) {
  179. status = twl6040_reg_read(twl6040, TWL6040_REG_STATUS);
  180. if (status & TWL6040_TSHUTDET) {
  181. dev_warn(twl6040->dev,
  182. "Thermal shutdown, powering-off");
  183. twl6040_power(twl6040, 0);
  184. } else {
  185. dev_warn(twl6040->dev,
  186. "Leaving thermal shutdown, powering-on");
  187. twl6040_power(twl6040, 1);
  188. }
  189. }
  190. return IRQ_HANDLED;
  191. }
  192. static int twl6040_power_up_completion(struct twl6040 *twl6040,
  193. int naudint)
  194. {
  195. int time_left;
  196. u8 intid;
  197. time_left = wait_for_completion_timeout(&twl6040->ready,
  198. msecs_to_jiffies(144));
  199. if (!time_left) {
  200. intid = twl6040_reg_read(twl6040, TWL6040_REG_INTID);
  201. if (!(intid & TWL6040_READYINT)) {
  202. dev_err(twl6040->dev,
  203. "timeout waiting for READYINT\n");
  204. return -ETIMEDOUT;
  205. }
  206. }
  207. return 0;
  208. }
  209. int twl6040_power(struct twl6040 *twl6040, int on)
  210. {
  211. int audpwron = twl6040->audpwron;
  212. int naudint = twl6040->irq;
  213. int ret = 0;
  214. mutex_lock(&twl6040->mutex);
  215. if (on) {
  216. /* already powered-up */
  217. if (twl6040->power_count++)
  218. goto out;
  219. if (gpio_is_valid(audpwron)) {
  220. /* use AUDPWRON line */
  221. gpio_set_value(audpwron, 1);
  222. /* wait for power-up completion */
  223. ret = twl6040_power_up_completion(twl6040, naudint);
  224. if (ret) {
  225. dev_err(twl6040->dev,
  226. "automatic power-down failed\n");
  227. twl6040->power_count = 0;
  228. goto out;
  229. }
  230. } else {
  231. /* use manual power-up sequence */
  232. ret = twl6040_power_up(twl6040);
  233. if (ret) {
  234. dev_err(twl6040->dev,
  235. "manual power-up failed\n");
  236. twl6040->power_count = 0;
  237. goto out;
  238. }
  239. }
  240. /* Default PLL configuration after power up */
  241. twl6040->pll = TWL6040_SYSCLK_SEL_LPPLL;
  242. twl6040->sysclk = 19200000;
  243. twl6040->mclk = 32768;
  244. } else {
  245. /* already powered-down */
  246. if (!twl6040->power_count) {
  247. dev_err(twl6040->dev,
  248. "device is already powered-off\n");
  249. ret = -EPERM;
  250. goto out;
  251. }
  252. if (--twl6040->power_count)
  253. goto out;
  254. if (gpio_is_valid(audpwron)) {
  255. /* use AUDPWRON line */
  256. gpio_set_value(audpwron, 0);
  257. /* power-down sequence latency */
  258. usleep_range(500, 700);
  259. } else {
  260. /* use manual power-down sequence */
  261. twl6040_power_down(twl6040);
  262. }
  263. twl6040->sysclk = 0;
  264. twl6040->mclk = 0;
  265. }
  266. out:
  267. mutex_unlock(&twl6040->mutex);
  268. return ret;
  269. }
  270. EXPORT_SYMBOL(twl6040_power);
  271. int twl6040_set_pll(struct twl6040 *twl6040, int pll_id,
  272. unsigned int freq_in, unsigned int freq_out)
  273. {
  274. u8 hppllctl, lppllctl;
  275. int ret = 0;
  276. mutex_lock(&twl6040->mutex);
  277. hppllctl = twl6040_reg_read(twl6040, TWL6040_REG_HPPLLCTL);
  278. lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL);
  279. switch (pll_id) {
  280. case TWL6040_SYSCLK_SEL_LPPLL:
  281. /* low-power PLL divider */
  282. switch (freq_out) {
  283. case 17640000:
  284. lppllctl |= TWL6040_LPLLFIN;
  285. break;
  286. case 19200000:
  287. lppllctl &= ~TWL6040_LPLLFIN;
  288. break;
  289. default:
  290. dev_err(twl6040->dev,
  291. "freq_out %d not supported\n", freq_out);
  292. ret = -EINVAL;
  293. goto pll_out;
  294. }
  295. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
  296. switch (freq_in) {
  297. case 32768:
  298. lppllctl |= TWL6040_LPLLENA;
  299. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
  300. lppllctl);
  301. mdelay(5);
  302. lppllctl &= ~TWL6040_HPLLSEL;
  303. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
  304. lppllctl);
  305. hppllctl &= ~TWL6040_HPLLENA;
  306. twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL,
  307. hppllctl);
  308. break;
  309. default:
  310. dev_err(twl6040->dev,
  311. "freq_in %d not supported\n", freq_in);
  312. ret = -EINVAL;
  313. goto pll_out;
  314. }
  315. break;
  316. case TWL6040_SYSCLK_SEL_HPPLL:
  317. /* high-performance PLL can provide only 19.2 MHz */
  318. if (freq_out != 19200000) {
  319. dev_err(twl6040->dev,
  320. "freq_out %d not supported\n", freq_out);
  321. ret = -EINVAL;
  322. goto pll_out;
  323. }
  324. hppllctl &= ~TWL6040_MCLK_MSK;
  325. switch (freq_in) {
  326. case 12000000:
  327. /* PLL enabled, active mode */
  328. hppllctl |= TWL6040_MCLK_12000KHZ |
  329. TWL6040_HPLLENA;
  330. break;
  331. case 19200000:
  332. /*
  333. * PLL disabled
  334. * (enable PLL if MCLK jitter quality
  335. * doesn't meet specification)
  336. */
  337. hppllctl |= TWL6040_MCLK_19200KHZ;
  338. break;
  339. case 26000000:
  340. /* PLL enabled, active mode */
  341. hppllctl |= TWL6040_MCLK_26000KHZ |
  342. TWL6040_HPLLENA;
  343. break;
  344. case 38400000:
  345. /* PLL enabled, active mode */
  346. hppllctl |= TWL6040_MCLK_38400KHZ |
  347. TWL6040_HPLLENA;
  348. break;
  349. default:
  350. dev_err(twl6040->dev,
  351. "freq_in %d not supported\n", freq_in);
  352. ret = -EINVAL;
  353. goto pll_out;
  354. }
  355. /* enable clock slicer to ensure input waveform is square */
  356. hppllctl |= TWL6040_HPLLSQRENA;
  357. twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL, hppllctl);
  358. usleep_range(500, 700);
  359. lppllctl |= TWL6040_HPLLSEL;
  360. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
  361. lppllctl &= ~TWL6040_LPLLENA;
  362. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
  363. break;
  364. default:
  365. dev_err(twl6040->dev, "unknown pll id %d\n", pll_id);
  366. ret = -EINVAL;
  367. goto pll_out;
  368. }
  369. twl6040->sysclk = freq_out;
  370. twl6040->mclk = freq_in;
  371. twl6040->pll = pll_id;
  372. pll_out:
  373. mutex_unlock(&twl6040->mutex);
  374. return ret;
  375. }
  376. EXPORT_SYMBOL(twl6040_set_pll);
  377. int twl6040_get_pll(struct twl6040 *twl6040)
  378. {
  379. if (twl6040->power_count)
  380. return twl6040->pll;
  381. else
  382. return -ENODEV;
  383. }
  384. EXPORT_SYMBOL(twl6040_get_pll);
  385. unsigned int twl6040_get_sysclk(struct twl6040 *twl6040)
  386. {
  387. return twl6040->sysclk;
  388. }
  389. EXPORT_SYMBOL(twl6040_get_sysclk);
  390. /* Get the combined status of the vibra control register */
  391. int twl6040_get_vibralr_status(struct twl6040 *twl6040)
  392. {
  393. u8 status;
  394. status = twl6040->vibra_ctrl_cache[0] | twl6040->vibra_ctrl_cache[1];
  395. status &= (TWL6040_VIBENA | TWL6040_VIBSEL);
  396. return status;
  397. }
  398. EXPORT_SYMBOL(twl6040_get_vibralr_status);
  399. static struct resource twl6040_vibra_rsrc[] = {
  400. {
  401. .flags = IORESOURCE_IRQ,
  402. },
  403. };
  404. static struct resource twl6040_codec_rsrc[] = {
  405. {
  406. .flags = IORESOURCE_IRQ,
  407. },
  408. };
  409. static int __devinit twl6040_probe(struct platform_device *pdev)
  410. {
  411. struct twl4030_audio_data *pdata = pdev->dev.platform_data;
  412. struct twl6040 *twl6040;
  413. struct mfd_cell *cell = NULL;
  414. int ret, children = 0;
  415. if (!pdata) {
  416. dev_err(&pdev->dev, "Platform data is missing\n");
  417. return -EINVAL;
  418. }
  419. /* In order to operate correctly we need valid interrupt config */
  420. if (!pdata->naudint_irq || !pdata->irq_base) {
  421. dev_err(&pdev->dev, "Invalid IRQ configuration\n");
  422. return -EINVAL;
  423. }
  424. twl6040 = kzalloc(sizeof(struct twl6040), GFP_KERNEL);
  425. if (!twl6040)
  426. return -ENOMEM;
  427. platform_set_drvdata(pdev, twl6040);
  428. twl6040->dev = &pdev->dev;
  429. twl6040->irq = pdata->naudint_irq;
  430. twl6040->irq_base = pdata->irq_base;
  431. mutex_init(&twl6040->mutex);
  432. mutex_init(&twl6040->io_mutex);
  433. init_completion(&twl6040->ready);
  434. twl6040->rev = twl6040_reg_read(twl6040, TWL6040_REG_ASICREV);
  435. /* ERRATA: Automatic power-up is not possible in ES1.0 */
  436. if (twl6040_get_revid(twl6040) > TWL6040_REV_ES1_0)
  437. twl6040->audpwron = pdata->audpwron_gpio;
  438. else
  439. twl6040->audpwron = -EINVAL;
  440. if (gpio_is_valid(twl6040->audpwron)) {
  441. ret = gpio_request_one(twl6040->audpwron, GPIOF_OUT_INIT_LOW,
  442. "audpwron");
  443. if (ret)
  444. goto gpio1_err;
  445. }
  446. /* codec interrupt */
  447. ret = twl6040_irq_init(twl6040);
  448. if (ret)
  449. goto gpio2_err;
  450. ret = request_threaded_irq(twl6040->irq_base + TWL6040_IRQ_READY,
  451. NULL, twl6040_naudint_handler, 0,
  452. "twl6040_irq_ready", twl6040);
  453. if (ret) {
  454. dev_err(twl6040->dev, "READY IRQ request failed: %d\n",
  455. ret);
  456. goto irq_err;
  457. }
  458. /* dual-access registers controlled by I2C only */
  459. twl6040_set_bits(twl6040, TWL6040_REG_ACCCTL, TWL6040_I2CSEL);
  460. if (pdata->codec) {
  461. int irq = twl6040->irq_base + TWL6040_IRQ_PLUG;
  462. cell = &twl6040->cells[children];
  463. cell->name = "twl6040-codec";
  464. twl6040_codec_rsrc[0].start = irq;
  465. twl6040_codec_rsrc[0].end = irq;
  466. cell->resources = twl6040_codec_rsrc;
  467. cell->num_resources = ARRAY_SIZE(twl6040_codec_rsrc);
  468. cell->platform_data = pdata->codec;
  469. cell->pdata_size = sizeof(*pdata->codec);
  470. children++;
  471. }
  472. if (pdata->vibra) {
  473. int irq = twl6040->irq_base + TWL6040_IRQ_VIB;
  474. cell = &twl6040->cells[children];
  475. cell->name = "twl6040-vibra";
  476. twl6040_vibra_rsrc[0].start = irq;
  477. twl6040_vibra_rsrc[0].end = irq;
  478. cell->resources = twl6040_vibra_rsrc;
  479. cell->num_resources = ARRAY_SIZE(twl6040_vibra_rsrc);
  480. cell->platform_data = pdata->vibra;
  481. cell->pdata_size = sizeof(*pdata->vibra);
  482. children++;
  483. }
  484. if (children) {
  485. ret = mfd_add_devices(&pdev->dev, pdev->id, twl6040->cells,
  486. children, NULL, 0);
  487. if (ret)
  488. goto mfd_err;
  489. } else {
  490. dev_err(&pdev->dev, "No platform data found for children\n");
  491. ret = -ENODEV;
  492. goto mfd_err;
  493. }
  494. return 0;
  495. mfd_err:
  496. free_irq(twl6040->irq_base + TWL6040_IRQ_READY, twl6040);
  497. irq_err:
  498. twl6040_irq_exit(twl6040);
  499. gpio2_err:
  500. if (gpio_is_valid(twl6040->audpwron))
  501. gpio_free(twl6040->audpwron);
  502. gpio1_err:
  503. platform_set_drvdata(pdev, NULL);
  504. kfree(twl6040);
  505. return ret;
  506. }
  507. static int __devexit twl6040_remove(struct platform_device *pdev)
  508. {
  509. struct twl6040 *twl6040 = platform_get_drvdata(pdev);
  510. if (twl6040->power_count)
  511. twl6040_power(twl6040, 0);
  512. if (gpio_is_valid(twl6040->audpwron))
  513. gpio_free(twl6040->audpwron);
  514. free_irq(twl6040->irq_base + TWL6040_IRQ_READY, twl6040);
  515. twl6040_irq_exit(twl6040);
  516. mfd_remove_devices(&pdev->dev);
  517. platform_set_drvdata(pdev, NULL);
  518. kfree(twl6040);
  519. return 0;
  520. }
  521. static struct platform_driver twl6040_driver = {
  522. .probe = twl6040_probe,
  523. .remove = __devexit_p(twl6040_remove),
  524. .driver = {
  525. .owner = THIS_MODULE,
  526. .name = "twl6040",
  527. },
  528. };
  529. module_platform_driver(twl6040_driver);
  530. MODULE_DESCRIPTION("TWL6040 MFD");
  531. MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
  532. MODULE_AUTHOR("Jorge Eduardo Candelaria <jorge.candelaria@ti.com>");
  533. MODULE_LICENSE("GPL");
  534. MODULE_ALIAS("platform:twl6040");