mach-smdkv310.c 10 KB

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  1. /* linux/arch/arm/mach-exynos4/mach-smdkv310.c
  2. *
  3. * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/serial_core.h>
  11. #include <linux/delay.h>
  12. #include <linux/gpio.h>
  13. #include <linux/lcd.h>
  14. #include <linux/mmc/host.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/smsc911x.h>
  17. #include <linux/io.h>
  18. #include <linux/i2c.h>
  19. #include <linux/input.h>
  20. #include <linux/pwm_backlight.h>
  21. #include <asm/mach/arch.h>
  22. #include <asm/hardware/gic.h>
  23. #include <asm/mach-types.h>
  24. #include <video/platform_lcd.h>
  25. #include <plat/regs-serial.h>
  26. #include <plat/regs-srom.h>
  27. #include <plat/regs-fb-v4.h>
  28. #include <plat/cpu.h>
  29. #include <plat/devs.h>
  30. #include <plat/fb.h>
  31. #include <plat/keypad.h>
  32. #include <plat/sdhci.h>
  33. #include <plat/iic.h>
  34. #include <plat/pd.h>
  35. #include <plat/gpio-cfg.h>
  36. #include <plat/backlight.h>
  37. #include <plat/mfc.h>
  38. #include <plat/ehci.h>
  39. #include <plat/clock.h>
  40. #include <mach/map.h>
  41. #include <mach/ohci.h>
  42. #include "common.h"
  43. /* Following are default values for UCON, ULCON and UFCON UART registers */
  44. #define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
  45. S3C2410_UCON_RXILEVEL | \
  46. S3C2410_UCON_TXIRQMODE | \
  47. S3C2410_UCON_RXIRQMODE | \
  48. S3C2410_UCON_RXFIFO_TOI | \
  49. S3C2443_UCON_RXERR_IRQEN)
  50. #define SMDKV310_ULCON_DEFAULT S3C2410_LCON_CS8
  51. #define SMDKV310_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
  52. S5PV210_UFCON_TXTRIG4 | \
  53. S5PV210_UFCON_RXTRIG4)
  54. static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
  55. [0] = {
  56. .hwport = 0,
  57. .flags = 0,
  58. .ucon = SMDKV310_UCON_DEFAULT,
  59. .ulcon = SMDKV310_ULCON_DEFAULT,
  60. .ufcon = SMDKV310_UFCON_DEFAULT,
  61. },
  62. [1] = {
  63. .hwport = 1,
  64. .flags = 0,
  65. .ucon = SMDKV310_UCON_DEFAULT,
  66. .ulcon = SMDKV310_ULCON_DEFAULT,
  67. .ufcon = SMDKV310_UFCON_DEFAULT,
  68. },
  69. [2] = {
  70. .hwport = 2,
  71. .flags = 0,
  72. .ucon = SMDKV310_UCON_DEFAULT,
  73. .ulcon = SMDKV310_ULCON_DEFAULT,
  74. .ufcon = SMDKV310_UFCON_DEFAULT,
  75. },
  76. [3] = {
  77. .hwport = 3,
  78. .flags = 0,
  79. .ucon = SMDKV310_UCON_DEFAULT,
  80. .ulcon = SMDKV310_ULCON_DEFAULT,
  81. .ufcon = SMDKV310_UFCON_DEFAULT,
  82. },
  83. };
  84. static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
  85. .cd_type = S3C_SDHCI_CD_INTERNAL,
  86. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  87. #ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
  88. .max_width = 8,
  89. .host_caps = MMC_CAP_8_BIT_DATA,
  90. #endif
  91. };
  92. static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
  93. .cd_type = S3C_SDHCI_CD_GPIO,
  94. .ext_cd_gpio = EXYNOS4_GPK0(2),
  95. .ext_cd_gpio_invert = 1,
  96. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  97. };
  98. static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
  99. .cd_type = S3C_SDHCI_CD_INTERNAL,
  100. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  101. #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
  102. .max_width = 8,
  103. .host_caps = MMC_CAP_8_BIT_DATA,
  104. #endif
  105. };
  106. static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
  107. .cd_type = S3C_SDHCI_CD_GPIO,
  108. .ext_cd_gpio = EXYNOS4_GPK2(2),
  109. .ext_cd_gpio_invert = 1,
  110. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  111. };
  112. static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
  113. unsigned int power)
  114. {
  115. if (power) {
  116. #if !defined(CONFIG_BACKLIGHT_PWM)
  117. gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0");
  118. gpio_free(EXYNOS4_GPD0(1));
  119. #endif
  120. /* fire nRESET on power up */
  121. gpio_request_one(EXYNOS4_GPX0(6), GPIOF_OUT_INIT_HIGH, "GPX0");
  122. mdelay(100);
  123. gpio_set_value(EXYNOS4_GPX0(6), 0);
  124. mdelay(10);
  125. gpio_set_value(EXYNOS4_GPX0(6), 1);
  126. mdelay(10);
  127. gpio_free(EXYNOS4_GPX0(6));
  128. } else {
  129. #if !defined(CONFIG_BACKLIGHT_PWM)
  130. gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0");
  131. gpio_free(EXYNOS4_GPD0(1));
  132. #endif
  133. }
  134. }
  135. static struct plat_lcd_data smdkv310_lcd_lte480wv_data = {
  136. .set_power = lcd_lte480wv_set_power,
  137. };
  138. static struct platform_device smdkv310_lcd_lte480wv = {
  139. .name = "platform-lcd",
  140. .dev.parent = &s5p_device_fimd0.dev,
  141. .dev.platform_data = &smdkv310_lcd_lte480wv_data,
  142. };
  143. static struct s3c_fb_pd_win smdkv310_fb_win0 = {
  144. .win_mode = {
  145. .left_margin = 13,
  146. .right_margin = 8,
  147. .upper_margin = 7,
  148. .lower_margin = 5,
  149. .hsync_len = 3,
  150. .vsync_len = 1,
  151. .xres = 800,
  152. .yres = 480,
  153. },
  154. .max_bpp = 32,
  155. .default_bpp = 24,
  156. };
  157. static struct s3c_fb_platdata smdkv310_lcd0_pdata __initdata = {
  158. .win[0] = &smdkv310_fb_win0,
  159. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
  160. .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  161. .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
  162. };
  163. static struct resource smdkv310_smsc911x_resources[] = {
  164. [0] = DEFINE_RES_MEM(EXYNOS4_PA_SROM_BANK(1), SZ_64K),
  165. [1] = DEFINE_RES_NAMED(IRQ_EINT(5), 1, NULL, IORESOURCE_IRQ \
  166. | IRQF_TRIGGER_LOW),
  167. };
  168. static struct smsc911x_platform_config smsc9215_config = {
  169. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  170. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  171. .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
  172. .phy_interface = PHY_INTERFACE_MODE_MII,
  173. .mac = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
  174. };
  175. static struct platform_device smdkv310_smsc911x = {
  176. .name = "smsc911x",
  177. .id = -1,
  178. .num_resources = ARRAY_SIZE(smdkv310_smsc911x_resources),
  179. .resource = smdkv310_smsc911x_resources,
  180. .dev = {
  181. .platform_data = &smsc9215_config,
  182. },
  183. };
  184. static uint32_t smdkv310_keymap[] __initdata = {
  185. /* KEY(row, col, keycode) */
  186. KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
  187. KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
  188. KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
  189. KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
  190. };
  191. static struct matrix_keymap_data smdkv310_keymap_data __initdata = {
  192. .keymap = smdkv310_keymap,
  193. .keymap_size = ARRAY_SIZE(smdkv310_keymap),
  194. };
  195. static struct samsung_keypad_platdata smdkv310_keypad_data __initdata = {
  196. .keymap_data = &smdkv310_keymap_data,
  197. .rows = 2,
  198. .cols = 8,
  199. };
  200. static struct i2c_board_info i2c_devs1[] __initdata = {
  201. {I2C_BOARD_INFO("wm8994", 0x1a),},
  202. };
  203. /* USB EHCI */
  204. static struct s5p_ehci_platdata smdkv310_ehci_pdata;
  205. static void __init smdkv310_ehci_init(void)
  206. {
  207. struct s5p_ehci_platdata *pdata = &smdkv310_ehci_pdata;
  208. s5p_ehci_set_platdata(pdata);
  209. }
  210. /* USB OHCI */
  211. static struct exynos4_ohci_platdata smdkv310_ohci_pdata;
  212. static void __init smdkv310_ohci_init(void)
  213. {
  214. struct exynos4_ohci_platdata *pdata = &smdkv310_ohci_pdata;
  215. exynos4_ohci_set_platdata(pdata);
  216. }
  217. static struct platform_device *smdkv310_devices[] __initdata = {
  218. &s3c_device_hsmmc0,
  219. &s3c_device_hsmmc1,
  220. &s3c_device_hsmmc2,
  221. &s3c_device_hsmmc3,
  222. &s3c_device_i2c1,
  223. &s5p_device_i2c_hdmiphy,
  224. &s3c_device_rtc,
  225. &s3c_device_wdt,
  226. &s5p_device_ehci,
  227. &s5p_device_fimc0,
  228. &s5p_device_fimc1,
  229. &s5p_device_fimc2,
  230. &s5p_device_fimc3,
  231. &s5p_device_fimc_md,
  232. &s5p_device_g2d,
  233. &s5p_device_jpeg,
  234. &exynos4_device_ac97,
  235. &exynos4_device_i2s0,
  236. &exynos4_device_ohci,
  237. &samsung_device_keypad,
  238. &s5p_device_mfc,
  239. &s5p_device_mfc_l,
  240. &s5p_device_mfc_r,
  241. &exynos4_device_spdif,
  242. &exynos4_device_sysmmu,
  243. &samsung_asoc_dma,
  244. &samsung_asoc_idma,
  245. &s5p_device_fimd0,
  246. &smdkv310_lcd_lte480wv,
  247. &smdkv310_smsc911x,
  248. &exynos4_device_ahci,
  249. &s5p_device_hdmi,
  250. &s5p_device_mixer,
  251. };
  252. static void __init smdkv310_smsc911x_init(void)
  253. {
  254. u32 cs1;
  255. /* configure nCS1 width to 16 bits */
  256. cs1 = __raw_readl(S5P_SROM_BW) &
  257. ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
  258. cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
  259. (1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
  260. (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
  261. S5P_SROM_BW__NCS1__SHIFT;
  262. __raw_writel(cs1, S5P_SROM_BW);
  263. /* set timing for nCS1 suitable for ethernet chip */
  264. __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
  265. (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
  266. (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
  267. (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
  268. (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
  269. (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
  270. (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
  271. }
  272. /* LCD Backlight data */
  273. static struct samsung_bl_gpio_info smdkv310_bl_gpio_info = {
  274. .no = EXYNOS4_GPD0(1),
  275. .func = S3C_GPIO_SFN(2),
  276. };
  277. static struct platform_pwm_backlight_data smdkv310_bl_data = {
  278. .pwm_id = 1,
  279. .pwm_period_ns = 1000,
  280. };
  281. static void s5p_tv_setup(void)
  282. {
  283. /* direct HPD to HDMI chip */
  284. WARN_ON(gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"));
  285. s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
  286. s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
  287. }
  288. static void __init smdkv310_map_io(void)
  289. {
  290. exynos_init_io(NULL, 0);
  291. s3c24xx_init_clocks(24000000);
  292. s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
  293. }
  294. static void __init smdkv310_reserve(void)
  295. {
  296. s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
  297. }
  298. static void __init smdkv310_machine_init(void)
  299. {
  300. s3c_i2c1_set_platdata(NULL);
  301. i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
  302. smdkv310_smsc911x_init();
  303. s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
  304. s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
  305. s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
  306. s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);
  307. s5p_tv_setup();
  308. s5p_i2c_hdmiphy_set_platdata(NULL);
  309. samsung_keypad_set_platdata(&smdkv310_keypad_data);
  310. samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
  311. s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata);
  312. smdkv310_ehci_init();
  313. smdkv310_ohci_init();
  314. clk_xusbxti.rate = 24000000;
  315. platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
  316. }
  317. MACHINE_START(SMDKV310, "SMDKV310")
  318. /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
  319. /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
  320. .atag_offset = 0x100,
  321. .init_irq = exynos4_init_irq,
  322. .map_io = smdkv310_map_io,
  323. .handle_irq = gic_handle_irq,
  324. .init_machine = smdkv310_machine_init,
  325. .timer = &exynos4_timer,
  326. .reserve = &smdkv310_reserve,
  327. .restart = exynos4_restart,
  328. MACHINE_END
  329. MACHINE_START(SMDKC210, "SMDKC210")
  330. /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
  331. .atag_offset = 0x100,
  332. .init_irq = exynos4_init_irq,
  333. .map_io = smdkv310_map_io,
  334. .handle_irq = gic_handle_irq,
  335. .init_machine = smdkv310_machine_init,
  336. .timer = &exynos4_timer,
  337. .restart = exynos4_restart,
  338. MACHINE_END