drm_mode.h 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493
  1. /*
  2. * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
  3. * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
  4. * Copyright (c) 2008 Red Hat Inc.
  5. * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
  6. * Copyright (c) 2007-2008 Intel Corporation
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a
  9. * copy of this software and associated documentation files (the "Software"),
  10. * to deal in the Software without restriction, including without limitation
  11. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12. * and/or sell copies of the Software, and to permit persons to whom the
  13. * Software is furnished to do so, subject to the following conditions:
  14. *
  15. * The above copyright notice and this permission notice shall be included in
  16. * all copies or substantial portions of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  21. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  23. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  24. * IN THE SOFTWARE.
  25. */
  26. #ifndef _DRM_MODE_H
  27. #define _DRM_MODE_H
  28. #include <linux/types.h>
  29. #define DRM_DISPLAY_INFO_LEN 32
  30. #define DRM_CONNECTOR_NAME_LEN 32
  31. #define DRM_DISPLAY_MODE_LEN 32
  32. #define DRM_PROP_NAME_LEN 32
  33. #define DRM_MODE_TYPE_BUILTIN (1<<0)
  34. #define DRM_MODE_TYPE_CLOCK_C ((1<<1) | DRM_MODE_TYPE_BUILTIN)
  35. #define DRM_MODE_TYPE_CRTC_C ((1<<2) | DRM_MODE_TYPE_BUILTIN)
  36. #define DRM_MODE_TYPE_PREFERRED (1<<3)
  37. #define DRM_MODE_TYPE_DEFAULT (1<<4)
  38. #define DRM_MODE_TYPE_USERDEF (1<<5)
  39. #define DRM_MODE_TYPE_DRIVER (1<<6)
  40. /* Video mode flags */
  41. /* bit compatible with the xorg definitions. */
  42. #define DRM_MODE_FLAG_PHSYNC (1<<0)
  43. #define DRM_MODE_FLAG_NHSYNC (1<<1)
  44. #define DRM_MODE_FLAG_PVSYNC (1<<2)
  45. #define DRM_MODE_FLAG_NVSYNC (1<<3)
  46. #define DRM_MODE_FLAG_INTERLACE (1<<4)
  47. #define DRM_MODE_FLAG_DBLSCAN (1<<5)
  48. #define DRM_MODE_FLAG_CSYNC (1<<6)
  49. #define DRM_MODE_FLAG_PCSYNC (1<<7)
  50. #define DRM_MODE_FLAG_NCSYNC (1<<8)
  51. #define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */
  52. #define DRM_MODE_FLAG_BCAST (1<<10)
  53. #define DRM_MODE_FLAG_PIXMUX (1<<11)
  54. #define DRM_MODE_FLAG_DBLCLK (1<<12)
  55. #define DRM_MODE_FLAG_CLKDIV2 (1<<13)
  56. #define DRM_MODE_FLAG_3D_MASK (0x1f<<14)
  57. #define DRM_MODE_FLAG_3D_NONE (0<<14)
  58. #define DRM_MODE_FLAG_3D_FRAME_PACKING (1<<14)
  59. #define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE (2<<14)
  60. #define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE (3<<14)
  61. #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL (4<<14)
  62. #define DRM_MODE_FLAG_3D_L_DEPTH (5<<14)
  63. #define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6<<14)
  64. #define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7<<14)
  65. #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8<<14)
  66. /* DPMS flags */
  67. /* bit compatible with the xorg definitions. */
  68. #define DRM_MODE_DPMS_ON 0
  69. #define DRM_MODE_DPMS_STANDBY 1
  70. #define DRM_MODE_DPMS_SUSPEND 2
  71. #define DRM_MODE_DPMS_OFF 3
  72. /* Scaling mode options */
  73. #define DRM_MODE_SCALE_NONE 0 /* Unmodified timing (display or
  74. software can still scale) */
  75. #define DRM_MODE_SCALE_FULLSCREEN 1 /* Full screen, ignore aspect */
  76. #define DRM_MODE_SCALE_CENTER 2 /* Centered, no scaling */
  77. #define DRM_MODE_SCALE_ASPECT 3 /* Full screen, preserve aspect */
  78. /* Dithering mode options */
  79. #define DRM_MODE_DITHERING_OFF 0
  80. #define DRM_MODE_DITHERING_ON 1
  81. #define DRM_MODE_DITHERING_AUTO 2
  82. /* Dirty info options */
  83. #define DRM_MODE_DIRTY_OFF 0
  84. #define DRM_MODE_DIRTY_ON 1
  85. #define DRM_MODE_DIRTY_ANNOTATE 2
  86. struct drm_mode_modeinfo {
  87. __u32 clock;
  88. __u16 hdisplay, hsync_start, hsync_end, htotal, hskew;
  89. __u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;
  90. __u32 vrefresh;
  91. __u32 flags;
  92. __u32 type;
  93. char name[DRM_DISPLAY_MODE_LEN];
  94. };
  95. struct drm_mode_card_res {
  96. __u64 fb_id_ptr;
  97. __u64 crtc_id_ptr;
  98. __u64 connector_id_ptr;
  99. __u64 encoder_id_ptr;
  100. __u32 count_fbs;
  101. __u32 count_crtcs;
  102. __u32 count_connectors;
  103. __u32 count_encoders;
  104. __u32 min_width, max_width;
  105. __u32 min_height, max_height;
  106. };
  107. struct drm_mode_crtc {
  108. __u64 set_connectors_ptr;
  109. __u32 count_connectors;
  110. __u32 crtc_id; /**< Id */
  111. __u32 fb_id; /**< Id of framebuffer */
  112. __u32 x, y; /**< Position on the frameuffer */
  113. __u32 gamma_size;
  114. __u32 mode_valid;
  115. struct drm_mode_modeinfo mode;
  116. };
  117. #define DRM_MODE_PRESENT_TOP_FIELD (1<<0)
  118. #define DRM_MODE_PRESENT_BOTTOM_FIELD (1<<1)
  119. /* Planes blend with or override other bits on the CRTC */
  120. struct drm_mode_set_plane {
  121. __u32 plane_id;
  122. __u32 crtc_id;
  123. __u32 fb_id; /* fb object contains surface format type */
  124. __u32 flags; /* see above flags */
  125. /* Signed dest location allows it to be partially off screen */
  126. __s32 crtc_x, crtc_y;
  127. __u32 crtc_w, crtc_h;
  128. /* Source values are 16.16 fixed point */
  129. __u32 src_x, src_y;
  130. __u32 src_h, src_w;
  131. };
  132. struct drm_mode_get_plane {
  133. __u32 plane_id;
  134. __u32 crtc_id;
  135. __u32 fb_id;
  136. __u32 possible_crtcs;
  137. __u32 gamma_size;
  138. __u32 count_format_types;
  139. __u64 format_type_ptr;
  140. };
  141. struct drm_mode_get_plane_res {
  142. __u64 plane_id_ptr;
  143. __u32 count_planes;
  144. };
  145. #define DRM_MODE_ENCODER_NONE 0
  146. #define DRM_MODE_ENCODER_DAC 1
  147. #define DRM_MODE_ENCODER_TMDS 2
  148. #define DRM_MODE_ENCODER_LVDS 3
  149. #define DRM_MODE_ENCODER_TVDAC 4
  150. #define DRM_MODE_ENCODER_VIRTUAL 5
  151. #define DRM_MODE_ENCODER_DSI 6
  152. struct drm_mode_get_encoder {
  153. __u32 encoder_id;
  154. __u32 encoder_type;
  155. __u32 crtc_id; /**< Id of crtc */
  156. __u32 possible_crtcs;
  157. __u32 possible_clones;
  158. };
  159. /* This is for connectors with multiple signal types. */
  160. /* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
  161. #define DRM_MODE_SUBCONNECTOR_Automatic 0
  162. #define DRM_MODE_SUBCONNECTOR_Unknown 0
  163. #define DRM_MODE_SUBCONNECTOR_DVID 3
  164. #define DRM_MODE_SUBCONNECTOR_DVIA 4
  165. #define DRM_MODE_SUBCONNECTOR_Composite 5
  166. #define DRM_MODE_SUBCONNECTOR_SVIDEO 6
  167. #define DRM_MODE_SUBCONNECTOR_Component 8
  168. #define DRM_MODE_SUBCONNECTOR_SCART 9
  169. #define DRM_MODE_CONNECTOR_Unknown 0
  170. #define DRM_MODE_CONNECTOR_VGA 1
  171. #define DRM_MODE_CONNECTOR_DVII 2
  172. #define DRM_MODE_CONNECTOR_DVID 3
  173. #define DRM_MODE_CONNECTOR_DVIA 4
  174. #define DRM_MODE_CONNECTOR_Composite 5
  175. #define DRM_MODE_CONNECTOR_SVIDEO 6
  176. #define DRM_MODE_CONNECTOR_LVDS 7
  177. #define DRM_MODE_CONNECTOR_Component 8
  178. #define DRM_MODE_CONNECTOR_9PinDIN 9
  179. #define DRM_MODE_CONNECTOR_DisplayPort 10
  180. #define DRM_MODE_CONNECTOR_HDMIA 11
  181. #define DRM_MODE_CONNECTOR_HDMIB 12
  182. #define DRM_MODE_CONNECTOR_TV 13
  183. #define DRM_MODE_CONNECTOR_eDP 14
  184. #define DRM_MODE_CONNECTOR_VIRTUAL 15
  185. #define DRM_MODE_CONNECTOR_DSI 16
  186. struct drm_mode_get_connector {
  187. __u64 encoders_ptr;
  188. __u64 modes_ptr;
  189. __u64 props_ptr;
  190. __u64 prop_values_ptr;
  191. __u32 count_modes;
  192. __u32 count_props;
  193. __u32 count_encoders;
  194. __u32 encoder_id; /**< Current Encoder */
  195. __u32 connector_id; /**< Id */
  196. __u32 connector_type;
  197. __u32 connector_type_id;
  198. __u32 connection;
  199. __u32 mm_width, mm_height; /**< HxW in millimeters */
  200. __u32 subpixel;
  201. };
  202. #define DRM_MODE_PROP_PENDING (1<<0)
  203. #define DRM_MODE_PROP_RANGE (1<<1)
  204. #define DRM_MODE_PROP_IMMUTABLE (1<<2)
  205. #define DRM_MODE_PROP_ENUM (1<<3) /* enumerated type with text strings */
  206. #define DRM_MODE_PROP_BLOB (1<<4)
  207. #define DRM_MODE_PROP_BITMASK (1<<5) /* bitmask of enumerated types */
  208. struct drm_mode_property_enum {
  209. __u64 value;
  210. char name[DRM_PROP_NAME_LEN];
  211. };
  212. struct drm_mode_get_property {
  213. __u64 values_ptr; /* values and blob lengths */
  214. __u64 enum_blob_ptr; /* enum and blob id ptrs */
  215. __u32 prop_id;
  216. __u32 flags;
  217. char name[DRM_PROP_NAME_LEN];
  218. __u32 count_values;
  219. __u32 count_enum_blobs;
  220. };
  221. struct drm_mode_connector_set_property {
  222. __u64 value;
  223. __u32 prop_id;
  224. __u32 connector_id;
  225. };
  226. struct drm_mode_obj_get_properties {
  227. __u64 props_ptr;
  228. __u64 prop_values_ptr;
  229. __u32 count_props;
  230. __u32 obj_id;
  231. __u32 obj_type;
  232. };
  233. struct drm_mode_obj_set_property {
  234. __u64 value;
  235. __u32 prop_id;
  236. __u32 obj_id;
  237. __u32 obj_type;
  238. };
  239. struct drm_mode_get_blob {
  240. __u32 blob_id;
  241. __u32 length;
  242. __u64 data;
  243. };
  244. struct drm_mode_fb_cmd {
  245. __u32 fb_id;
  246. __u32 width, height;
  247. __u32 pitch;
  248. __u32 bpp;
  249. __u32 depth;
  250. /* driver specific handle */
  251. __u32 handle;
  252. };
  253. #define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */
  254. struct drm_mode_fb_cmd2 {
  255. __u32 fb_id;
  256. __u32 width, height;
  257. __u32 pixel_format; /* fourcc code from drm_fourcc.h */
  258. __u32 flags; /* see above flags */
  259. /*
  260. * In case of planar formats, this ioctl allows up to 4
  261. * buffer objects with offets and pitches per plane.
  262. * The pitch and offset order is dictated by the fourcc,
  263. * e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as:
  264. *
  265. * YUV 4:2:0 image with a plane of 8 bit Y samples
  266. * followed by an interleaved U/V plane containing
  267. * 8 bit 2x2 subsampled colour difference samples.
  268. *
  269. * So it would consist of Y as offset[0] and UV as
  270. * offeset[1]. Note that offset[0] will generally
  271. * be 0.
  272. */
  273. __u32 handles[4];
  274. __u32 pitches[4]; /* pitch for each plane */
  275. __u32 offsets[4]; /* offset of each plane */
  276. };
  277. #define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
  278. #define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
  279. #define DRM_MODE_FB_DIRTY_FLAGS 0x03
  280. #define DRM_MODE_FB_DIRTY_MAX_CLIPS 256
  281. /*
  282. * Mark a region of a framebuffer as dirty.
  283. *
  284. * Some hardware does not automatically update display contents
  285. * as a hardware or software draw to a framebuffer. This ioctl
  286. * allows userspace to tell the kernel and the hardware what
  287. * regions of the framebuffer have changed.
  288. *
  289. * The kernel or hardware is free to update more then just the
  290. * region specified by the clip rects. The kernel or hardware
  291. * may also delay and/or coalesce several calls to dirty into a
  292. * single update.
  293. *
  294. * Userspace may annotate the updates, the annotates are a
  295. * promise made by the caller that the change is either a copy
  296. * of pixels or a fill of a single color in the region specified.
  297. *
  298. * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
  299. * the number of updated regions are half of num_clips given,
  300. * where the clip rects are paired in src and dst. The width and
  301. * height of each one of the pairs must match.
  302. *
  303. * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
  304. * promises that the region specified of the clip rects is filled
  305. * completely with a single color as given in the color argument.
  306. */
  307. struct drm_mode_fb_dirty_cmd {
  308. __u32 fb_id;
  309. __u32 flags;
  310. __u32 color;
  311. __u32 num_clips;
  312. __u64 clips_ptr;
  313. };
  314. struct drm_mode_mode_cmd {
  315. __u32 connector_id;
  316. struct drm_mode_modeinfo mode;
  317. };
  318. #define DRM_MODE_CURSOR_BO 0x01
  319. #define DRM_MODE_CURSOR_MOVE 0x02
  320. #define DRM_MODE_CURSOR_FLAGS 0x03
  321. /*
  322. * depending on the value in flags different members are used.
  323. *
  324. * CURSOR_BO uses
  325. * crtc_id
  326. * width
  327. * height
  328. * handle - if 0 turns the cursor off
  329. *
  330. * CURSOR_MOVE uses
  331. * crtc_id
  332. * x
  333. * y
  334. */
  335. struct drm_mode_cursor {
  336. __u32 flags;
  337. __u32 crtc_id;
  338. __s32 x;
  339. __s32 y;
  340. __u32 width;
  341. __u32 height;
  342. /* driver specific handle */
  343. __u32 handle;
  344. };
  345. struct drm_mode_cursor2 {
  346. __u32 flags;
  347. __u32 crtc_id;
  348. __s32 x;
  349. __s32 y;
  350. __u32 width;
  351. __u32 height;
  352. /* driver specific handle */
  353. __u32 handle;
  354. __s32 hot_x;
  355. __s32 hot_y;
  356. };
  357. struct drm_mode_crtc_lut {
  358. __u32 crtc_id;
  359. __u32 gamma_size;
  360. /* pointers to arrays */
  361. __u64 red;
  362. __u64 green;
  363. __u64 blue;
  364. };
  365. #define DRM_MODE_PAGE_FLIP_EVENT 0x01
  366. #define DRM_MODE_PAGE_FLIP_ASYNC 0x02
  367. #define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT|DRM_MODE_PAGE_FLIP_ASYNC)
  368. /*
  369. * Request a page flip on the specified crtc.
  370. *
  371. * This ioctl will ask KMS to schedule a page flip for the specified
  372. * crtc. Once any pending rendering targeting the specified fb (as of
  373. * ioctl time) has completed, the crtc will be reprogrammed to display
  374. * that fb after the next vertical refresh. The ioctl returns
  375. * immediately, but subsequent rendering to the current fb will block
  376. * in the execbuffer ioctl until the page flip happens. If a page
  377. * flip is already pending as the ioctl is called, EBUSY will be
  378. * returned.
  379. *
  380. * Flag DRM_MODE_PAGE_FLIP_EVENT requests that drm sends back a vblank
  381. * event (see drm.h: struct drm_event_vblank) when the page flip is
  382. * done. The user_data field passed in with this ioctl will be
  383. * returned as the user_data field in the vblank event struct.
  384. *
  385. * Flag DRM_MODE_PAGE_FLIP_ASYNC requests that the flip happen
  386. * 'as soon as possible', meaning that it not delay waiting for vblank.
  387. * This may cause tearing on the screen.
  388. *
  389. * The reserved field must be zero until we figure out something
  390. * clever to use it for.
  391. */
  392. struct drm_mode_crtc_page_flip {
  393. __u32 crtc_id;
  394. __u32 fb_id;
  395. __u32 flags;
  396. __u32 reserved;
  397. __u64 user_data;
  398. };
  399. /* create a dumb scanout buffer */
  400. struct drm_mode_create_dumb {
  401. uint32_t height;
  402. uint32_t width;
  403. uint32_t bpp;
  404. uint32_t flags;
  405. /* handle, pitch, size will be returned */
  406. uint32_t handle;
  407. uint32_t pitch;
  408. uint64_t size;
  409. };
  410. /* set up for mmap of a dumb scanout buffer */
  411. struct drm_mode_map_dumb {
  412. /** Handle for the object being mapped. */
  413. __u32 handle;
  414. __u32 pad;
  415. /**
  416. * Fake offset to use for subsequent mmap call
  417. *
  418. * This is a fixed-size type for 32/64 compatibility.
  419. */
  420. __u64 offset;
  421. };
  422. struct drm_mode_destroy_dumb {
  423. uint32_t handle;
  424. };
  425. #endif