mac-scc.c 13 KB

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  1. /*
  2. * Ethernet on Serial Communications Controller (SCC) driver for Motorola MPC8xx and MPC82xx.
  3. *
  4. * Copyright (c) 2003 Intracom S.A.
  5. * by Pantelis Antoniou <panto@intracom.gr>
  6. *
  7. * 2005 (c) MontaVista Software, Inc.
  8. * Vitaly Bordug <vbordug@ru.mvista.com>
  9. *
  10. * This file is licensed under the terms of the GNU General Public License
  11. * version 2. This program is licensed "as is" without any warranty of any
  12. * kind, whether express or implied.
  13. */
  14. #include <linux/config.h>
  15. #include <linux/module.h>
  16. #include <linux/kernel.h>
  17. #include <linux/types.h>
  18. #include <linux/sched.h>
  19. #include <linux/string.h>
  20. #include <linux/ptrace.h>
  21. #include <linux/errno.h>
  22. #include <linux/ioport.h>
  23. #include <linux/slab.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/pci.h>
  26. #include <linux/init.h>
  27. #include <linux/delay.h>
  28. #include <linux/netdevice.h>
  29. #include <linux/etherdevice.h>
  30. #include <linux/skbuff.h>
  31. #include <linux/spinlock.h>
  32. #include <linux/mii.h>
  33. #include <linux/ethtool.h>
  34. #include <linux/bitops.h>
  35. #include <linux/fs.h>
  36. #include <linux/platform_device.h>
  37. #include <asm/irq.h>
  38. #include <asm/uaccess.h>
  39. #ifdef CONFIG_8xx
  40. #include <asm/8xx_immap.h>
  41. #include <asm/pgtable.h>
  42. #include <asm/mpc8xx.h>
  43. #include <asm/commproc.h>
  44. #endif
  45. #include "fs_enet.h"
  46. /*************************************************/
  47. #if defined(CONFIG_CPM1)
  48. /* for a 8xx __raw_xxx's are sufficient */
  49. #define __fs_out32(addr, x) __raw_writel(x, addr)
  50. #define __fs_out16(addr, x) __raw_writew(x, addr)
  51. #define __fs_out8(addr, x) __raw_writeb(x, addr)
  52. #define __fs_in32(addr) __raw_readl(addr)
  53. #define __fs_in16(addr) __raw_readw(addr)
  54. #define __fs_in8(addr) __raw_readb(addr)
  55. #else
  56. /* for others play it safe */
  57. #define __fs_out32(addr, x) out_be32(addr, x)
  58. #define __fs_out16(addr, x) out_be16(addr, x)
  59. #define __fs_in32(addr) in_be32(addr)
  60. #define __fs_in16(addr) in_be16(addr)
  61. #endif
  62. /* write, read, set bits, clear bits */
  63. #define W32(_p, _m, _v) __fs_out32(&(_p)->_m, (_v))
  64. #define R32(_p, _m) __fs_in32(&(_p)->_m)
  65. #define S32(_p, _m, _v) W32(_p, _m, R32(_p, _m) | (_v))
  66. #define C32(_p, _m, _v) W32(_p, _m, R32(_p, _m) & ~(_v))
  67. #define W16(_p, _m, _v) __fs_out16(&(_p)->_m, (_v))
  68. #define R16(_p, _m) __fs_in16(&(_p)->_m)
  69. #define S16(_p, _m, _v) W16(_p, _m, R16(_p, _m) | (_v))
  70. #define C16(_p, _m, _v) W16(_p, _m, R16(_p, _m) & ~(_v))
  71. #define W8(_p, _m, _v) __fs_out8(&(_p)->_m, (_v))
  72. #define R8(_p, _m) __fs_in8(&(_p)->_m)
  73. #define S8(_p, _m, _v) W8(_p, _m, R8(_p, _m) | (_v))
  74. #define C8(_p, _m, _v) W8(_p, _m, R8(_p, _m) & ~(_v))
  75. #define SCC_MAX_MULTICAST_ADDRS 64
  76. /*
  77. * Delay to wait for SCC reset command to complete (in us)
  78. */
  79. #define SCC_RESET_DELAY 50
  80. #define MAX_CR_CMD_LOOPS 10000
  81. static inline int scc_cr_cmd(struct fs_enet_private *fep, u32 op)
  82. {
  83. cpm8xx_t *cpmp = &((immap_t *)fs_enet_immap)->im_cpm;
  84. u32 v, ch;
  85. int i = 0;
  86. ch = fep->scc.idx << 2;
  87. v = mk_cr_cmd(ch, op);
  88. W16(cpmp, cp_cpcr, v | CPM_CR_FLG);
  89. for (i = 0; i < MAX_CR_CMD_LOOPS; i++)
  90. if ((R16(cpmp, cp_cpcr) & CPM_CR_FLG) == 0)
  91. break;
  92. if (i >= MAX_CR_CMD_LOOPS) {
  93. printk(KERN_ERR "%s(): Not able to issue CPM command\n",
  94. __FUNCTION__);
  95. return 1;
  96. }
  97. return 0;
  98. }
  99. static int do_pd_setup(struct fs_enet_private *fep)
  100. {
  101. struct platform_device *pdev = to_platform_device(fep->dev);
  102. struct resource *r;
  103. /* Fill out IRQ field */
  104. fep->interrupt = platform_get_irq_byname(pdev, "interrupt");
  105. r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
  106. fep->scc.sccp = (void *)r->start;
  107. if (fep->scc.sccp == NULL)
  108. return -EINVAL;
  109. r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pram");
  110. fep->scc.ep = (void *)r->start;
  111. if (fep->scc.ep == NULL)
  112. return -EINVAL;
  113. return 0;
  114. }
  115. #define SCC_NAPI_RX_EVENT_MSK (SCCE_ENET_RXF | SCCE_ENET_RXB)
  116. #define SCC_RX_EVENT (SCCE_ENET_RXF)
  117. #define SCC_TX_EVENT (SCCE_ENET_TXB)
  118. #define SCC_ERR_EVENT_MSK (SCCE_ENET_TXE | SCCE_ENET_BSY)
  119. static int setup_data(struct net_device *dev)
  120. {
  121. struct fs_enet_private *fep = netdev_priv(dev);
  122. const struct fs_platform_info *fpi = fep->fpi;
  123. fep->scc.idx = fs_get_scc_index(fpi->fs_no);
  124. if ((unsigned int)fep->fcc.idx > 4) /* max 4 SCCs */
  125. return -EINVAL;
  126. do_pd_setup(fep);
  127. fep->scc.hthi = 0;
  128. fep->scc.htlo = 0;
  129. fep->ev_napi_rx = SCC_NAPI_RX_EVENT_MSK;
  130. fep->ev_rx = SCC_RX_EVENT;
  131. fep->ev_tx = SCC_TX_EVENT;
  132. fep->ev_err = SCC_ERR_EVENT_MSK;
  133. return 0;
  134. }
  135. static int allocate_bd(struct net_device *dev)
  136. {
  137. struct fs_enet_private *fep = netdev_priv(dev);
  138. const struct fs_platform_info *fpi = fep->fpi;
  139. fep->ring_mem_addr = cpm_dpalloc((fpi->tx_ring + fpi->rx_ring) *
  140. sizeof(cbd_t), 8);
  141. if (IS_DPERR(fep->ring_mem_addr))
  142. return -ENOMEM;
  143. fep->ring_base = cpm_dpram_addr(fep->ring_mem_addr);
  144. return 0;
  145. }
  146. static void free_bd(struct net_device *dev)
  147. {
  148. struct fs_enet_private *fep = netdev_priv(dev);
  149. if (fep->ring_base)
  150. cpm_dpfree(fep->ring_mem_addr);
  151. }
  152. static void cleanup_data(struct net_device *dev)
  153. {
  154. /* nothing */
  155. }
  156. static void set_promiscuous_mode(struct net_device *dev)
  157. {
  158. struct fs_enet_private *fep = netdev_priv(dev);
  159. scc_t *sccp = fep->scc.sccp;
  160. S16(sccp, scc_psmr, SCC_PSMR_PRO);
  161. }
  162. static void set_multicast_start(struct net_device *dev)
  163. {
  164. struct fs_enet_private *fep = netdev_priv(dev);
  165. scc_enet_t *ep = fep->scc.ep;
  166. W16(ep, sen_gaddr1, 0);
  167. W16(ep, sen_gaddr2, 0);
  168. W16(ep, sen_gaddr3, 0);
  169. W16(ep, sen_gaddr4, 0);
  170. }
  171. static void set_multicast_one(struct net_device *dev, const u8 * mac)
  172. {
  173. struct fs_enet_private *fep = netdev_priv(dev);
  174. scc_enet_t *ep = fep->scc.ep;
  175. u16 taddrh, taddrm, taddrl;
  176. taddrh = ((u16) mac[5] << 8) | mac[4];
  177. taddrm = ((u16) mac[3] << 8) | mac[2];
  178. taddrl = ((u16) mac[1] << 8) | mac[0];
  179. W16(ep, sen_taddrh, taddrh);
  180. W16(ep, sen_taddrm, taddrm);
  181. W16(ep, sen_taddrl, taddrl);
  182. scc_cr_cmd(fep, CPM_CR_SET_GADDR);
  183. }
  184. static void set_multicast_finish(struct net_device *dev)
  185. {
  186. struct fs_enet_private *fep = netdev_priv(dev);
  187. scc_t *sccp = fep->scc.sccp;
  188. scc_enet_t *ep = fep->scc.ep;
  189. /* clear promiscuous always */
  190. C16(sccp, scc_psmr, SCC_PSMR_PRO);
  191. /* if all multi or too many multicasts; just enable all */
  192. if ((dev->flags & IFF_ALLMULTI) != 0 ||
  193. dev->mc_count > SCC_MAX_MULTICAST_ADDRS) {
  194. W16(ep, sen_gaddr1, 0xffff);
  195. W16(ep, sen_gaddr2, 0xffff);
  196. W16(ep, sen_gaddr3, 0xffff);
  197. W16(ep, sen_gaddr4, 0xffff);
  198. }
  199. }
  200. static void set_multicast_list(struct net_device *dev)
  201. {
  202. struct dev_mc_list *pmc;
  203. if ((dev->flags & IFF_PROMISC) == 0) {
  204. set_multicast_start(dev);
  205. for (pmc = dev->mc_list; pmc != NULL; pmc = pmc->next)
  206. set_multicast_one(dev, pmc->dmi_addr);
  207. set_multicast_finish(dev);
  208. } else
  209. set_promiscuous_mode(dev);
  210. }
  211. /*
  212. * This function is called to start or restart the FEC during a link
  213. * change. This only happens when switching between half and full
  214. * duplex.
  215. */
  216. static void restart(struct net_device *dev)
  217. {
  218. struct fs_enet_private *fep = netdev_priv(dev);
  219. scc_t *sccp = fep->scc.sccp;
  220. scc_enet_t *ep = fep->scc.ep;
  221. const struct fs_platform_info *fpi = fep->fpi;
  222. u16 paddrh, paddrm, paddrl;
  223. const unsigned char *mac;
  224. int i;
  225. C32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  226. /* clear everything (slow & steady does it) */
  227. for (i = 0; i < sizeof(*ep); i++)
  228. __fs_out8((char *)ep + i, 0);
  229. /* point to bds */
  230. W16(ep, sen_genscc.scc_rbase, fep->ring_mem_addr);
  231. W16(ep, sen_genscc.scc_tbase,
  232. fep->ring_mem_addr + sizeof(cbd_t) * fpi->rx_ring);
  233. /* Initialize function code registers for big-endian.
  234. */
  235. W8(ep, sen_genscc.scc_rfcr, SCC_EB);
  236. W8(ep, sen_genscc.scc_tfcr, SCC_EB);
  237. /* Set maximum bytes per receive buffer.
  238. * This appears to be an Ethernet frame size, not the buffer
  239. * fragment size. It must be a multiple of four.
  240. */
  241. W16(ep, sen_genscc.scc_mrblr, 0x5f0);
  242. /* Set CRC preset and mask.
  243. */
  244. W32(ep, sen_cpres, 0xffffffff);
  245. W32(ep, sen_cmask, 0xdebb20e3);
  246. W32(ep, sen_crcec, 0); /* CRC Error counter */
  247. W32(ep, sen_alec, 0); /* alignment error counter */
  248. W32(ep, sen_disfc, 0); /* discard frame counter */
  249. W16(ep, sen_pads, 0x8888); /* Tx short frame pad character */
  250. W16(ep, sen_retlim, 15); /* Retry limit threshold */
  251. W16(ep, sen_maxflr, 0x5ee); /* maximum frame length register */
  252. W16(ep, sen_minflr, PKT_MINBUF_SIZE); /* minimum frame length register */
  253. W16(ep, sen_maxd1, 0x000005f0); /* maximum DMA1 length */
  254. W16(ep, sen_maxd2, 0x000005f0); /* maximum DMA2 length */
  255. /* Clear hash tables.
  256. */
  257. W16(ep, sen_gaddr1, 0);
  258. W16(ep, sen_gaddr2, 0);
  259. W16(ep, sen_gaddr3, 0);
  260. W16(ep, sen_gaddr4, 0);
  261. W16(ep, sen_iaddr1, 0);
  262. W16(ep, sen_iaddr2, 0);
  263. W16(ep, sen_iaddr3, 0);
  264. W16(ep, sen_iaddr4, 0);
  265. /* set address
  266. */
  267. mac = dev->dev_addr;
  268. paddrh = ((u16) mac[5] << 8) | mac[4];
  269. paddrm = ((u16) mac[3] << 8) | mac[2];
  270. paddrl = ((u16) mac[1] << 8) | mac[0];
  271. W16(ep, sen_paddrh, paddrh);
  272. W16(ep, sen_paddrm, paddrm);
  273. W16(ep, sen_paddrl, paddrl);
  274. W16(ep, sen_pper, 0);
  275. W16(ep, sen_taddrl, 0);
  276. W16(ep, sen_taddrm, 0);
  277. W16(ep, sen_taddrh, 0);
  278. fs_init_bds(dev);
  279. scc_cr_cmd(fep, CPM_CR_INIT_TRX);
  280. W16(sccp, scc_scce, 0xffff);
  281. /* Enable interrupts we wish to service.
  282. */
  283. W16(sccp, scc_sccm, SCCE_ENET_TXE | SCCE_ENET_RXF | SCCE_ENET_TXB);
  284. /* Set GSMR_H to enable all normal operating modes.
  285. * Set GSMR_L to enable Ethernet to MC68160.
  286. */
  287. W32(sccp, scc_gsmrh, 0);
  288. W32(sccp, scc_gsmrl,
  289. SCC_GSMRL_TCI | SCC_GSMRL_TPL_48 | SCC_GSMRL_TPP_10 |
  290. SCC_GSMRL_MODE_ENET);
  291. /* Set sync/delimiters.
  292. */
  293. W16(sccp, scc_dsr, 0xd555);
  294. /* Set processing mode. Use Ethernet CRC, catch broadcast, and
  295. * start frame search 22 bit times after RENA.
  296. */
  297. W16(sccp, scc_psmr, SCC_PSMR_ENCRC | SCC_PSMR_NIB22);
  298. /* Set full duplex mode if needed */
  299. if (fep->duplex)
  300. S16(sccp, scc_psmr, SCC_PSMR_LPB | SCC_PSMR_FDE);
  301. S32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  302. }
  303. static void stop(struct net_device *dev)
  304. {
  305. struct fs_enet_private *fep = netdev_priv(dev);
  306. scc_t *sccp = fep->scc.sccp;
  307. int i;
  308. for (i = 0; (R16(sccp, scc_sccm) == 0) && i < SCC_RESET_DELAY; i++)
  309. udelay(1);
  310. if (i == SCC_RESET_DELAY)
  311. printk(KERN_WARNING DRV_MODULE_NAME
  312. ": %s SCC timeout on graceful transmit stop\n",
  313. dev->name);
  314. W16(sccp, scc_sccm, 0);
  315. C32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  316. fs_cleanup_bds(dev);
  317. }
  318. static void pre_request_irq(struct net_device *dev, int irq)
  319. {
  320. immap_t *immap = fs_enet_immap;
  321. u32 siel;
  322. /* SIU interrupt */
  323. if (irq >= SIU_IRQ0 && irq < SIU_LEVEL7) {
  324. siel = in_be32(&immap->im_siu_conf.sc_siel);
  325. if ((irq & 1) == 0)
  326. siel |= (0x80000000 >> irq);
  327. else
  328. siel &= ~(0x80000000 >> (irq & ~1));
  329. out_be32(&immap->im_siu_conf.sc_siel, siel);
  330. }
  331. }
  332. static void post_free_irq(struct net_device *dev, int irq)
  333. {
  334. /* nothing */
  335. }
  336. static void napi_clear_rx_event(struct net_device *dev)
  337. {
  338. struct fs_enet_private *fep = netdev_priv(dev);
  339. scc_t *sccp = fep->scc.sccp;
  340. W16(sccp, scc_scce, SCC_NAPI_RX_EVENT_MSK);
  341. }
  342. static void napi_enable_rx(struct net_device *dev)
  343. {
  344. struct fs_enet_private *fep = netdev_priv(dev);
  345. scc_t *sccp = fep->scc.sccp;
  346. S16(sccp, scc_sccm, SCC_NAPI_RX_EVENT_MSK);
  347. }
  348. static void napi_disable_rx(struct net_device *dev)
  349. {
  350. struct fs_enet_private *fep = netdev_priv(dev);
  351. scc_t *sccp = fep->scc.sccp;
  352. C16(sccp, scc_sccm, SCC_NAPI_RX_EVENT_MSK);
  353. }
  354. static void rx_bd_done(struct net_device *dev)
  355. {
  356. /* nothing */
  357. }
  358. static void tx_kickstart(struct net_device *dev)
  359. {
  360. /* nothing */
  361. }
  362. static u32 get_int_events(struct net_device *dev)
  363. {
  364. struct fs_enet_private *fep = netdev_priv(dev);
  365. scc_t *sccp = fep->scc.sccp;
  366. return (u32) R16(sccp, scc_scce);
  367. }
  368. static void clear_int_events(struct net_device *dev, u32 int_events)
  369. {
  370. struct fs_enet_private *fep = netdev_priv(dev);
  371. scc_t *sccp = fep->scc.sccp;
  372. W16(sccp, scc_scce, int_events & 0xffff);
  373. }
  374. static void ev_error(struct net_device *dev, u32 int_events)
  375. {
  376. printk(KERN_WARNING DRV_MODULE_NAME
  377. ": %s SCC ERROR(s) 0x%x\n", dev->name, int_events);
  378. }
  379. static int get_regs(struct net_device *dev, void *p, int *sizep)
  380. {
  381. struct fs_enet_private *fep = netdev_priv(dev);
  382. if (*sizep < sizeof(scc_t) + sizeof(scc_enet_t))
  383. return -EINVAL;
  384. memcpy_fromio(p, fep->scc.sccp, sizeof(scc_t));
  385. p = (char *)p + sizeof(scc_t);
  386. memcpy_fromio(p, fep->scc.ep, sizeof(scc_enet_t));
  387. return 0;
  388. }
  389. static int get_regs_len(struct net_device *dev)
  390. {
  391. return sizeof(scc_t) + sizeof(scc_enet_t);
  392. }
  393. static void tx_restart(struct net_device *dev)
  394. {
  395. struct fs_enet_private *fep = netdev_priv(dev);
  396. scc_cr_cmd(fep, CPM_CR_RESTART_TX);
  397. }
  398. /*************************************************************************/
  399. const struct fs_ops fs_scc_ops = {
  400. .setup_data = setup_data,
  401. .cleanup_data = cleanup_data,
  402. .set_multicast_list = set_multicast_list,
  403. .restart = restart,
  404. .stop = stop,
  405. .pre_request_irq = pre_request_irq,
  406. .post_free_irq = post_free_irq,
  407. .napi_clear_rx_event = napi_clear_rx_event,
  408. .napi_enable_rx = napi_enable_rx,
  409. .napi_disable_rx = napi_disable_rx,
  410. .rx_bd_done = rx_bd_done,
  411. .tx_kickstart = tx_kickstart,
  412. .get_int_events = get_int_events,
  413. .clear_int_events = clear_int_events,
  414. .ev_error = ev_error,
  415. .get_regs = get_regs,
  416. .get_regs_len = get_regs_len,
  417. .tx_restart = tx_restart,
  418. .allocate_bd = allocate_bd,
  419. .free_bd = free_bd,
  420. };