stamp.c 30 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf537/boards/stamp.c
  3. * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Created:
  7. * Description:
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2006 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/kernel.h>
  32. #include <linux/platform_device.h>
  33. #include <linux/mtd/mtd.h>
  34. #include <linux/mtd/nand.h>
  35. #include <linux/mtd/partitions.h>
  36. #include <linux/mtd/plat-ram.h>
  37. #include <linux/mtd/physmap.h>
  38. #include <linux/spi/spi.h>
  39. #include <linux/spi/flash.h>
  40. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  41. #include <linux/usb/isp1362.h>
  42. #endif
  43. #include <linux/ata_platform.h>
  44. #include <linux/irq.h>
  45. #include <linux/interrupt.h>
  46. #include <linux/i2c.h>
  47. #include <linux/usb/sl811.h>
  48. #include <linux/spi/mmc_spi.h>
  49. #include <asm/dma.h>
  50. #include <asm/bfin5xx_spi.h>
  51. #include <asm/reboot.h>
  52. #include <asm/portmux.h>
  53. #include <asm/dpmc.h>
  54. /*
  55. * Name the Board for the /proc/cpuinfo
  56. */
  57. const char bfin_board_name[] = "ADI BF537-STAMP";
  58. /*
  59. * Driver needs to know address, irq and flag pin.
  60. */
  61. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  62. #include <linux/usb/isp1760.h>
  63. static struct resource bfin_isp1760_resources[] = {
  64. [0] = {
  65. .start = 0x203C0000,
  66. .end = 0x203C0000 + 0x000fffff,
  67. .flags = IORESOURCE_MEM,
  68. },
  69. [1] = {
  70. .start = IRQ_PF7,
  71. .end = IRQ_PF7,
  72. .flags = IORESOURCE_IRQ,
  73. },
  74. };
  75. static struct isp1760_platform_data isp1760_priv = {
  76. .is_isp1761 = 0,
  77. .port1_disable = 0,
  78. .bus_width_16 = 1,
  79. .port1_otg = 0,
  80. .analog_oc = 0,
  81. .dack_polarity_high = 0,
  82. .dreq_polarity_high = 0,
  83. };
  84. static struct platform_device bfin_isp1760_device = {
  85. .name = "isp1760-hcd",
  86. .id = 0,
  87. .dev = {
  88. .platform_data = &isp1760_priv,
  89. },
  90. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  91. .resource = bfin_isp1760_resources,
  92. };
  93. #endif
  94. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  95. #include <linux/input.h>
  96. #include <linux/gpio_keys.h>
  97. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  98. {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
  99. {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
  100. {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
  101. {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
  102. };
  103. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  104. .buttons = bfin_gpio_keys_table,
  105. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  106. };
  107. static struct platform_device bfin_device_gpiokeys = {
  108. .name = "gpio-keys",
  109. .dev = {
  110. .platform_data = &bfin_gpio_keys_data,
  111. },
  112. };
  113. #endif
  114. static struct resource bfin_gpios_resources = {
  115. .start = 0,
  116. .end = MAX_BLACKFIN_GPIOS - 1,
  117. .flags = IORESOURCE_IRQ,
  118. };
  119. static struct platform_device bfin_gpios_device = {
  120. .name = "simple-gpio",
  121. .id = -1,
  122. .num_resources = 1,
  123. .resource = &bfin_gpios_resources,
  124. };
  125. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  126. static struct resource bfin_pcmcia_cf_resources[] = {
  127. {
  128. .start = 0x20310000, /* IO PORT */
  129. .end = 0x20312000,
  130. .flags = IORESOURCE_MEM,
  131. }, {
  132. .start = 0x20311000, /* Attribute Memory */
  133. .end = 0x20311FFF,
  134. .flags = IORESOURCE_MEM,
  135. }, {
  136. .start = IRQ_PF4,
  137. .end = IRQ_PF4,
  138. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  139. }, {
  140. .start = 6, /* Card Detect PF6 */
  141. .end = 6,
  142. .flags = IORESOURCE_IRQ,
  143. },
  144. };
  145. static struct platform_device bfin_pcmcia_cf_device = {
  146. .name = "bfin_cf_pcmcia",
  147. .id = -1,
  148. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  149. .resource = bfin_pcmcia_cf_resources,
  150. };
  151. #endif
  152. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  153. static struct platform_device rtc_device = {
  154. .name = "rtc-bfin",
  155. .id = -1,
  156. };
  157. #endif
  158. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  159. static struct resource smc91x_resources[] = {
  160. {
  161. .name = "smc91x-regs",
  162. .start = 0x20300300,
  163. .end = 0x20300300 + 16,
  164. .flags = IORESOURCE_MEM,
  165. }, {
  166. .start = IRQ_PF7,
  167. .end = IRQ_PF7,
  168. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  169. },
  170. };
  171. static struct platform_device smc91x_device = {
  172. .name = "smc91x",
  173. .id = 0,
  174. .num_resources = ARRAY_SIZE(smc91x_resources),
  175. .resource = smc91x_resources,
  176. };
  177. #endif
  178. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  179. static struct resource dm9000_resources[] = {
  180. [0] = {
  181. .start = 0x203FB800,
  182. .end = 0x203FB800 + 8,
  183. .flags = IORESOURCE_MEM,
  184. },
  185. [1] = {
  186. .start = IRQ_PF9,
  187. .end = IRQ_PF9,
  188. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  189. },
  190. };
  191. static struct platform_device dm9000_device = {
  192. .name = "dm9000",
  193. .id = -1,
  194. .num_resources = ARRAY_SIZE(dm9000_resources),
  195. .resource = dm9000_resources,
  196. };
  197. #endif
  198. #if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE)
  199. static struct resource ax88180_resources[] = {
  200. [0] = {
  201. .start = 0x20300000,
  202. .end = 0x20300000 + 0x8000,
  203. .flags = IORESOURCE_MEM,
  204. },
  205. [1] = {
  206. .start = IRQ_PF7,
  207. .end = IRQ_PF7,
  208. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL),
  209. },
  210. };
  211. static struct platform_device ax88180_device = {
  212. .name = "ax88180",
  213. .id = -1,
  214. .num_resources = ARRAY_SIZE(ax88180_resources),
  215. .resource = ax88180_resources,
  216. };
  217. #endif
  218. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  219. static struct resource sl811_hcd_resources[] = {
  220. {
  221. .start = 0x20340000,
  222. .end = 0x20340000,
  223. .flags = IORESOURCE_MEM,
  224. }, {
  225. .start = 0x20340004,
  226. .end = 0x20340004,
  227. .flags = IORESOURCE_MEM,
  228. }, {
  229. .start = CONFIG_USB_SL811_BFIN_IRQ,
  230. .end = CONFIG_USB_SL811_BFIN_IRQ,
  231. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  232. },
  233. };
  234. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  235. void sl811_port_power(struct device *dev, int is_on)
  236. {
  237. gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
  238. gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
  239. }
  240. #endif
  241. static struct sl811_platform_data sl811_priv = {
  242. .potpg = 10,
  243. .power = 250, /* == 500mA */
  244. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  245. .port_power = &sl811_port_power,
  246. #endif
  247. };
  248. static struct platform_device sl811_hcd_device = {
  249. .name = "sl811-hcd",
  250. .id = 0,
  251. .dev = {
  252. .platform_data = &sl811_priv,
  253. },
  254. .num_resources = ARRAY_SIZE(sl811_hcd_resources),
  255. .resource = sl811_hcd_resources,
  256. };
  257. #endif
  258. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  259. static struct resource isp1362_hcd_resources[] = {
  260. {
  261. .start = 0x20360000,
  262. .end = 0x20360000,
  263. .flags = IORESOURCE_MEM,
  264. }, {
  265. .start = 0x20360004,
  266. .end = 0x20360004,
  267. .flags = IORESOURCE_MEM,
  268. }, {
  269. .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
  270. .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
  271. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  272. },
  273. };
  274. static struct isp1362_platform_data isp1362_priv = {
  275. .sel15Kres = 1,
  276. .clknotstop = 0,
  277. .oc_enable = 0,
  278. .int_act_high = 0,
  279. .int_edge_triggered = 0,
  280. .remote_wakeup_connected = 0,
  281. .no_power_switching = 1,
  282. .power_switching_mode = 0,
  283. };
  284. static struct platform_device isp1362_hcd_device = {
  285. .name = "isp1362-hcd",
  286. .id = 0,
  287. .dev = {
  288. .platform_data = &isp1362_priv,
  289. },
  290. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  291. .resource = isp1362_hcd_resources,
  292. };
  293. #endif
  294. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  295. static struct platform_device bfin_mac_device = {
  296. .name = "bfin_mac",
  297. };
  298. #endif
  299. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  300. static struct resource net2272_bfin_resources[] = {
  301. {
  302. .start = 0x20300000,
  303. .end = 0x20300000 + 0x100,
  304. .flags = IORESOURCE_MEM,
  305. }, {
  306. .start = IRQ_PF7,
  307. .end = IRQ_PF7,
  308. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  309. },
  310. };
  311. static struct platform_device net2272_bfin_device = {
  312. .name = "net2272",
  313. .id = -1,
  314. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  315. .resource = net2272_bfin_resources,
  316. };
  317. #endif
  318. #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
  319. #ifdef CONFIG_MTD_PARTITIONS
  320. const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
  321. static struct mtd_partition bfin_plat_nand_partitions[] = {
  322. {
  323. .name = "linux kernel(nand)",
  324. .size = 0x400000,
  325. .offset = 0,
  326. }, {
  327. .name = "file system(nand)",
  328. .size = MTDPART_SIZ_FULL,
  329. .offset = MTDPART_OFS_APPEND,
  330. },
  331. };
  332. #endif
  333. #define BFIN_NAND_PLAT_CLE 2
  334. #define BFIN_NAND_PLAT_ALE 1
  335. static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
  336. {
  337. struct nand_chip *this = mtd->priv;
  338. if (cmd == NAND_CMD_NONE)
  339. return;
  340. if (ctrl & NAND_CLE)
  341. writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
  342. else
  343. writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
  344. }
  345. #define BFIN_NAND_PLAT_READY GPIO_PF3
  346. static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
  347. {
  348. return gpio_get_value(BFIN_NAND_PLAT_READY);
  349. }
  350. static struct platform_nand_data bfin_plat_nand_data = {
  351. .chip = {
  352. .chip_delay = 30,
  353. #ifdef CONFIG_MTD_PARTITIONS
  354. .part_probe_types = part_probes,
  355. .partitions = bfin_plat_nand_partitions,
  356. .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
  357. #endif
  358. },
  359. .ctrl = {
  360. .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
  361. .dev_ready = bfin_plat_nand_dev_ready,
  362. },
  363. };
  364. #define MAX(x, y) (x > y ? x : y)
  365. static struct resource bfin_plat_nand_resources = {
  366. .start = 0x20212000,
  367. .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
  368. .flags = IORESOURCE_IO,
  369. };
  370. static struct platform_device bfin_async_nand_device = {
  371. .name = "gen_nand",
  372. .id = -1,
  373. .num_resources = 1,
  374. .resource = &bfin_plat_nand_resources,
  375. .dev = {
  376. .platform_data = &bfin_plat_nand_data,
  377. },
  378. };
  379. static void bfin_plat_nand_init(void)
  380. {
  381. gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
  382. }
  383. #else
  384. static void bfin_plat_nand_init(void) {}
  385. #endif
  386. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  387. static struct mtd_partition stamp_partitions[] = {
  388. {
  389. .name = "bootloader(nor)",
  390. .size = 0x40000,
  391. .offset = 0,
  392. }, {
  393. .name = "linux kernel(nor)",
  394. .size = 0xE0000,
  395. .offset = MTDPART_OFS_APPEND,
  396. }, {
  397. .name = "file system(nor)",
  398. .size = 0x400000 - 0x40000 - 0xE0000 - 0x10000,
  399. .offset = MTDPART_OFS_APPEND,
  400. }, {
  401. .name = "MAC Address(nor)",
  402. .size = MTDPART_SIZ_FULL,
  403. .offset = 0x3F0000,
  404. .mask_flags = MTD_WRITEABLE,
  405. }
  406. };
  407. static struct physmap_flash_data stamp_flash_data = {
  408. .width = 2,
  409. .parts = stamp_partitions,
  410. .nr_parts = ARRAY_SIZE(stamp_partitions),
  411. };
  412. static struct resource stamp_flash_resource = {
  413. .start = 0x20000000,
  414. .end = 0x203fffff,
  415. .flags = IORESOURCE_MEM,
  416. };
  417. static struct platform_device stamp_flash_device = {
  418. .name = "physmap-flash",
  419. .id = 0,
  420. .dev = {
  421. .platform_data = &stamp_flash_data,
  422. },
  423. .num_resources = 1,
  424. .resource = &stamp_flash_resource,
  425. };
  426. #endif
  427. #if defined(CONFIG_MTD_M25P80) \
  428. || defined(CONFIG_MTD_M25P80_MODULE)
  429. static struct mtd_partition bfin_spi_flash_partitions[] = {
  430. {
  431. .name = "bootloader(spi)",
  432. .size = 0x00040000,
  433. .offset = 0,
  434. .mask_flags = MTD_CAP_ROM
  435. }, {
  436. .name = "linux kernel(spi)",
  437. .size = 0xe0000,
  438. .offset = MTDPART_OFS_APPEND,
  439. }, {
  440. .name = "file system(spi)",
  441. .size = MTDPART_SIZ_FULL,
  442. .offset = MTDPART_OFS_APPEND,
  443. }
  444. };
  445. static struct flash_platform_data bfin_spi_flash_data = {
  446. .name = "m25p80",
  447. .parts = bfin_spi_flash_partitions,
  448. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  449. /* .type = "m25p64", */
  450. };
  451. /* SPI flash chip (m25p64) */
  452. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  453. .enable_dma = 0, /* use dma transfer with this chip*/
  454. .bits_per_word = 8,
  455. };
  456. #endif
  457. #if defined(CONFIG_SPI_ADC_BF533) \
  458. || defined(CONFIG_SPI_ADC_BF533_MODULE)
  459. /* SPI ADC chip */
  460. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  461. .enable_dma = 1, /* use dma transfer with this chip*/
  462. .bits_per_word = 16,
  463. };
  464. #endif
  465. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  466. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  467. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  468. .enable_dma = 0,
  469. .bits_per_word = 16,
  470. };
  471. #endif
  472. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  473. static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
  474. .enable_dma = 0,
  475. .bits_per_word = 16,
  476. };
  477. #endif
  478. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  479. static struct bfin5xx_spi_chip spi_mmc_chip_info = {
  480. .enable_dma = 0,
  481. .bits_per_word = 8,
  482. };
  483. #endif
  484. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  485. #define MMC_SPI_CARD_DETECT_INT IRQ_PF5
  486. static int bfin_mmc_spi_init(struct device *dev,
  487. irqreturn_t (*detect_int)(int, void *), void *data)
  488. {
  489. return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
  490. IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
  491. }
  492. static void bfin_mmc_spi_exit(struct device *dev, void *data)
  493. {
  494. free_irq(MMC_SPI_CARD_DETECT_INT, data);
  495. }
  496. static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
  497. .init = bfin_mmc_spi_init,
  498. .exit = bfin_mmc_spi_exit,
  499. .detect_delay = 100, /* msecs */
  500. };
  501. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  502. .enable_dma = 0,
  503. .bits_per_word = 8,
  504. };
  505. #endif
  506. #if defined(CONFIG_PBX)
  507. static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
  508. .ctl_reg = 0x4, /* send zero */
  509. .enable_dma = 0,
  510. .bits_per_word = 8,
  511. .cs_change_per_word = 1,
  512. };
  513. #endif
  514. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  515. #include <linux/spi/ad7877.h>
  516. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  517. .enable_dma = 0,
  518. .bits_per_word = 16,
  519. };
  520. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  521. .model = 7877,
  522. .vref_delay_usecs = 50, /* internal, no capacitor */
  523. .x_plate_ohms = 419,
  524. .y_plate_ohms = 486,
  525. .pressure_max = 1000,
  526. .pressure_min = 0,
  527. .stopacq_polarity = 1,
  528. .first_conversion_delay = 3,
  529. .acquisition_time = 1,
  530. .averaging = 1,
  531. .pen_down_acc_interval = 1,
  532. };
  533. #endif
  534. #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
  535. #include <linux/spi/ad7879.h>
  536. static const struct ad7879_platform_data bfin_ad7879_ts_info = {
  537. .model = 7879, /* Model = AD7879 */
  538. .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
  539. .pressure_max = 10000,
  540. .pressure_min = 0,
  541. .first_conversion_delay = 3, /* wait 512us before do a first conversion */
  542. .acquisition_time = 1, /* 4us acquisition time per sample */
  543. .median = 2, /* do 8 measurements */
  544. .averaging = 1, /* take the average of 4 middle samples */
  545. .pen_down_acc_interval = 255, /* 9.4 ms */
  546. .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */
  547. .gpio_default = 1, /* During initialization set GPIO = HIGH */
  548. };
  549. #endif
  550. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  551. static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
  552. .enable_dma = 0,
  553. .bits_per_word = 16,
  554. };
  555. #endif
  556. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  557. static struct bfin5xx_spi_chip spidev_chip_info = {
  558. .enable_dma = 0,
  559. .bits_per_word = 8,
  560. };
  561. #endif
  562. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  563. static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
  564. .enable_dma = 0,
  565. .bits_per_word = 8,
  566. };
  567. #endif
  568. #if defined(CONFIG_MTD_DATAFLASH) \
  569. || defined(CONFIG_MTD_DATAFLASH_MODULE)
  570. static struct mtd_partition bfin_spi_dataflash_partitions[] = {
  571. {
  572. .name = "bootloader(spi)",
  573. .size = 0x00040000,
  574. .offset = 0,
  575. .mask_flags = MTD_CAP_ROM
  576. }, {
  577. .name = "linux kernel(spi)",
  578. .size = 0xe0000,
  579. .offset = MTDPART_OFS_APPEND,
  580. }, {
  581. .name = "file system(spi)",
  582. .size = MTDPART_SIZ_FULL,
  583. .offset = MTDPART_OFS_APPEND,
  584. }
  585. };
  586. static struct flash_platform_data bfin_spi_dataflash_data = {
  587. .name = "SPI Dataflash",
  588. .parts = bfin_spi_dataflash_partitions,
  589. .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
  590. };
  591. /* DataFlash chip */
  592. static struct bfin5xx_spi_chip data_flash_chip_info = {
  593. .enable_dma = 0, /* use dma transfer with this chip*/
  594. .bits_per_word = 8,
  595. };
  596. #endif
  597. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  598. #if defined(CONFIG_MTD_M25P80) \
  599. || defined(CONFIG_MTD_M25P80_MODULE)
  600. {
  601. /* the modalias must be the same as spi device driver name */
  602. .modalias = "m25p80", /* Name of spi_driver for this device */
  603. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  604. .bus_num = 0, /* Framework bus number */
  605. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  606. .platform_data = &bfin_spi_flash_data,
  607. .controller_data = &spi_flash_chip_info,
  608. .mode = SPI_MODE_3,
  609. },
  610. #endif
  611. #if defined(CONFIG_MTD_DATAFLASH) \
  612. || defined(CONFIG_MTD_DATAFLASH_MODULE)
  613. { /* DataFlash chip */
  614. .modalias = "mtd_dataflash",
  615. .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
  616. .bus_num = 0, /* Framework bus number */
  617. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  618. .platform_data = &bfin_spi_dataflash_data,
  619. .controller_data = &data_flash_chip_info,
  620. .mode = SPI_MODE_3,
  621. },
  622. #endif
  623. #if defined(CONFIG_SPI_ADC_BF533) \
  624. || defined(CONFIG_SPI_ADC_BF533_MODULE)
  625. {
  626. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  627. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  628. .bus_num = 0, /* Framework bus number */
  629. .chip_select = 1, /* Framework chip select. */
  630. .platform_data = NULL, /* No spi_driver specific config */
  631. .controller_data = &spi_adc_chip_info,
  632. },
  633. #endif
  634. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  635. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  636. {
  637. .modalias = "ad1836-spi",
  638. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  639. .bus_num = 0,
  640. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  641. .controller_data = &ad1836_spi_chip_info,
  642. },
  643. #endif
  644. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  645. {
  646. .modalias = "ad9960-spi",
  647. .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
  648. .bus_num = 0,
  649. .chip_select = 1,
  650. .controller_data = &ad9960_spi_chip_info,
  651. },
  652. #endif
  653. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  654. {
  655. .modalias = "spi_mmc_dummy",
  656. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  657. .bus_num = 0,
  658. .chip_select = 0,
  659. .platform_data = NULL,
  660. .controller_data = &spi_mmc_chip_info,
  661. .mode = SPI_MODE_3,
  662. },
  663. {
  664. .modalias = "spi_mmc",
  665. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  666. .bus_num = 0,
  667. .chip_select = CONFIG_SPI_MMC_CS_CHAN,
  668. .platform_data = NULL,
  669. .controller_data = &spi_mmc_chip_info,
  670. .mode = SPI_MODE_3,
  671. },
  672. #endif
  673. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  674. {
  675. .modalias = "mmc_spi",
  676. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  677. .bus_num = 0,
  678. .chip_select = 4,
  679. .platform_data = &bfin_mmc_spi_pdata,
  680. .controller_data = &mmc_spi_chip_info,
  681. .mode = SPI_MODE_3,
  682. },
  683. #endif
  684. #if defined(CONFIG_PBX)
  685. {
  686. .modalias = "fxs-spi",
  687. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  688. .bus_num = 0,
  689. .chip_select = 8 - CONFIG_J11_JUMPER,
  690. .controller_data = &spi_si3xxx_chip_info,
  691. .mode = SPI_MODE_3,
  692. },
  693. {
  694. .modalias = "fxo-spi",
  695. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  696. .bus_num = 0,
  697. .chip_select = 8 - CONFIG_J19_JUMPER,
  698. .controller_data = &spi_si3xxx_chip_info,
  699. .mode = SPI_MODE_3,
  700. },
  701. #endif
  702. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  703. {
  704. .modalias = "ad7877",
  705. .platform_data = &bfin_ad7877_ts_info,
  706. .irq = IRQ_PF6,
  707. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  708. .bus_num = 0,
  709. .chip_select = 1,
  710. .controller_data = &spi_ad7877_chip_info,
  711. },
  712. #endif
  713. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  714. {
  715. .modalias = "ad7879",
  716. .platform_data = &bfin_ad7879_ts_info,
  717. .irq = IRQ_PF7,
  718. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  719. .bus_num = 0,
  720. .chip_select = 1,
  721. .controller_data = &spi_ad7879_chip_info,
  722. .mode = SPI_CPHA | SPI_CPOL,
  723. },
  724. #endif
  725. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  726. {
  727. .modalias = "spidev",
  728. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  729. .bus_num = 0,
  730. .chip_select = 1,
  731. .controller_data = &spidev_chip_info,
  732. },
  733. #endif
  734. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  735. {
  736. .modalias = "bfin-lq035q1-spi",
  737. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  738. .bus_num = 0,
  739. .chip_select = 2,
  740. .controller_data = &lq035q1_spi_chip_info,
  741. .mode = SPI_CPHA | SPI_CPOL,
  742. },
  743. #endif
  744. };
  745. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  746. /* SPI controller data */
  747. static struct bfin5xx_spi_master bfin_spi0_info = {
  748. .num_chipselect = 8,
  749. .enable_dma = 1, /* master has the ability to do dma transfer */
  750. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  751. };
  752. /* SPI (0) */
  753. static struct resource bfin_spi0_resource[] = {
  754. [0] = {
  755. .start = SPI0_REGBASE,
  756. .end = SPI0_REGBASE + 0xFF,
  757. .flags = IORESOURCE_MEM,
  758. },
  759. [1] = {
  760. .start = CH_SPI,
  761. .end = CH_SPI,
  762. .flags = IORESOURCE_IRQ,
  763. },
  764. };
  765. static struct platform_device bfin_spi0_device = {
  766. .name = "bfin-spi",
  767. .id = 0, /* Bus number */
  768. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  769. .resource = bfin_spi0_resource,
  770. .dev = {
  771. .platform_data = &bfin_spi0_info, /* Passed to driver */
  772. },
  773. };
  774. #endif /* spi master and devices */
  775. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  776. static struct platform_device bfin_fb_device = {
  777. .name = "bf537-lq035",
  778. };
  779. #endif
  780. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  781. static struct platform_device bfin_fb_adv7393_device = {
  782. .name = "bfin-adv7393",
  783. };
  784. #endif
  785. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  786. #include <asm/bfin-lq035q1.h>
  787. static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
  788. .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
  789. .use_bl = 0, /* let something else control the LCD Blacklight */
  790. .gpio_bl = GPIO_PF7,
  791. };
  792. static struct resource bfin_lq035q1_resources[] = {
  793. {
  794. .start = IRQ_PPI_ERROR,
  795. .end = IRQ_PPI_ERROR,
  796. .flags = IORESOURCE_IRQ,
  797. },
  798. };
  799. static struct platform_device bfin_lq035q1_device = {
  800. .name = "bfin-lq035q1",
  801. .id = -1,
  802. .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
  803. .resource = bfin_lq035q1_resources,
  804. .dev = {
  805. .platform_data = &bfin_lq035q1_data,
  806. },
  807. };
  808. #endif
  809. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  810. static struct resource bfin_uart_resources[] = {
  811. #ifdef CONFIG_SERIAL_BFIN_UART0
  812. {
  813. .start = 0xFFC00400,
  814. .end = 0xFFC004FF,
  815. .flags = IORESOURCE_MEM,
  816. },
  817. #endif
  818. #ifdef CONFIG_SERIAL_BFIN_UART1
  819. {
  820. .start = 0xFFC02000,
  821. .end = 0xFFC020FF,
  822. .flags = IORESOURCE_MEM,
  823. },
  824. #endif
  825. };
  826. static struct platform_device bfin_uart_device = {
  827. .name = "bfin-uart",
  828. .id = 1,
  829. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  830. .resource = bfin_uart_resources,
  831. };
  832. #endif
  833. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  834. static struct resource bfin_sir_resources[] = {
  835. #ifdef CONFIG_BFIN_SIR0
  836. {
  837. .start = 0xFFC00400,
  838. .end = 0xFFC004FF,
  839. .flags = IORESOURCE_MEM,
  840. },
  841. #endif
  842. #ifdef CONFIG_BFIN_SIR1
  843. {
  844. .start = 0xFFC02000,
  845. .end = 0xFFC020FF,
  846. .flags = IORESOURCE_MEM,
  847. },
  848. #endif
  849. };
  850. static struct platform_device bfin_sir_device = {
  851. .name = "bfin_sir",
  852. .id = 0,
  853. .num_resources = ARRAY_SIZE(bfin_sir_resources),
  854. .resource = bfin_sir_resources,
  855. };
  856. #endif
  857. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  858. static struct resource bfin_twi0_resource[] = {
  859. [0] = {
  860. .start = TWI0_REGBASE,
  861. .end = TWI0_REGBASE,
  862. .flags = IORESOURCE_MEM,
  863. },
  864. [1] = {
  865. .start = IRQ_TWI,
  866. .end = IRQ_TWI,
  867. .flags = IORESOURCE_IRQ,
  868. },
  869. };
  870. static struct platform_device i2c_bfin_twi_device = {
  871. .name = "i2c-bfin-twi",
  872. .id = 0,
  873. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  874. .resource = bfin_twi0_resource,
  875. };
  876. #endif
  877. #ifdef CONFIG_I2C_BOARDINFO
  878. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  879. #if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
  880. {
  881. I2C_BOARD_INFO("ad7142_joystick", 0x2C),
  882. .irq = IRQ_PF5,
  883. },
  884. #endif
  885. #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
  886. {
  887. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  888. },
  889. #endif
  890. #if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
  891. {
  892. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  893. .irq = IRQ_PG6,
  894. },
  895. #endif
  896. #if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
  897. {
  898. I2C_BOARD_INFO("ad7879", 0x2F),
  899. .irq = IRQ_PG5,
  900. .platform_data = (void *)&bfin_ad7879_ts_info,
  901. },
  902. #endif
  903. };
  904. #endif
  905. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  906. static struct platform_device bfin_sport0_uart_device = {
  907. .name = "bfin-sport-uart",
  908. .id = 0,
  909. };
  910. static struct platform_device bfin_sport1_uart_device = {
  911. .name = "bfin-sport-uart",
  912. .id = 1,
  913. };
  914. #endif
  915. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  916. #define PATA_INT IRQ_PF5
  917. static struct pata_platform_info bfin_pata_platform_data = {
  918. .ioport_shift = 1,
  919. .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  920. };
  921. static struct resource bfin_pata_resources[] = {
  922. {
  923. .start = 0x20314020,
  924. .end = 0x2031403F,
  925. .flags = IORESOURCE_MEM,
  926. },
  927. {
  928. .start = 0x2031401C,
  929. .end = 0x2031401F,
  930. .flags = IORESOURCE_MEM,
  931. },
  932. {
  933. .start = PATA_INT,
  934. .end = PATA_INT,
  935. .flags = IORESOURCE_IRQ,
  936. },
  937. };
  938. static struct platform_device bfin_pata_device = {
  939. .name = "pata_platform",
  940. .id = -1,
  941. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  942. .resource = bfin_pata_resources,
  943. .dev = {
  944. .platform_data = &bfin_pata_platform_data,
  945. }
  946. };
  947. #endif
  948. static const unsigned int cclk_vlev_datasheet[] =
  949. {
  950. VRPAIR(VLEV_085, 250000000),
  951. VRPAIR(VLEV_090, 376000000),
  952. VRPAIR(VLEV_095, 426000000),
  953. VRPAIR(VLEV_100, 426000000),
  954. VRPAIR(VLEV_105, 476000000),
  955. VRPAIR(VLEV_110, 476000000),
  956. VRPAIR(VLEV_115, 476000000),
  957. VRPAIR(VLEV_120, 500000000),
  958. VRPAIR(VLEV_125, 533000000),
  959. VRPAIR(VLEV_130, 600000000),
  960. };
  961. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  962. .tuple_tab = cclk_vlev_datasheet,
  963. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  964. .vr_settling_time = 25 /* us */,
  965. };
  966. static struct platform_device bfin_dpmc = {
  967. .name = "bfin dpmc",
  968. .dev = {
  969. .platform_data = &bfin_dmpc_vreg_data,
  970. },
  971. };
  972. static struct platform_device *stamp_devices[] __initdata = {
  973. &bfin_dpmc,
  974. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  975. &bfin_pcmcia_cf_device,
  976. #endif
  977. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  978. &rtc_device,
  979. #endif
  980. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  981. &sl811_hcd_device,
  982. #endif
  983. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  984. &isp1362_hcd_device,
  985. #endif
  986. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  987. &bfin_isp1760_device,
  988. #endif
  989. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  990. &smc91x_device,
  991. #endif
  992. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  993. &dm9000_device,
  994. #endif
  995. #if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE)
  996. &ax88180_device,
  997. #endif
  998. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  999. &bfin_mac_device,
  1000. #endif
  1001. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  1002. &net2272_bfin_device,
  1003. #endif
  1004. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  1005. &bfin_spi0_device,
  1006. #endif
  1007. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  1008. &bfin_fb_device,
  1009. #endif
  1010. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  1011. &bfin_lq035q1_device,
  1012. #endif
  1013. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  1014. &bfin_fb_adv7393_device,
  1015. #endif
  1016. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  1017. &bfin_uart_device,
  1018. #endif
  1019. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  1020. &bfin_sir_device,
  1021. #endif
  1022. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  1023. &i2c_bfin_twi_device,
  1024. #endif
  1025. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  1026. &bfin_sport0_uart_device,
  1027. &bfin_sport1_uart_device,
  1028. #endif
  1029. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  1030. &bfin_pata_device,
  1031. #endif
  1032. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  1033. &bfin_device_gpiokeys,
  1034. #endif
  1035. &bfin_gpios_device,
  1036. #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
  1037. &bfin_async_nand_device,
  1038. #endif
  1039. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  1040. &stamp_flash_device,
  1041. #endif
  1042. };
  1043. static int __init stamp_init(void)
  1044. {
  1045. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  1046. #ifdef CONFIG_I2C_BOARDINFO
  1047. i2c_register_board_info(0, bfin_i2c_board_info,
  1048. ARRAY_SIZE(bfin_i2c_board_info));
  1049. #endif
  1050. bfin_plat_nand_init();
  1051. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  1052. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  1053. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  1054. irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
  1055. #endif
  1056. return 0;
  1057. }
  1058. arch_initcall(stamp_init);
  1059. void native_machine_restart(char *cmd)
  1060. {
  1061. /* workaround reboot hang when booting from SPI */
  1062. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  1063. bfin_gpio_reset_spi0_ssel1();
  1064. }
  1065. /*
  1066. * Currently the MAC address is saved in Flash by U-Boot
  1067. */
  1068. #define FLASH_MAC 0x203f0000
  1069. void bfin_get_ether_addr(char *addr)
  1070. {
  1071. *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
  1072. *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
  1073. }
  1074. EXPORT_SYMBOL(bfin_get_ether_addr);