nv50_sor.c 12 KB

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  1. /*
  2. * Copyright (C) 2008 Maarten Maathuis.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the
  14. * next paragraph) shall be included in all copies or substantial
  15. * portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20. * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21. * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22. * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23. * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24. *
  25. */
  26. #include <drm/drmP.h>
  27. #include <drm/drm_crtc_helper.h>
  28. #define NOUVEAU_DMA_DEBUG (nouveau_reg_debug & NOUVEAU_REG_DEBUG_EVO)
  29. #include "nouveau_reg.h"
  30. #include "nouveau_drm.h"
  31. #include "nouveau_dma.h"
  32. #include "nouveau_encoder.h"
  33. #include "nouveau_connector.h"
  34. #include "nouveau_crtc.h"
  35. #include "nv50_display.h"
  36. #include <core/class.h>
  37. #include <subdev/timer.h>
  38. static void
  39. nv50_sor_dp_train_set(struct drm_device *dev, struct dcb_output *dcb, u8 pattern)
  40. {
  41. struct nv50_display *disp = nv50_display(dev);
  42. const u32 or = ffs(dcb->or) - 1, link = !(dcb->sorconf.link & 1);
  43. const u32 moff = (link << 2) | or;
  44. nv_call(disp->core, NV94_DISP_SOR_DP_TRAIN + moff, pattern);
  45. }
  46. static void
  47. nv50_sor_dp_train_adj(struct drm_device *dev, struct dcb_output *dcb,
  48. u8 lane, u8 swing, u8 preem)
  49. {
  50. struct nv50_display *disp = nv50_display(dev);
  51. const u32 or = ffs(dcb->or) - 1, link = !(dcb->sorconf.link & 1);
  52. const u32 moff = (link << 2) | or;
  53. const u32 data = (swing << 8) | preem;
  54. nv_call(disp->core, NV94_DISP_SOR_DP_DRVCTL(lane) + moff, data);
  55. }
  56. static void
  57. nv50_sor_dp_link_set(struct drm_device *dev, struct dcb_output *dcb, int crtc,
  58. int link_nr, u32 link_bw, bool enhframe)
  59. {
  60. struct nv50_display *disp = nv50_display(dev);
  61. const u32 or = ffs(dcb->or) - 1, link = !(dcb->sorconf.link & 1);
  62. const u32 moff = (crtc << 3) | (link << 2) | or;
  63. u32 data = ((link_bw / 27000) << 8) | link_nr;
  64. if (enhframe)
  65. data |= NV94_DISP_SOR_DP_LNKCTL_FRAME_ENH;
  66. nv_call(disp->core, NV94_DISP_SOR_DP_LNKCTL + moff, data);
  67. }
  68. static void
  69. nv50_sor_dp_link_get(struct drm_device *dev, u32 or, u32 link, u32 *nr, u32 *bw)
  70. {
  71. struct nouveau_device *device = nouveau_dev(dev);
  72. u32 dpctrl = nv_rd32(device, NV50_SOR_DP_CTRL(or, link)) & 0x000f0000;
  73. u32 clksor = nv_rd32(device, 0x614300 + (or * 0x800));
  74. if (clksor & 0x000c0000)
  75. *bw = 270000;
  76. else
  77. *bw = 162000;
  78. if (dpctrl > 0x00030000) *nr = 4;
  79. else if (dpctrl > 0x00010000) *nr = 2;
  80. else *nr = 1;
  81. }
  82. void
  83. nv50_sor_dp_calc_tu(struct drm_device *dev, int or, int link, u32 clk, u32 bpp)
  84. {
  85. struct nouveau_device *device = nouveau_dev(dev);
  86. struct nouveau_drm *drm = nouveau_drm(dev);
  87. const u32 symbol = 100000;
  88. int bestTU = 0, bestVTUi = 0, bestVTUf = 0, bestVTUa = 0;
  89. int TU, VTUi, VTUf, VTUa;
  90. u64 link_data_rate, link_ratio, unk;
  91. u32 best_diff = 64 * symbol;
  92. u32 link_nr, link_bw, r;
  93. /* calculate packed data rate for each lane */
  94. nv50_sor_dp_link_get(dev, or, link, &link_nr, &link_bw);
  95. link_data_rate = (clk * bpp / 8) / link_nr;
  96. /* calculate ratio of packed data rate to link symbol rate */
  97. link_ratio = link_data_rate * symbol;
  98. r = do_div(link_ratio, link_bw);
  99. for (TU = 64; TU >= 32; TU--) {
  100. /* calculate average number of valid symbols in each TU */
  101. u32 tu_valid = link_ratio * TU;
  102. u32 calc, diff;
  103. /* find a hw representation for the fraction.. */
  104. VTUi = tu_valid / symbol;
  105. calc = VTUi * symbol;
  106. diff = tu_valid - calc;
  107. if (diff) {
  108. if (diff >= (symbol / 2)) {
  109. VTUf = symbol / (symbol - diff);
  110. if (symbol - (VTUf * diff))
  111. VTUf++;
  112. if (VTUf <= 15) {
  113. VTUa = 1;
  114. calc += symbol - (symbol / VTUf);
  115. } else {
  116. VTUa = 0;
  117. VTUf = 1;
  118. calc += symbol;
  119. }
  120. } else {
  121. VTUa = 0;
  122. VTUf = min((int)(symbol / diff), 15);
  123. calc += symbol / VTUf;
  124. }
  125. diff = calc - tu_valid;
  126. } else {
  127. /* no remainder, but the hw doesn't like the fractional
  128. * part to be zero. decrement the integer part and
  129. * have the fraction add a whole symbol back
  130. */
  131. VTUa = 0;
  132. VTUf = 1;
  133. VTUi--;
  134. }
  135. if (diff < best_diff) {
  136. best_diff = diff;
  137. bestTU = TU;
  138. bestVTUa = VTUa;
  139. bestVTUf = VTUf;
  140. bestVTUi = VTUi;
  141. if (diff == 0)
  142. break;
  143. }
  144. }
  145. if (!bestTU) {
  146. NV_ERROR(drm, "DP: unable to find suitable config\n");
  147. return;
  148. }
  149. /* XXX close to vbios numbers, but not right */
  150. unk = (symbol - link_ratio) * bestTU;
  151. unk *= link_ratio;
  152. r = do_div(unk, symbol);
  153. r = do_div(unk, symbol);
  154. unk += 6;
  155. nv_mask(device, NV50_SOR_DP_CTRL(or, link), 0x000001fc, bestTU << 2);
  156. nv_mask(device, NV50_SOR_DP_SCFG(or, link), 0x010f7f3f, bestVTUa << 24 |
  157. bestVTUf << 16 |
  158. bestVTUi << 8 |
  159. unk);
  160. }
  161. static void
  162. nv50_sor_disconnect(struct drm_encoder *encoder)
  163. {
  164. struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  165. struct nouveau_drm *drm = nouveau_drm(encoder->dev);
  166. struct drm_device *dev = encoder->dev;
  167. struct nouveau_channel *evo = nv50_display(dev)->master;
  168. int ret;
  169. if (!nv_encoder->crtc)
  170. return;
  171. nv50_crtc_blank(nouveau_crtc(nv_encoder->crtc), true);
  172. NV_DEBUG(drm, "Disconnecting SOR %d\n", nv_encoder->or);
  173. ret = RING_SPACE(evo, 4);
  174. if (ret) {
  175. NV_ERROR(drm, "no space while disconnecting SOR\n");
  176. return;
  177. }
  178. BEGIN_NV04(evo, 0, NV50_EVO_SOR(nv_encoder->or, MODE_CTRL), 1);
  179. OUT_RING (evo, 0);
  180. BEGIN_NV04(evo, 0, NV50_EVO_UPDATE, 1);
  181. OUT_RING (evo, 0);
  182. nouveau_hdmi_mode_set(encoder, NULL);
  183. nv_encoder->crtc = NULL;
  184. nv_encoder->last_dpms = DRM_MODE_DPMS_OFF;
  185. }
  186. static void
  187. nv50_sor_dpms(struct drm_encoder *encoder, int mode)
  188. {
  189. struct nv50_display *priv = nv50_display(encoder->dev);
  190. struct nouveau_drm *drm = nouveau_drm(encoder->dev);
  191. struct drm_device *dev = encoder->dev;
  192. struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  193. struct drm_encoder *enc;
  194. int or = nv_encoder->or;
  195. NV_DEBUG(drm, "or %d type %d mode %d\n", or, nv_encoder->dcb->type, mode);
  196. nv_encoder->last_dpms = mode;
  197. list_for_each_entry(enc, &dev->mode_config.encoder_list, head) {
  198. struct nouveau_encoder *nvenc = nouveau_encoder(enc);
  199. if (nvenc == nv_encoder ||
  200. (nvenc->dcb->type != DCB_OUTPUT_TMDS &&
  201. nvenc->dcb->type != DCB_OUTPUT_LVDS &&
  202. nvenc->dcb->type != DCB_OUTPUT_DP) ||
  203. nvenc->dcb->or != nv_encoder->dcb->or)
  204. continue;
  205. if (nvenc->last_dpms == DRM_MODE_DPMS_ON)
  206. return;
  207. }
  208. nv_call(priv->core, NV50_DISP_SOR_PWR + or, (mode == DRM_MODE_DPMS_ON));
  209. if (nv_encoder->dcb->type == DCB_OUTPUT_DP) {
  210. struct dp_train_func func = {
  211. .link_set = nv50_sor_dp_link_set,
  212. .train_set = nv50_sor_dp_train_set,
  213. .train_adj = nv50_sor_dp_train_adj
  214. };
  215. nouveau_dp_dpms(encoder, mode, nv_encoder->dp.datarate, &func);
  216. }
  217. }
  218. static void
  219. nv50_sor_save(struct drm_encoder *encoder)
  220. {
  221. struct nouveau_drm *drm = nouveau_drm(encoder->dev);
  222. NV_ERROR(drm, "!!\n");
  223. }
  224. static void
  225. nv50_sor_restore(struct drm_encoder *encoder)
  226. {
  227. struct nouveau_drm *drm = nouveau_drm(encoder->dev);
  228. NV_ERROR(drm, "!!\n");
  229. }
  230. static bool
  231. nv50_sor_mode_fixup(struct drm_encoder *encoder,
  232. const struct drm_display_mode *mode,
  233. struct drm_display_mode *adjusted_mode)
  234. {
  235. struct nouveau_drm *drm = nouveau_drm(encoder->dev);
  236. struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  237. struct nouveau_connector *connector;
  238. NV_DEBUG(drm, "or %d\n", nv_encoder->or);
  239. connector = nouveau_encoder_connector_get(nv_encoder);
  240. if (!connector) {
  241. NV_ERROR(drm, "Encoder has no connector\n");
  242. return false;
  243. }
  244. if (connector->scaling_mode != DRM_MODE_SCALE_NONE &&
  245. connector->native_mode)
  246. drm_mode_copy(adjusted_mode, connector->native_mode);
  247. return true;
  248. }
  249. static void
  250. nv50_sor_prepare(struct drm_encoder *encoder)
  251. {
  252. struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  253. nv50_sor_disconnect(encoder);
  254. if (nv_encoder->dcb->type == DCB_OUTPUT_DP) {
  255. /* avoid race between link training and supervisor intr */
  256. nv50_display_sync(encoder->dev);
  257. }
  258. }
  259. static void
  260. nv50_sor_commit(struct drm_encoder *encoder)
  261. {
  262. }
  263. static void
  264. nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *umode,
  265. struct drm_display_mode *mode)
  266. {
  267. struct nouveau_channel *evo = nv50_display(encoder->dev)->master;
  268. struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  269. struct nouveau_drm *drm = nouveau_drm(encoder->dev);
  270. struct nouveau_crtc *crtc = nouveau_crtc(encoder->crtc);
  271. struct nouveau_connector *nv_connector;
  272. uint32_t mode_ctl = 0;
  273. int ret;
  274. NV_DEBUG(drm, "or %d type %d -> crtc %d\n",
  275. nv_encoder->or, nv_encoder->dcb->type, crtc->index);
  276. nv_encoder->crtc = encoder->crtc;
  277. switch (nv_encoder->dcb->type) {
  278. case DCB_OUTPUT_TMDS:
  279. if (nv_encoder->dcb->sorconf.link & 1) {
  280. if (mode->clock < 165000)
  281. mode_ctl = 0x0100;
  282. else
  283. mode_ctl = 0x0500;
  284. } else
  285. mode_ctl = 0x0200;
  286. nouveau_hdmi_mode_set(encoder, mode);
  287. break;
  288. case DCB_OUTPUT_DP:
  289. nv_connector = nouveau_encoder_connector_get(nv_encoder);
  290. if (nv_connector && nv_connector->base.display_info.bpc == 6) {
  291. nv_encoder->dp.datarate = mode->clock * 18 / 8;
  292. mode_ctl |= 0x00020000;
  293. } else {
  294. nv_encoder->dp.datarate = mode->clock * 24 / 8;
  295. mode_ctl |= 0x00050000;
  296. }
  297. if (nv_encoder->dcb->sorconf.link & 1)
  298. mode_ctl |= 0x00000800;
  299. else
  300. mode_ctl |= 0x00000900;
  301. break;
  302. default:
  303. break;
  304. }
  305. if (crtc->index == 1)
  306. mode_ctl |= NV50_EVO_SOR_MODE_CTRL_CRTC1;
  307. else
  308. mode_ctl |= NV50_EVO_SOR_MODE_CTRL_CRTC0;
  309. if (mode->flags & DRM_MODE_FLAG_NHSYNC)
  310. mode_ctl |= NV50_EVO_SOR_MODE_CTRL_NHSYNC;
  311. if (mode->flags & DRM_MODE_FLAG_NVSYNC)
  312. mode_ctl |= NV50_EVO_SOR_MODE_CTRL_NVSYNC;
  313. nv50_sor_dpms(encoder, DRM_MODE_DPMS_ON);
  314. ret = RING_SPACE(evo, 2);
  315. if (ret) {
  316. NV_ERROR(drm, "no space while connecting SOR\n");
  317. nv_encoder->crtc = NULL;
  318. return;
  319. }
  320. BEGIN_NV04(evo, 0, NV50_EVO_SOR(nv_encoder->or, MODE_CTRL), 1);
  321. OUT_RING(evo, mode_ctl);
  322. }
  323. static struct drm_crtc *
  324. nv50_sor_crtc_get(struct drm_encoder *encoder)
  325. {
  326. return nouveau_encoder(encoder)->crtc;
  327. }
  328. static const struct drm_encoder_helper_funcs nv50_sor_helper_funcs = {
  329. .dpms = nv50_sor_dpms,
  330. .save = nv50_sor_save,
  331. .restore = nv50_sor_restore,
  332. .mode_fixup = nv50_sor_mode_fixup,
  333. .prepare = nv50_sor_prepare,
  334. .commit = nv50_sor_commit,
  335. .mode_set = nv50_sor_mode_set,
  336. .get_crtc = nv50_sor_crtc_get,
  337. .detect = NULL,
  338. .disable = nv50_sor_disconnect
  339. };
  340. static void
  341. nv50_sor_destroy(struct drm_encoder *encoder)
  342. {
  343. struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  344. drm_encoder_cleanup(encoder);
  345. kfree(nv_encoder);
  346. }
  347. static const struct drm_encoder_funcs nv50_sor_encoder_funcs = {
  348. .destroy = nv50_sor_destroy,
  349. };
  350. int
  351. nv50_sor_create(struct drm_connector *connector, struct dcb_output *entry)
  352. {
  353. struct nouveau_encoder *nv_encoder = NULL;
  354. struct drm_device *dev = connector->dev;
  355. struct drm_encoder *encoder;
  356. int type;
  357. switch (entry->type) {
  358. case DCB_OUTPUT_TMDS:
  359. case DCB_OUTPUT_DP:
  360. type = DRM_MODE_ENCODER_TMDS;
  361. break;
  362. case DCB_OUTPUT_LVDS:
  363. type = DRM_MODE_ENCODER_LVDS;
  364. break;
  365. default:
  366. return -EINVAL;
  367. }
  368. nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
  369. if (!nv_encoder)
  370. return -ENOMEM;
  371. encoder = to_drm_encoder(nv_encoder);
  372. nv_encoder->dcb = entry;
  373. nv_encoder->or = ffs(entry->or) - 1;
  374. nv_encoder->last_dpms = DRM_MODE_DPMS_OFF;
  375. drm_encoder_init(dev, encoder, &nv50_sor_encoder_funcs, type);
  376. drm_encoder_helper_add(encoder, &nv50_sor_helper_funcs);
  377. encoder->possible_crtcs = entry->heads;
  378. encoder->possible_clones = 0;
  379. drm_mode_connector_attach_encoder(connector, encoder);
  380. return 0;
  381. }