mptsas.c 37 KB

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  1. /*
  2. * linux/drivers/message/fusion/mptsas.c
  3. * For use with LSI Logic PCI chip/adapter(s)
  4. * running LSI Logic Fusion MPT (Message Passing Technology) firmware.
  5. *
  6. * Copyright (c) 1999-2005 LSI Logic Corporation
  7. * (mailto:mpt_linux_developer@lsil.com)
  8. * Copyright (c) 2005 Dell
  9. */
  10. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  11. /*
  12. This program is free software; you can redistribute it and/or modify
  13. it under the terms of the GNU General Public License as published by
  14. the Free Software Foundation; version 2 of the License.
  15. This program is distributed in the hope that it will be useful,
  16. but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. GNU General Public License for more details.
  19. NO WARRANTY
  20. THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. solely responsible for determining the appropriateness of using and
  25. distributing the Program and assumes all risks associated with its
  26. exercise of rights under this Agreement, including but not limited to
  27. the risks and costs of program errors, damage to or loss of data,
  28. programs or equipment, and unavailability or interruption of operations.
  29. DISCLAIMER OF LIABILITY
  30. NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. You should have received a copy of the GNU General Public License
  38. along with this program; if not, write to the Free Software
  39. Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  40. */
  41. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  42. #include <linux/module.h>
  43. #include <linux/kernel.h>
  44. #include <linux/init.h>
  45. #include <linux/errno.h>
  46. #include <linux/sched.h>
  47. #include <linux/workqueue.h>
  48. #include <scsi/scsi_cmnd.h>
  49. #include <scsi/scsi_device.h>
  50. #include <scsi/scsi_host.h>
  51. #include <scsi/scsi_transport_sas.h>
  52. #include "mptbase.h"
  53. #include "mptscsih.h"
  54. #define my_NAME "Fusion MPT SAS Host driver"
  55. #define my_VERSION MPT_LINUX_VERSION_COMMON
  56. #define MYNAM "mptsas"
  57. MODULE_AUTHOR(MODULEAUTHOR);
  58. MODULE_DESCRIPTION(my_NAME);
  59. MODULE_LICENSE("GPL");
  60. static int mpt_pq_filter;
  61. module_param(mpt_pq_filter, int, 0);
  62. MODULE_PARM_DESC(mpt_pq_filter,
  63. "Enable peripheral qualifier filter: enable=1 "
  64. "(default=0)");
  65. static int mpt_pt_clear;
  66. module_param(mpt_pt_clear, int, 0);
  67. MODULE_PARM_DESC(mpt_pt_clear,
  68. "Clear persistency table: enable=1 "
  69. "(default=MPTSCSIH_PT_CLEAR=0)");
  70. static int mptsasDoneCtx = -1;
  71. static int mptsasTaskCtx = -1;
  72. static int mptsasInternalCtx = -1; /* Used only for internal commands */
  73. static int mptsasMgmtCtx = -1;
  74. /*
  75. * SAS topology structures
  76. *
  77. * The MPT Fusion firmware interface spreads information about the
  78. * SAS topology over many manufacture pages, thus we need some data
  79. * structure to collect it and process it for the SAS transport class.
  80. */
  81. struct mptsas_devinfo {
  82. u16 handle; /* unique id to address this device */
  83. u8 phy_id; /* phy number of parent device */
  84. u8 port_id; /* sas physical port this device
  85. is assoc'd with */
  86. u8 target; /* logical target id of this device */
  87. u8 bus; /* logical bus number of this device */
  88. u64 sas_address; /* WWN of this device,
  89. SATA is assigned by HBA,expander */
  90. u32 device_info; /* bitfield detailed info about this device */
  91. };
  92. struct mptsas_phyinfo {
  93. u8 phy_id; /* phy index */
  94. u8 port_id; /* port number this phy is part of */
  95. u8 negotiated_link_rate; /* nego'd link rate for this phy */
  96. u8 hw_link_rate; /* hardware max/min phys link rate */
  97. u8 programmed_link_rate; /* programmed max/min phy link rate */
  98. struct mptsas_devinfo identify; /* point to phy device info */
  99. struct mptsas_devinfo attached; /* point to attached device info */
  100. struct sas_rphy *rphy;
  101. };
  102. struct mptsas_portinfo {
  103. struct list_head list;
  104. u16 handle; /* unique id to address this */
  105. u8 num_phys; /* number of phys */
  106. struct mptsas_phyinfo *phy_info;
  107. };
  108. #ifdef SASDEBUG
  109. static void mptsas_print_phy_data(MPI_SAS_IO_UNIT0_PHY_DATA *phy_data)
  110. {
  111. printk("---- IO UNIT PAGE 0 ------------\n");
  112. printk("Handle=0x%X\n",
  113. le16_to_cpu(phy_data->AttachedDeviceHandle));
  114. printk("Controller Handle=0x%X\n",
  115. le16_to_cpu(phy_data->ControllerDevHandle));
  116. printk("Port=0x%X\n", phy_data->Port);
  117. printk("Port Flags=0x%X\n", phy_data->PortFlags);
  118. printk("PHY Flags=0x%X\n", phy_data->PhyFlags);
  119. printk("Negotiated Link Rate=0x%X\n", phy_data->NegotiatedLinkRate);
  120. printk("Controller PHY Device Info=0x%X\n",
  121. le32_to_cpu(phy_data->ControllerPhyDeviceInfo));
  122. printk("DiscoveryStatus=0x%X\n",
  123. le32_to_cpu(phy_data->DiscoveryStatus));
  124. printk("\n");
  125. }
  126. static void mptsas_print_phy_pg0(SasPhyPage0_t *pg0)
  127. {
  128. __le64 sas_address;
  129. memcpy(&sas_address, &pg0->SASAddress, sizeof(__le64));
  130. printk("---- SAS PHY PAGE 0 ------------\n");
  131. printk("Attached Device Handle=0x%X\n",
  132. le16_to_cpu(pg0->AttachedDevHandle));
  133. printk("SAS Address=0x%llX\n",
  134. (unsigned long long)le64_to_cpu(sas_address));
  135. printk("Attached PHY Identifier=0x%X\n", pg0->AttachedPhyIdentifier);
  136. printk("Attached Device Info=0x%X\n",
  137. le32_to_cpu(pg0->AttachedDeviceInfo));
  138. printk("Programmed Link Rate=0x%X\n", pg0->ProgrammedLinkRate);
  139. printk("Change Count=0x%X\n", pg0->ChangeCount);
  140. printk("PHY Info=0x%X\n", le32_to_cpu(pg0->PhyInfo));
  141. printk("\n");
  142. }
  143. static void mptsas_print_phy_pg1(SasPhyPage1_t *pg1)
  144. {
  145. printk("---- SAS PHY PAGE 1 ------------\n");
  146. printk("Invalid Dword Count=0x%x\n", pg1->InvalidDwordCount);
  147. printk("Running Disparity Error Count=0x%x\n",
  148. pg1->RunningDisparityErrorCount);
  149. printk("Loss Dword Synch Count=0x%x\n", pg1->LossDwordSynchCount);
  150. printk("PHY Reset Problem Count=0x%x\n", pg1->PhyResetProblemCount);
  151. printk("\n");
  152. }
  153. static void mptsas_print_device_pg0(SasDevicePage0_t *pg0)
  154. {
  155. __le64 sas_address;
  156. memcpy(&sas_address, &pg0->SASAddress, sizeof(__le64));
  157. printk("---- SAS DEVICE PAGE 0 ---------\n");
  158. printk("Handle=0x%X\n" ,le16_to_cpu(pg0->DevHandle));
  159. printk("Enclosure Handle=0x%X\n", le16_to_cpu(pg0->EnclosureHandle));
  160. printk("Slot=0x%X\n", le16_to_cpu(pg0->Slot));
  161. printk("SAS Address=0x%llX\n", le64_to_cpu(sas_address));
  162. printk("Target ID=0x%X\n", pg0->TargetID);
  163. printk("Bus=0x%X\n", pg0->Bus);
  164. /* The PhyNum field specifies the PHY number of the parent
  165. * device this device is linked to
  166. */
  167. printk("Parent Phy Num=0x%X\n", pg0->PhyNum);
  168. printk("Access Status=0x%X\n", le16_to_cpu(pg0->AccessStatus));
  169. printk("Device Info=0x%X\n", le32_to_cpu(pg0->DeviceInfo));
  170. printk("Flags=0x%X\n", le16_to_cpu(pg0->Flags));
  171. printk("Physical Port=0x%X\n", pg0->PhysicalPort);
  172. printk("\n");
  173. }
  174. static void mptsas_print_expander_pg1(SasExpanderPage1_t *pg1)
  175. {
  176. printk("---- SAS EXPANDER PAGE 1 ------------\n");
  177. printk("Physical Port=0x%X\n", pg1->PhysicalPort);
  178. printk("PHY Identifier=0x%X\n", pg1->PhyIdentifier);
  179. printk("Negotiated Link Rate=0x%X\n", pg1->NegotiatedLinkRate);
  180. printk("Programmed Link Rate=0x%X\n", pg1->ProgrammedLinkRate);
  181. printk("Hardware Link Rate=0x%X\n", pg1->HwLinkRate);
  182. printk("Owner Device Handle=0x%X\n",
  183. le16_to_cpu(pg1->OwnerDevHandle));
  184. printk("Attached Device Handle=0x%X\n",
  185. le16_to_cpu(pg1->AttachedDevHandle));
  186. }
  187. #else
  188. #define mptsas_print_phy_data(phy_data) do { } while (0)
  189. #define mptsas_print_phy_pg0(pg0) do { } while (0)
  190. #define mptsas_print_phy_pg1(pg1) do { } while (0)
  191. #define mptsas_print_device_pg0(pg0) do { } while (0)
  192. #define mptsas_print_expander_pg1(pg1) do { } while (0)
  193. #endif
  194. /*
  195. * This is pretty ugly. We will be able to seriously clean it up
  196. * once the DV code in mptscsih goes away and we can properly
  197. * implement ->target_alloc.
  198. */
  199. static int
  200. mptsas_slave_alloc(struct scsi_device *device)
  201. {
  202. struct Scsi_Host *host = device->host;
  203. MPT_SCSI_HOST *hd = (MPT_SCSI_HOST *)host->hostdata;
  204. struct sas_rphy *rphy;
  205. struct mptsas_portinfo *p;
  206. VirtDevice *vdev;
  207. uint target = device->id;
  208. int i;
  209. if ((vdev = hd->Targets[target]) != NULL)
  210. goto out;
  211. vdev = kmalloc(sizeof(VirtDevice), GFP_KERNEL);
  212. if (!vdev) {
  213. printk(MYIOC_s_ERR_FMT "slave_alloc kmalloc(%zd) FAILED!\n",
  214. hd->ioc->name, sizeof(VirtDevice));
  215. return -ENOMEM;
  216. }
  217. memset(vdev, 0, sizeof(VirtDevice));
  218. vdev->tflags = MPT_TARGET_FLAGS_Q_YES|MPT_TARGET_FLAGS_VALID_INQUIRY;
  219. vdev->ioc_id = hd->ioc->id;
  220. rphy = dev_to_rphy(device->sdev_target->dev.parent);
  221. list_for_each_entry(p, &hd->ioc->sas_topology, list) {
  222. for (i = 0; i < p->num_phys; i++) {
  223. if (p->phy_info[i].attached.sas_address ==
  224. rphy->identify.sas_address) {
  225. vdev->target_id =
  226. p->phy_info[i].attached.target;
  227. vdev->bus_id = p->phy_info[i].attached.bus;
  228. hd->Targets[device->id] = vdev;
  229. goto out;
  230. }
  231. }
  232. }
  233. printk("No matching SAS device found!!\n");
  234. kfree(vdev);
  235. return -ENODEV;
  236. out:
  237. vdev->num_luns++;
  238. device->hostdata = vdev;
  239. return 0;
  240. }
  241. static struct scsi_host_template mptsas_driver_template = {
  242. .module = THIS_MODULE,
  243. .proc_name = "mptsas",
  244. .proc_info = mptscsih_proc_info,
  245. .name = "MPT SPI Host",
  246. .info = mptscsih_info,
  247. .queuecommand = mptscsih_qcmd,
  248. .slave_alloc = mptsas_slave_alloc,
  249. .slave_configure = mptscsih_slave_configure,
  250. .slave_destroy = mptscsih_slave_destroy,
  251. .change_queue_depth = mptscsih_change_queue_depth,
  252. .eh_abort_handler = mptscsih_abort,
  253. .eh_device_reset_handler = mptscsih_dev_reset,
  254. .eh_bus_reset_handler = mptscsih_bus_reset,
  255. .eh_host_reset_handler = mptscsih_host_reset,
  256. .bios_param = mptscsih_bios_param,
  257. .can_queue = MPT_FC_CAN_QUEUE,
  258. .this_id = -1,
  259. .sg_tablesize = MPT_SCSI_SG_DEPTH,
  260. .max_sectors = 8192,
  261. .cmd_per_lun = 7,
  262. .use_clustering = ENABLE_CLUSTERING,
  263. };
  264. static inline MPT_ADAPTER *phy_to_ioc(struct sas_phy *phy)
  265. {
  266. struct Scsi_Host *shost = dev_to_shost(phy->dev.parent);
  267. return ((MPT_SCSI_HOST *)shost->hostdata)->ioc;
  268. }
  269. static int mptsas_get_linkerrors(struct sas_phy *phy)
  270. {
  271. MPT_ADAPTER *ioc = phy_to_ioc(phy);
  272. ConfigExtendedPageHeader_t hdr;
  273. CONFIGPARMS cfg;
  274. SasPhyPage1_t *buffer;
  275. dma_addr_t dma_handle;
  276. int error;
  277. hdr.PageVersion = MPI_SASPHY1_PAGEVERSION;
  278. hdr.ExtPageLength = 0;
  279. hdr.PageNumber = 1 /* page number 1*/;
  280. hdr.Reserved1 = 0;
  281. hdr.Reserved2 = 0;
  282. hdr.PageType = MPI_CONFIG_PAGETYPE_EXTENDED;
  283. hdr.ExtPageType = MPI_CONFIG_EXTPAGETYPE_SAS_PHY;
  284. cfg.cfghdr.ehdr = &hdr;
  285. cfg.physAddr = -1;
  286. cfg.pageAddr = phy->identify.phy_identifier;
  287. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  288. cfg.dir = 0; /* read */
  289. cfg.timeout = 10;
  290. error = mpt_config(ioc, &cfg);
  291. if (error)
  292. return error;
  293. if (!hdr.ExtPageLength)
  294. return -ENXIO;
  295. buffer = pci_alloc_consistent(ioc->pcidev, hdr.ExtPageLength * 4,
  296. &dma_handle);
  297. if (!buffer)
  298. return -ENOMEM;
  299. cfg.physAddr = dma_handle;
  300. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  301. error = mpt_config(ioc, &cfg);
  302. if (error)
  303. goto out_free_consistent;
  304. mptsas_print_phy_pg1(buffer);
  305. phy->invalid_dword_count = le32_to_cpu(buffer->InvalidDwordCount);
  306. phy->running_disparity_error_count =
  307. le32_to_cpu(buffer->RunningDisparityErrorCount);
  308. phy->loss_of_dword_sync_count =
  309. le32_to_cpu(buffer->LossDwordSynchCount);
  310. phy->phy_reset_problem_count =
  311. le32_to_cpu(buffer->PhyResetProblemCount);
  312. out_free_consistent:
  313. pci_free_consistent(ioc->pcidev, hdr.ExtPageLength * 4,
  314. buffer, dma_handle);
  315. return error;
  316. }
  317. static int mptsas_mgmt_done(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req,
  318. MPT_FRAME_HDR *reply)
  319. {
  320. ioc->sas_mgmt.status |= MPT_SAS_MGMT_STATUS_COMMAND_GOOD;
  321. if (reply != NULL) {
  322. ioc->sas_mgmt.status |= MPT_SAS_MGMT_STATUS_RF_VALID;
  323. memcpy(ioc->sas_mgmt.reply, reply,
  324. min(ioc->reply_sz, 4 * reply->u.reply.MsgLength));
  325. }
  326. complete(&ioc->sas_mgmt.done);
  327. return 1;
  328. }
  329. static int mptsas_phy_reset(struct sas_phy *phy, int hard_reset)
  330. {
  331. MPT_ADAPTER *ioc = phy_to_ioc(phy);
  332. SasIoUnitControlRequest_t *req;
  333. SasIoUnitControlReply_t *reply;
  334. MPT_FRAME_HDR *mf;
  335. MPIHeader_t *hdr;
  336. unsigned long timeleft;
  337. int error = -ERESTARTSYS;
  338. /* not implemented for expanders */
  339. if (phy->identify.target_port_protocols & SAS_PROTOCOL_SMP)
  340. return -ENXIO;
  341. if (down_interruptible(&ioc->sas_mgmt.mutex))
  342. goto out;
  343. mf = mpt_get_msg_frame(mptsasMgmtCtx, ioc);
  344. if (!mf) {
  345. error = -ENOMEM;
  346. goto out_unlock;
  347. }
  348. hdr = (MPIHeader_t *) mf;
  349. req = (SasIoUnitControlRequest_t *)mf;
  350. memset(req, 0, sizeof(SasIoUnitControlRequest_t));
  351. req->Function = MPI_FUNCTION_SAS_IO_UNIT_CONTROL;
  352. req->MsgContext = hdr->MsgContext;
  353. req->Operation = hard_reset ?
  354. MPI_SAS_OP_PHY_HARD_RESET : MPI_SAS_OP_PHY_LINK_RESET;
  355. req->PhyNum = phy->identify.phy_identifier;
  356. mpt_put_msg_frame(mptsasMgmtCtx, ioc, mf);
  357. timeleft = wait_for_completion_timeout(&ioc->sas_mgmt.done,
  358. 10 * HZ);
  359. if (!timeleft) {
  360. /* On timeout reset the board */
  361. mpt_free_msg_frame(ioc, mf);
  362. mpt_HardResetHandler(ioc, CAN_SLEEP);
  363. error = -ETIMEDOUT;
  364. goto out_unlock;
  365. }
  366. /* a reply frame is expected */
  367. if ((ioc->sas_mgmt.status &
  368. MPT_IOCTL_STATUS_RF_VALID) == 0) {
  369. error = -ENXIO;
  370. goto out_unlock;
  371. }
  372. /* process the completed Reply Message Frame */
  373. reply = (SasIoUnitControlReply_t *)ioc->sas_mgmt.reply;
  374. if (reply->IOCStatus != MPI_IOCSTATUS_SUCCESS) {
  375. printk("%s: IOCStatus=0x%X IOCLogInfo=0x%X\n",
  376. __FUNCTION__,
  377. reply->IOCStatus,
  378. reply->IOCLogInfo);
  379. error = -ENXIO;
  380. goto out_unlock;
  381. }
  382. error = 0;
  383. out_unlock:
  384. up(&ioc->sas_mgmt.mutex);
  385. out:
  386. return error;
  387. }
  388. static struct sas_function_template mptsas_transport_functions = {
  389. .get_linkerrors = mptsas_get_linkerrors,
  390. .phy_reset = mptsas_phy_reset,
  391. };
  392. static struct scsi_transport_template *mptsas_transport_template;
  393. static int
  394. mptsas_sas_io_unit_pg0(MPT_ADAPTER *ioc, struct mptsas_portinfo *port_info)
  395. {
  396. ConfigExtendedPageHeader_t hdr;
  397. CONFIGPARMS cfg;
  398. SasIOUnitPage0_t *buffer;
  399. dma_addr_t dma_handle;
  400. int error, i;
  401. hdr.PageVersion = MPI_SASIOUNITPAGE0_PAGEVERSION;
  402. hdr.ExtPageLength = 0;
  403. hdr.PageNumber = 0;
  404. hdr.Reserved1 = 0;
  405. hdr.Reserved2 = 0;
  406. hdr.PageType = MPI_CONFIG_PAGETYPE_EXTENDED;
  407. hdr.ExtPageType = MPI_CONFIG_EXTPAGETYPE_SAS_IO_UNIT;
  408. cfg.cfghdr.ehdr = &hdr;
  409. cfg.physAddr = -1;
  410. cfg.pageAddr = 0;
  411. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  412. cfg.dir = 0; /* read */
  413. cfg.timeout = 10;
  414. error = mpt_config(ioc, &cfg);
  415. if (error)
  416. goto out;
  417. if (!hdr.ExtPageLength) {
  418. error = -ENXIO;
  419. goto out;
  420. }
  421. buffer = pci_alloc_consistent(ioc->pcidev, hdr.ExtPageLength * 4,
  422. &dma_handle);
  423. if (!buffer) {
  424. error = -ENOMEM;
  425. goto out;
  426. }
  427. cfg.physAddr = dma_handle;
  428. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  429. error = mpt_config(ioc, &cfg);
  430. if (error)
  431. goto out_free_consistent;
  432. port_info->num_phys = buffer->NumPhys;
  433. port_info->phy_info = kcalloc(port_info->num_phys,
  434. sizeof(struct mptsas_phyinfo),GFP_KERNEL);
  435. if (!port_info->phy_info) {
  436. error = -ENOMEM;
  437. goto out_free_consistent;
  438. }
  439. for (i = 0; i < port_info->num_phys; i++) {
  440. mptsas_print_phy_data(&buffer->PhyData[i]);
  441. port_info->phy_info[i].phy_id = i;
  442. port_info->phy_info[i].port_id =
  443. buffer->PhyData[i].Port;
  444. port_info->phy_info[i].negotiated_link_rate =
  445. buffer->PhyData[i].NegotiatedLinkRate;
  446. }
  447. out_free_consistent:
  448. pci_free_consistent(ioc->pcidev, hdr.ExtPageLength * 4,
  449. buffer, dma_handle);
  450. out:
  451. return error;
  452. }
  453. static int
  454. mptsas_sas_phy_pg0(MPT_ADAPTER *ioc, struct mptsas_phyinfo *phy_info,
  455. u32 form, u32 form_specific)
  456. {
  457. ConfigExtendedPageHeader_t hdr;
  458. CONFIGPARMS cfg;
  459. SasPhyPage0_t *buffer;
  460. dma_addr_t dma_handle;
  461. int error;
  462. hdr.PageVersion = MPI_SASPHY0_PAGEVERSION;
  463. hdr.ExtPageLength = 0;
  464. hdr.PageNumber = 0;
  465. hdr.Reserved1 = 0;
  466. hdr.Reserved2 = 0;
  467. hdr.PageType = MPI_CONFIG_PAGETYPE_EXTENDED;
  468. hdr.ExtPageType = MPI_CONFIG_EXTPAGETYPE_SAS_PHY;
  469. cfg.cfghdr.ehdr = &hdr;
  470. cfg.dir = 0; /* read */
  471. cfg.timeout = 10;
  472. /* Get Phy Pg 0 for each Phy. */
  473. cfg.physAddr = -1;
  474. cfg.pageAddr = form + form_specific;
  475. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  476. error = mpt_config(ioc, &cfg);
  477. if (error)
  478. goto out;
  479. if (!hdr.ExtPageLength) {
  480. error = -ENXIO;
  481. goto out;
  482. }
  483. buffer = pci_alloc_consistent(ioc->pcidev, hdr.ExtPageLength * 4,
  484. &dma_handle);
  485. if (!buffer) {
  486. error = -ENOMEM;
  487. goto out;
  488. }
  489. cfg.physAddr = dma_handle;
  490. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  491. error = mpt_config(ioc, &cfg);
  492. if (error)
  493. goto out_free_consistent;
  494. mptsas_print_phy_pg0(buffer);
  495. phy_info->hw_link_rate = buffer->HwLinkRate;
  496. phy_info->programmed_link_rate = buffer->ProgrammedLinkRate;
  497. phy_info->identify.handle = le16_to_cpu(buffer->OwnerDevHandle);
  498. phy_info->attached.handle = le16_to_cpu(buffer->AttachedDevHandle);
  499. out_free_consistent:
  500. pci_free_consistent(ioc->pcidev, hdr.ExtPageLength * 4,
  501. buffer, dma_handle);
  502. out:
  503. return error;
  504. }
  505. static int
  506. mptsas_sas_device_pg0(MPT_ADAPTER *ioc, struct mptsas_devinfo *device_info,
  507. u32 form, u32 form_specific)
  508. {
  509. ConfigExtendedPageHeader_t hdr;
  510. CONFIGPARMS cfg;
  511. SasDevicePage0_t *buffer;
  512. dma_addr_t dma_handle;
  513. __le64 sas_address;
  514. int error;
  515. hdr.PageVersion = MPI_SASDEVICE0_PAGEVERSION;
  516. hdr.ExtPageLength = 0;
  517. hdr.PageNumber = 0;
  518. hdr.Reserved1 = 0;
  519. hdr.Reserved2 = 0;
  520. hdr.PageType = MPI_CONFIG_PAGETYPE_EXTENDED;
  521. hdr.ExtPageType = MPI_CONFIG_EXTPAGETYPE_SAS_DEVICE;
  522. cfg.cfghdr.ehdr = &hdr;
  523. cfg.pageAddr = form + form_specific;
  524. cfg.physAddr = -1;
  525. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  526. cfg.dir = 0; /* read */
  527. cfg.timeout = 10;
  528. error = mpt_config(ioc, &cfg);
  529. if (error)
  530. goto out;
  531. if (!hdr.ExtPageLength) {
  532. error = -ENXIO;
  533. goto out;
  534. }
  535. buffer = pci_alloc_consistent(ioc->pcidev, hdr.ExtPageLength * 4,
  536. &dma_handle);
  537. if (!buffer) {
  538. error = -ENOMEM;
  539. goto out;
  540. }
  541. cfg.physAddr = dma_handle;
  542. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  543. error = mpt_config(ioc, &cfg);
  544. if (error)
  545. goto out_free_consistent;
  546. mptsas_print_device_pg0(buffer);
  547. device_info->handle = le16_to_cpu(buffer->DevHandle);
  548. device_info->phy_id = buffer->PhyNum;
  549. device_info->port_id = buffer->PhysicalPort;
  550. device_info->target = buffer->TargetID;
  551. device_info->bus = buffer->Bus;
  552. memcpy(&sas_address, &buffer->SASAddress, sizeof(__le64));
  553. device_info->sas_address = le64_to_cpu(sas_address);
  554. device_info->device_info =
  555. le32_to_cpu(buffer->DeviceInfo);
  556. out_free_consistent:
  557. pci_free_consistent(ioc->pcidev, hdr.ExtPageLength * 4,
  558. buffer, dma_handle);
  559. out:
  560. return error;
  561. }
  562. static int
  563. mptsas_sas_expander_pg0(MPT_ADAPTER *ioc, struct mptsas_portinfo *port_info,
  564. u32 form, u32 form_specific)
  565. {
  566. ConfigExtendedPageHeader_t hdr;
  567. CONFIGPARMS cfg;
  568. SasExpanderPage0_t *buffer;
  569. dma_addr_t dma_handle;
  570. int error;
  571. hdr.PageVersion = MPI_SASEXPANDER0_PAGEVERSION;
  572. hdr.ExtPageLength = 0;
  573. hdr.PageNumber = 0;
  574. hdr.Reserved1 = 0;
  575. hdr.Reserved2 = 0;
  576. hdr.PageType = MPI_CONFIG_PAGETYPE_EXTENDED;
  577. hdr.ExtPageType = MPI_CONFIG_EXTPAGETYPE_SAS_EXPANDER;
  578. cfg.cfghdr.ehdr = &hdr;
  579. cfg.physAddr = -1;
  580. cfg.pageAddr = form + form_specific;
  581. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  582. cfg.dir = 0; /* read */
  583. cfg.timeout = 10;
  584. error = mpt_config(ioc, &cfg);
  585. if (error)
  586. goto out;
  587. if (!hdr.ExtPageLength) {
  588. error = -ENXIO;
  589. goto out;
  590. }
  591. buffer = pci_alloc_consistent(ioc->pcidev, hdr.ExtPageLength * 4,
  592. &dma_handle);
  593. if (!buffer) {
  594. error = -ENOMEM;
  595. goto out;
  596. }
  597. cfg.physAddr = dma_handle;
  598. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  599. error = mpt_config(ioc, &cfg);
  600. if (error)
  601. goto out_free_consistent;
  602. /* save config data */
  603. port_info->num_phys = buffer->NumPhys;
  604. port_info->handle = le16_to_cpu(buffer->DevHandle);
  605. port_info->phy_info = kcalloc(port_info->num_phys,
  606. sizeof(struct mptsas_phyinfo),GFP_KERNEL);
  607. if (!port_info->phy_info) {
  608. error = -ENOMEM;
  609. goto out_free_consistent;
  610. }
  611. out_free_consistent:
  612. pci_free_consistent(ioc->pcidev, hdr.ExtPageLength * 4,
  613. buffer, dma_handle);
  614. out:
  615. return error;
  616. }
  617. static int
  618. mptsas_sas_expander_pg1(MPT_ADAPTER *ioc, struct mptsas_phyinfo *phy_info,
  619. u32 form, u32 form_specific)
  620. {
  621. ConfigExtendedPageHeader_t hdr;
  622. CONFIGPARMS cfg;
  623. SasExpanderPage1_t *buffer;
  624. dma_addr_t dma_handle;
  625. int error;
  626. hdr.PageVersion = MPI_SASEXPANDER0_PAGEVERSION;
  627. hdr.ExtPageLength = 0;
  628. hdr.PageNumber = 1;
  629. hdr.Reserved1 = 0;
  630. hdr.Reserved2 = 0;
  631. hdr.PageType = MPI_CONFIG_PAGETYPE_EXTENDED;
  632. hdr.ExtPageType = MPI_CONFIG_EXTPAGETYPE_SAS_EXPANDER;
  633. cfg.cfghdr.ehdr = &hdr;
  634. cfg.physAddr = -1;
  635. cfg.pageAddr = form + form_specific;
  636. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  637. cfg.dir = 0; /* read */
  638. cfg.timeout = 10;
  639. error = mpt_config(ioc, &cfg);
  640. if (error)
  641. goto out;
  642. if (!hdr.ExtPageLength) {
  643. error = -ENXIO;
  644. goto out;
  645. }
  646. buffer = pci_alloc_consistent(ioc->pcidev, hdr.ExtPageLength * 4,
  647. &dma_handle);
  648. if (!buffer) {
  649. error = -ENOMEM;
  650. goto out;
  651. }
  652. cfg.physAddr = dma_handle;
  653. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  654. error = mpt_config(ioc, &cfg);
  655. if (error)
  656. goto out_free_consistent;
  657. mptsas_print_expander_pg1(buffer);
  658. /* save config data */
  659. phy_info->phy_id = buffer->PhyIdentifier;
  660. phy_info->port_id = buffer->PhysicalPort;
  661. phy_info->negotiated_link_rate = buffer->NegotiatedLinkRate;
  662. phy_info->programmed_link_rate = buffer->ProgrammedLinkRate;
  663. phy_info->hw_link_rate = buffer->HwLinkRate;
  664. phy_info->identify.handle = le16_to_cpu(buffer->OwnerDevHandle);
  665. phy_info->attached.handle = le16_to_cpu(buffer->AttachedDevHandle);
  666. out_free_consistent:
  667. pci_free_consistent(ioc->pcidev, hdr.ExtPageLength * 4,
  668. buffer, dma_handle);
  669. out:
  670. return error;
  671. }
  672. static void
  673. mptsas_parse_device_info(struct sas_identify *identify,
  674. struct mptsas_devinfo *device_info)
  675. {
  676. u16 protocols;
  677. identify->sas_address = device_info->sas_address;
  678. identify->phy_identifier = device_info->phy_id;
  679. /*
  680. * Fill in Phy Initiator Port Protocol.
  681. * Bits 6:3, more than one bit can be set, fall through cases.
  682. */
  683. protocols = device_info->device_info & 0x78;
  684. identify->initiator_port_protocols = 0;
  685. if (protocols & MPI_SAS_DEVICE_INFO_SSP_INITIATOR)
  686. identify->initiator_port_protocols |= SAS_PROTOCOL_SSP;
  687. if (protocols & MPI_SAS_DEVICE_INFO_STP_INITIATOR)
  688. identify->initiator_port_protocols |= SAS_PROTOCOL_STP;
  689. if (protocols & MPI_SAS_DEVICE_INFO_SMP_INITIATOR)
  690. identify->initiator_port_protocols |= SAS_PROTOCOL_SMP;
  691. if (protocols & MPI_SAS_DEVICE_INFO_SATA_HOST)
  692. identify->initiator_port_protocols |= SAS_PROTOCOL_SATA;
  693. /*
  694. * Fill in Phy Target Port Protocol.
  695. * Bits 10:7, more than one bit can be set, fall through cases.
  696. */
  697. protocols = device_info->device_info & 0x780;
  698. identify->target_port_protocols = 0;
  699. if (protocols & MPI_SAS_DEVICE_INFO_SSP_TARGET)
  700. identify->target_port_protocols |= SAS_PROTOCOL_SSP;
  701. if (protocols & MPI_SAS_DEVICE_INFO_STP_TARGET)
  702. identify->target_port_protocols |= SAS_PROTOCOL_STP;
  703. if (protocols & MPI_SAS_DEVICE_INFO_SMP_TARGET)
  704. identify->target_port_protocols |= SAS_PROTOCOL_SMP;
  705. if (protocols & MPI_SAS_DEVICE_INFO_SATA_DEVICE)
  706. identify->target_port_protocols |= SAS_PROTOCOL_SATA;
  707. /*
  708. * Fill in Attached device type.
  709. */
  710. switch (device_info->device_info &
  711. MPI_SAS_DEVICE_INFO_MASK_DEVICE_TYPE) {
  712. case MPI_SAS_DEVICE_INFO_NO_DEVICE:
  713. identify->device_type = SAS_PHY_UNUSED;
  714. break;
  715. case MPI_SAS_DEVICE_INFO_END_DEVICE:
  716. identify->device_type = SAS_END_DEVICE;
  717. break;
  718. case MPI_SAS_DEVICE_INFO_EDGE_EXPANDER:
  719. identify->device_type = SAS_EDGE_EXPANDER_DEVICE;
  720. break;
  721. case MPI_SAS_DEVICE_INFO_FANOUT_EXPANDER:
  722. identify->device_type = SAS_FANOUT_EXPANDER_DEVICE;
  723. break;
  724. }
  725. }
  726. static int mptsas_probe_one_phy(struct device *dev,
  727. struct mptsas_phyinfo *phy_info, int index, int local)
  728. {
  729. struct sas_phy *port;
  730. int error;
  731. port = sas_phy_alloc(dev, index);
  732. if (!port)
  733. return -ENOMEM;
  734. port->port_identifier = phy_info->port_id;
  735. mptsas_parse_device_info(&port->identify, &phy_info->identify);
  736. /*
  737. * Set Negotiated link rate.
  738. */
  739. switch (phy_info->negotiated_link_rate) {
  740. case MPI_SAS_IOUNIT0_RATE_PHY_DISABLED:
  741. port->negotiated_linkrate = SAS_PHY_DISABLED;
  742. break;
  743. case MPI_SAS_IOUNIT0_RATE_FAILED_SPEED_NEGOTIATION:
  744. port->negotiated_linkrate = SAS_LINK_RATE_FAILED;
  745. break;
  746. case MPI_SAS_IOUNIT0_RATE_1_5:
  747. port->negotiated_linkrate = SAS_LINK_RATE_1_5_GBPS;
  748. break;
  749. case MPI_SAS_IOUNIT0_RATE_3_0:
  750. port->negotiated_linkrate = SAS_LINK_RATE_3_0_GBPS;
  751. break;
  752. case MPI_SAS_IOUNIT0_RATE_SATA_OOB_COMPLETE:
  753. case MPI_SAS_IOUNIT0_RATE_UNKNOWN:
  754. default:
  755. port->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
  756. break;
  757. }
  758. /*
  759. * Set Max hardware link rate.
  760. */
  761. switch (phy_info->hw_link_rate & MPI_SAS_PHY0_PRATE_MAX_RATE_MASK) {
  762. case MPI_SAS_PHY0_HWRATE_MAX_RATE_1_5:
  763. port->maximum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS;
  764. break;
  765. case MPI_SAS_PHY0_PRATE_MAX_RATE_3_0:
  766. port->maximum_linkrate_hw = SAS_LINK_RATE_3_0_GBPS;
  767. break;
  768. default:
  769. break;
  770. }
  771. /*
  772. * Set Max programmed link rate.
  773. */
  774. switch (phy_info->programmed_link_rate &
  775. MPI_SAS_PHY0_PRATE_MAX_RATE_MASK) {
  776. case MPI_SAS_PHY0_PRATE_MAX_RATE_1_5:
  777. port->maximum_linkrate = SAS_LINK_RATE_1_5_GBPS;
  778. break;
  779. case MPI_SAS_PHY0_PRATE_MAX_RATE_3_0:
  780. port->maximum_linkrate = SAS_LINK_RATE_3_0_GBPS;
  781. break;
  782. default:
  783. break;
  784. }
  785. /*
  786. * Set Min hardware link rate.
  787. */
  788. switch (phy_info->hw_link_rate & MPI_SAS_PHY0_HWRATE_MIN_RATE_MASK) {
  789. case MPI_SAS_PHY0_HWRATE_MIN_RATE_1_5:
  790. port->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS;
  791. break;
  792. case MPI_SAS_PHY0_PRATE_MIN_RATE_3_0:
  793. port->minimum_linkrate_hw = SAS_LINK_RATE_3_0_GBPS;
  794. break;
  795. default:
  796. break;
  797. }
  798. /*
  799. * Set Min programmed link rate.
  800. */
  801. switch (phy_info->programmed_link_rate &
  802. MPI_SAS_PHY0_PRATE_MIN_RATE_MASK) {
  803. case MPI_SAS_PHY0_PRATE_MIN_RATE_1_5:
  804. port->minimum_linkrate = SAS_LINK_RATE_1_5_GBPS;
  805. break;
  806. case MPI_SAS_PHY0_PRATE_MIN_RATE_3_0:
  807. port->minimum_linkrate = SAS_LINK_RATE_3_0_GBPS;
  808. break;
  809. default:
  810. break;
  811. }
  812. if (local)
  813. port->local_attached = 1;
  814. error = sas_phy_add(port);
  815. if (error) {
  816. sas_phy_free(port);
  817. return error;
  818. }
  819. if (phy_info->attached.handle) {
  820. struct sas_rphy *rphy;
  821. rphy = sas_rphy_alloc(port);
  822. if (!rphy)
  823. return 0; /* non-fatal: an rphy can be added later */
  824. mptsas_parse_device_info(&rphy->identify, &phy_info->attached);
  825. error = sas_rphy_add(rphy);
  826. if (error) {
  827. sas_rphy_free(rphy);
  828. return error;
  829. }
  830. phy_info->rphy = rphy;
  831. }
  832. return 0;
  833. }
  834. static int
  835. mptsas_probe_hba_phys(MPT_ADAPTER *ioc, int *index)
  836. {
  837. struct mptsas_portinfo *port_info;
  838. u32 handle = 0xFFFF;
  839. int error = -ENOMEM, i;
  840. port_info = kmalloc(sizeof(*port_info), GFP_KERNEL);
  841. if (!port_info)
  842. goto out;
  843. memset(port_info, 0, sizeof(*port_info));
  844. error = mptsas_sas_io_unit_pg0(ioc, port_info);
  845. if (error)
  846. goto out_free_port_info;
  847. list_add_tail(&port_info->list, &ioc->sas_topology);
  848. for (i = 0; i < port_info->num_phys; i++) {
  849. mptsas_sas_phy_pg0(ioc, &port_info->phy_info[i],
  850. (MPI_SAS_PHY_PGAD_FORM_PHY_NUMBER <<
  851. MPI_SAS_PHY_PGAD_FORM_SHIFT), i);
  852. mptsas_sas_device_pg0(ioc, &port_info->phy_info[i].identify,
  853. (MPI_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE <<
  854. MPI_SAS_DEVICE_PGAD_FORM_SHIFT), handle);
  855. port_info->phy_info[i].identify.phy_id =
  856. port_info->phy_info[i].phy_id;
  857. handle = port_info->phy_info[i].identify.handle;
  858. if (port_info->phy_info[i].attached.handle) {
  859. mptsas_sas_device_pg0(ioc,
  860. &port_info->phy_info[i].attached,
  861. (MPI_SAS_DEVICE_PGAD_FORM_HANDLE <<
  862. MPI_SAS_DEVICE_PGAD_FORM_SHIFT),
  863. port_info->phy_info[i].attached.handle);
  864. }
  865. mptsas_probe_one_phy(&ioc->sh->shost_gendev,
  866. &port_info->phy_info[i], *index, 1);
  867. (*index)++;
  868. }
  869. return 0;
  870. out_free_port_info:
  871. kfree(port_info);
  872. out:
  873. return error;
  874. }
  875. static int
  876. mptsas_probe_expander_phys(MPT_ADAPTER *ioc, u32 *handle, int *index)
  877. {
  878. struct mptsas_portinfo *port_info, *p;
  879. int error = -ENOMEM, i, j;
  880. port_info = kmalloc(sizeof(*port_info), GFP_KERNEL);
  881. if (!port_info)
  882. goto out;
  883. memset(port_info, 0, sizeof(*port_info));
  884. error = mptsas_sas_expander_pg0(ioc, port_info,
  885. (MPI_SAS_EXPAND_PGAD_FORM_GET_NEXT_HANDLE <<
  886. MPI_SAS_EXPAND_PGAD_FORM_SHIFT), *handle);
  887. if (error)
  888. goto out_free_port_info;
  889. *handle = port_info->handle;
  890. list_add_tail(&port_info->list, &ioc->sas_topology);
  891. for (i = 0; i < port_info->num_phys; i++) {
  892. struct device *parent;
  893. mptsas_sas_expander_pg1(ioc, &port_info->phy_info[i],
  894. (MPI_SAS_EXPAND_PGAD_FORM_HANDLE_PHY_NUM <<
  895. MPI_SAS_EXPAND_PGAD_FORM_SHIFT), (i << 16) + *handle);
  896. if (port_info->phy_info[i].identify.handle) {
  897. mptsas_sas_device_pg0(ioc,
  898. &port_info->phy_info[i].identify,
  899. (MPI_SAS_DEVICE_PGAD_FORM_HANDLE <<
  900. MPI_SAS_DEVICE_PGAD_FORM_SHIFT),
  901. port_info->phy_info[i].identify.handle);
  902. port_info->phy_info[i].identify.phy_id =
  903. port_info->phy_info[i].phy_id;
  904. }
  905. if (port_info->phy_info[i].attached.handle) {
  906. mptsas_sas_device_pg0(ioc,
  907. &port_info->phy_info[i].attached,
  908. (MPI_SAS_DEVICE_PGAD_FORM_HANDLE <<
  909. MPI_SAS_DEVICE_PGAD_FORM_SHIFT),
  910. port_info->phy_info[i].attached.handle);
  911. }
  912. /*
  913. * If we find a parent port handle this expander is
  914. * attached to another expander, else it hangs of the
  915. * HBA phys.
  916. */
  917. parent = &ioc->sh->shost_gendev;
  918. list_for_each_entry(p, &ioc->sas_topology, list) {
  919. for (j = 0; j < p->num_phys; j++) {
  920. if (port_info->phy_info[i].identify.handle ==
  921. p->phy_info[j].attached.handle)
  922. parent = &p->phy_info[j].rphy->dev;
  923. }
  924. }
  925. mptsas_probe_one_phy(parent, &port_info->phy_info[i],
  926. *index, 0);
  927. (*index)++;
  928. }
  929. return 0;
  930. out_free_port_info:
  931. kfree(port_info);
  932. out:
  933. return error;
  934. }
  935. static void
  936. mptsas_scan_sas_topology(MPT_ADAPTER *ioc)
  937. {
  938. u32 handle = 0xFFFF;
  939. int index = 0;
  940. mptsas_probe_hba_phys(ioc, &index);
  941. while (!mptsas_probe_expander_phys(ioc, &handle, &index))
  942. ;
  943. }
  944. static int
  945. mptsas_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  946. {
  947. struct Scsi_Host *sh;
  948. MPT_SCSI_HOST *hd;
  949. MPT_ADAPTER *ioc;
  950. unsigned long flags;
  951. int sz, ii;
  952. int numSGE = 0;
  953. int scale;
  954. int ioc_cap;
  955. u8 *mem;
  956. int error=0;
  957. int r;
  958. r = mpt_attach(pdev,id);
  959. if (r)
  960. return r;
  961. ioc = pci_get_drvdata(pdev);
  962. ioc->DoneCtx = mptsasDoneCtx;
  963. ioc->TaskCtx = mptsasTaskCtx;
  964. ioc->InternalCtx = mptsasInternalCtx;
  965. /* Added sanity check on readiness of the MPT adapter.
  966. */
  967. if (ioc->last_state != MPI_IOC_STATE_OPERATIONAL) {
  968. printk(MYIOC_s_WARN_FMT
  969. "Skipping because it's not operational!\n",
  970. ioc->name);
  971. return -ENODEV;
  972. }
  973. if (!ioc->active) {
  974. printk(MYIOC_s_WARN_FMT "Skipping because it's disabled!\n",
  975. ioc->name);
  976. return -ENODEV;
  977. }
  978. /* Sanity check - ensure at least 1 port is INITIATOR capable
  979. */
  980. ioc_cap = 0;
  981. for (ii = 0; ii < ioc->facts.NumberOfPorts; ii++) {
  982. if (ioc->pfacts[ii].ProtocolFlags &
  983. MPI_PORTFACTS_PROTOCOL_INITIATOR)
  984. ioc_cap++;
  985. }
  986. if (!ioc_cap) {
  987. printk(MYIOC_s_WARN_FMT
  988. "Skipping ioc=%p because SCSI Initiator mode "
  989. "is NOT enabled!\n", ioc->name, ioc);
  990. return 0;
  991. }
  992. sh = scsi_host_alloc(&mptsas_driver_template, sizeof(MPT_SCSI_HOST));
  993. if (!sh) {
  994. printk(MYIOC_s_WARN_FMT
  995. "Unable to register controller with SCSI subsystem\n",
  996. ioc->name);
  997. return -1;
  998. }
  999. spin_lock_irqsave(&ioc->FreeQlock, flags);
  1000. /* Attach the SCSI Host to the IOC structure
  1001. */
  1002. ioc->sh = sh;
  1003. sh->io_port = 0;
  1004. sh->n_io_port = 0;
  1005. sh->irq = 0;
  1006. /* set 16 byte cdb's */
  1007. sh->max_cmd_len = 16;
  1008. sh->max_id = ioc->pfacts->MaxDevices + 1;
  1009. sh->transportt = mptsas_transport_template;
  1010. sh->max_lun = MPT_LAST_LUN + 1;
  1011. sh->max_channel = 0;
  1012. sh->this_id = ioc->pfacts[0].PortSCSIID;
  1013. /* Required entry.
  1014. */
  1015. sh->unique_id = ioc->id;
  1016. INIT_LIST_HEAD(&ioc->sas_topology);
  1017. init_MUTEX(&ioc->sas_mgmt.mutex);
  1018. init_completion(&ioc->sas_mgmt.done);
  1019. /* Verify that we won't exceed the maximum
  1020. * number of chain buffers
  1021. * We can optimize: ZZ = req_sz/sizeof(SGE)
  1022. * For 32bit SGE's:
  1023. * numSGE = 1 + (ZZ-1)*(maxChain -1) + ZZ
  1024. * + (req_sz - 64)/sizeof(SGE)
  1025. * A slightly different algorithm is required for
  1026. * 64bit SGEs.
  1027. */
  1028. scale = ioc->req_sz/(sizeof(dma_addr_t) + sizeof(u32));
  1029. if (sizeof(dma_addr_t) == sizeof(u64)) {
  1030. numSGE = (scale - 1) *
  1031. (ioc->facts.MaxChainDepth-1) + scale +
  1032. (ioc->req_sz - 60) / (sizeof(dma_addr_t) +
  1033. sizeof(u32));
  1034. } else {
  1035. numSGE = 1 + (scale - 1) *
  1036. (ioc->facts.MaxChainDepth-1) + scale +
  1037. (ioc->req_sz - 64) / (sizeof(dma_addr_t) +
  1038. sizeof(u32));
  1039. }
  1040. if (numSGE < sh->sg_tablesize) {
  1041. /* Reset this value */
  1042. dprintk((MYIOC_s_INFO_FMT
  1043. "Resetting sg_tablesize to %d from %d\n",
  1044. ioc->name, numSGE, sh->sg_tablesize));
  1045. sh->sg_tablesize = numSGE;
  1046. }
  1047. spin_unlock_irqrestore(&ioc->FreeQlock, flags);
  1048. hd = (MPT_SCSI_HOST *) sh->hostdata;
  1049. hd->ioc = ioc;
  1050. /* SCSI needs scsi_cmnd lookup table!
  1051. * (with size equal to req_depth*PtrSz!)
  1052. */
  1053. sz = ioc->req_depth * sizeof(void *);
  1054. mem = kmalloc(sz, GFP_ATOMIC);
  1055. if (mem == NULL) {
  1056. error = -ENOMEM;
  1057. goto mptsas_probe_failed;
  1058. }
  1059. memset(mem, 0, sz);
  1060. hd->ScsiLookup = (struct scsi_cmnd **) mem;
  1061. dprintk((MYIOC_s_INFO_FMT "ScsiLookup @ %p, sz=%d\n",
  1062. ioc->name, hd->ScsiLookup, sz));
  1063. /* Allocate memory for the device structures.
  1064. * A non-Null pointer at an offset
  1065. * indicates a device exists.
  1066. * max_id = 1 + maximum id (hosts.h)
  1067. */
  1068. sz = sh->max_id * sizeof(void *);
  1069. mem = kmalloc(sz, GFP_ATOMIC);
  1070. if (mem == NULL) {
  1071. error = -ENOMEM;
  1072. goto mptsas_probe_failed;
  1073. }
  1074. memset(mem, 0, sz);
  1075. hd->Targets = (VirtDevice **) mem;
  1076. dprintk((KERN_INFO
  1077. " Targets @ %p, sz=%d\n", hd->Targets, sz));
  1078. /* Clear the TM flags
  1079. */
  1080. hd->tmPending = 0;
  1081. hd->tmState = TM_STATE_NONE;
  1082. hd->resetPending = 0;
  1083. hd->abortSCpnt = NULL;
  1084. /* Clear the pointer used to store
  1085. * single-threaded commands, i.e., those
  1086. * issued during a bus scan, dv and
  1087. * configuration pages.
  1088. */
  1089. hd->cmdPtr = NULL;
  1090. /* Initialize this SCSI Hosts' timers
  1091. * To use, set the timer expires field
  1092. * and add_timer
  1093. */
  1094. init_timer(&hd->timer);
  1095. hd->timer.data = (unsigned long) hd;
  1096. hd->timer.function = mptscsih_timer_expired;
  1097. hd->mpt_pq_filter = mpt_pq_filter;
  1098. ioc->sas_data.ptClear = mpt_pt_clear;
  1099. if (ioc->sas_data.ptClear==1) {
  1100. mptbase_sas_persist_operation(
  1101. ioc, MPI_SAS_OP_CLEAR_ALL_PERSISTENT);
  1102. }
  1103. ddvprintk((MYIOC_s_INFO_FMT
  1104. "mpt_pq_filter %x mpt_pq_filter %x\n",
  1105. ioc->name,
  1106. mpt_pq_filter,
  1107. mpt_pq_filter));
  1108. init_waitqueue_head(&hd->scandv_waitq);
  1109. hd->scandv_wait_done = 0;
  1110. hd->last_queue_full = 0;
  1111. error = scsi_add_host(sh, &ioc->pcidev->dev);
  1112. if (error) {
  1113. dprintk((KERN_ERR MYNAM
  1114. "scsi_add_host failed\n"));
  1115. goto mptsas_probe_failed;
  1116. }
  1117. mptsas_scan_sas_topology(ioc);
  1118. return 0;
  1119. mptsas_probe_failed:
  1120. mptscsih_remove(pdev);
  1121. return error;
  1122. }
  1123. static void __devexit mptsas_remove(struct pci_dev *pdev)
  1124. {
  1125. MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
  1126. struct mptsas_portinfo *p, *n;
  1127. sas_remove_host(ioc->sh);
  1128. list_for_each_entry_safe(p, n, &ioc->sas_topology, list) {
  1129. list_del(&p->list);
  1130. kfree(p);
  1131. }
  1132. mptscsih_remove(pdev);
  1133. }
  1134. static struct pci_device_id mptsas_pci_table[] = {
  1135. { PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1064,
  1136. PCI_ANY_ID, PCI_ANY_ID },
  1137. { PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1066,
  1138. PCI_ANY_ID, PCI_ANY_ID },
  1139. { PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1068,
  1140. PCI_ANY_ID, PCI_ANY_ID },
  1141. { PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1064E,
  1142. PCI_ANY_ID, PCI_ANY_ID },
  1143. { PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1066E,
  1144. PCI_ANY_ID, PCI_ANY_ID },
  1145. { PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1068E,
  1146. PCI_ANY_ID, PCI_ANY_ID },
  1147. {0} /* Terminating entry */
  1148. };
  1149. MODULE_DEVICE_TABLE(pci, mptsas_pci_table);
  1150. static struct pci_driver mptsas_driver = {
  1151. .name = "mptsas",
  1152. .id_table = mptsas_pci_table,
  1153. .probe = mptsas_probe,
  1154. .remove = __devexit_p(mptsas_remove),
  1155. .shutdown = mptscsih_shutdown,
  1156. #ifdef CONFIG_PM
  1157. .suspend = mptscsih_suspend,
  1158. .resume = mptscsih_resume,
  1159. #endif
  1160. };
  1161. static int __init
  1162. mptsas_init(void)
  1163. {
  1164. show_mptmod_ver(my_NAME, my_VERSION);
  1165. mptsas_transport_template =
  1166. sas_attach_transport(&mptsas_transport_functions);
  1167. if (!mptsas_transport_template)
  1168. return -ENODEV;
  1169. mptsasDoneCtx = mpt_register(mptscsih_io_done, MPTSAS_DRIVER);
  1170. mptsasTaskCtx = mpt_register(mptscsih_taskmgmt_complete, MPTSAS_DRIVER);
  1171. mptsasInternalCtx =
  1172. mpt_register(mptscsih_scandv_complete, MPTSAS_DRIVER);
  1173. mptsasMgmtCtx = mpt_register(mptsas_mgmt_done, MPTSAS_DRIVER);
  1174. if (mpt_event_register(mptsasDoneCtx, mptscsih_event_process) == 0) {
  1175. devtprintk((KERN_INFO MYNAM
  1176. ": Registered for IOC event notifications\n"));
  1177. }
  1178. if (mpt_reset_register(mptsasDoneCtx, mptscsih_ioc_reset) == 0) {
  1179. dprintk((KERN_INFO MYNAM
  1180. ": Registered for IOC reset notifications\n"));
  1181. }
  1182. return pci_register_driver(&mptsas_driver);
  1183. }
  1184. static void __exit
  1185. mptsas_exit(void)
  1186. {
  1187. pci_unregister_driver(&mptsas_driver);
  1188. sas_release_transport(mptsas_transport_template);
  1189. mpt_reset_deregister(mptsasDoneCtx);
  1190. mpt_event_deregister(mptsasDoneCtx);
  1191. mpt_deregister(mptsasMgmtCtx);
  1192. mpt_deregister(mptsasInternalCtx);
  1193. mpt_deregister(mptsasTaskCtx);
  1194. mpt_deregister(mptsasDoneCtx);
  1195. }
  1196. module_init(mptsas_init);
  1197. module_exit(mptsas_exit);