init.c 41 KB

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  1. /*
  2. * Copyright (c) 2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/moduleparam.h>
  17. #include <linux/errno.h>
  18. #include <linux/of.h>
  19. #include <linux/mmc/sdio_func.h>
  20. #include "core.h"
  21. #include "cfg80211.h"
  22. #include "target.h"
  23. #include "debug.h"
  24. #include "hif-ops.h"
  25. unsigned int debug_mask;
  26. static unsigned int testmode;
  27. module_param(debug_mask, uint, 0644);
  28. module_param(testmode, uint, 0644);
  29. /*
  30. * Include definitions here that can be used to tune the WLAN module
  31. * behavior. Different customers can tune the behavior as per their needs,
  32. * here.
  33. */
  34. /*
  35. * This configuration item enable/disable keepalive support.
  36. * Keepalive support: In the absence of any data traffic to AP, null
  37. * frames will be sent to the AP at periodic interval, to keep the association
  38. * active. This configuration item defines the periodic interval.
  39. * Use value of zero to disable keepalive support
  40. * Default: 60 seconds
  41. */
  42. #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
  43. /*
  44. * This configuration item sets the value of disconnect timeout
  45. * Firmware delays sending the disconnec event to the host for this
  46. * timeout after is gets disconnected from the current AP.
  47. * If the firmware successly roams within the disconnect timeout
  48. * it sends a new connect event
  49. */
  50. #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
  51. #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8
  52. #define ATH6KL_DATA_OFFSET 64
  53. struct sk_buff *ath6kl_buf_alloc(int size)
  54. {
  55. struct sk_buff *skb;
  56. u16 reserved;
  57. /* Add chacheline space at front and back of buffer */
  58. reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
  59. sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
  60. skb = dev_alloc_skb(size + reserved);
  61. if (skb)
  62. skb_reserve(skb, reserved - L1_CACHE_BYTES);
  63. return skb;
  64. }
  65. void ath6kl_init_profile_info(struct ath6kl_vif *vif)
  66. {
  67. vif->ssid_len = 0;
  68. memset(vif->ssid, 0, sizeof(vif->ssid));
  69. vif->dot11_auth_mode = OPEN_AUTH;
  70. vif->auth_mode = NONE_AUTH;
  71. vif->prwise_crypto = NONE_CRYPT;
  72. vif->prwise_crypto_len = 0;
  73. vif->grp_crypto = NONE_CRYPT;
  74. vif->grp_crypto_len = 0;
  75. memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
  76. memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
  77. memset(vif->bssid, 0, sizeof(vif->bssid));
  78. vif->bss_ch = 0;
  79. }
  80. static int ath6kl_set_host_app_area(struct ath6kl *ar)
  81. {
  82. u32 address, data;
  83. struct host_app_area host_app_area;
  84. /* Fetch the address of the host_app_area_s
  85. * instance in the host interest area */
  86. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
  87. address = TARG_VTOP(ar->target_type, address);
  88. if (ath6kl_diag_read32(ar, address, &data))
  89. return -EIO;
  90. address = TARG_VTOP(ar->target_type, data);
  91. host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
  92. if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
  93. sizeof(struct host_app_area)))
  94. return -EIO;
  95. return 0;
  96. }
  97. static inline void set_ac2_ep_map(struct ath6kl *ar,
  98. u8 ac,
  99. enum htc_endpoint_id ep)
  100. {
  101. ar->ac2ep_map[ac] = ep;
  102. ar->ep2ac_map[ep] = ac;
  103. }
  104. /* connect to a service */
  105. static int ath6kl_connectservice(struct ath6kl *ar,
  106. struct htc_service_connect_req *con_req,
  107. char *desc)
  108. {
  109. int status;
  110. struct htc_service_connect_resp response;
  111. memset(&response, 0, sizeof(response));
  112. status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
  113. if (status) {
  114. ath6kl_err("failed to connect to %s service status:%d\n",
  115. desc, status);
  116. return status;
  117. }
  118. switch (con_req->svc_id) {
  119. case WMI_CONTROL_SVC:
  120. if (test_bit(WMI_ENABLED, &ar->flag))
  121. ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
  122. ar->ctrl_ep = response.endpoint;
  123. break;
  124. case WMI_DATA_BE_SVC:
  125. set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
  126. break;
  127. case WMI_DATA_BK_SVC:
  128. set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
  129. break;
  130. case WMI_DATA_VI_SVC:
  131. set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
  132. break;
  133. case WMI_DATA_VO_SVC:
  134. set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
  135. break;
  136. default:
  137. ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
  138. return -EINVAL;
  139. }
  140. return 0;
  141. }
  142. static int ath6kl_init_service_ep(struct ath6kl *ar)
  143. {
  144. struct htc_service_connect_req connect;
  145. memset(&connect, 0, sizeof(connect));
  146. /* these fields are the same for all service endpoints */
  147. connect.ep_cb.rx = ath6kl_rx;
  148. connect.ep_cb.rx_refill = ath6kl_rx_refill;
  149. connect.ep_cb.tx_full = ath6kl_tx_queue_full;
  150. /*
  151. * Set the max queue depth so that our ath6kl_tx_queue_full handler
  152. * gets called.
  153. */
  154. connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
  155. connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
  156. if (!connect.ep_cb.rx_refill_thresh)
  157. connect.ep_cb.rx_refill_thresh++;
  158. /* connect to control service */
  159. connect.svc_id = WMI_CONTROL_SVC;
  160. if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
  161. return -EIO;
  162. connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
  163. /*
  164. * Limit the HTC message size on the send path, although e can
  165. * receive A-MSDU frames of 4K, we will only send ethernet-sized
  166. * (802.3) frames on the send path.
  167. */
  168. connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
  169. /*
  170. * To reduce the amount of committed memory for larger A_MSDU
  171. * frames, use the recv-alloc threshold mechanism for larger
  172. * packets.
  173. */
  174. connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
  175. connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
  176. /*
  177. * For the remaining data services set the connection flag to
  178. * reduce dribbling, if configured to do so.
  179. */
  180. connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
  181. connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
  182. connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
  183. connect.svc_id = WMI_DATA_BE_SVC;
  184. if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
  185. return -EIO;
  186. /* connect to back-ground map this to WMI LOW_PRI */
  187. connect.svc_id = WMI_DATA_BK_SVC;
  188. if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
  189. return -EIO;
  190. /* connect to Video service, map this to to HI PRI */
  191. connect.svc_id = WMI_DATA_VI_SVC;
  192. if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
  193. return -EIO;
  194. /*
  195. * Connect to VO service, this is currently not mapped to a WMI
  196. * priority stream due to historical reasons. WMI originally
  197. * defined 3 priorities over 3 mailboxes We can change this when
  198. * WMI is reworked so that priorities are not dependent on
  199. * mailboxes.
  200. */
  201. connect.svc_id = WMI_DATA_VO_SVC;
  202. if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
  203. return -EIO;
  204. return 0;
  205. }
  206. void ath6kl_init_control_info(struct ath6kl_vif *vif)
  207. {
  208. ath6kl_init_profile_info(vif);
  209. vif->def_txkey_index = 0;
  210. memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
  211. vif->ch_hint = 0;
  212. }
  213. /*
  214. * Set HTC/Mbox operational parameters, this can only be called when the
  215. * target is in the BMI phase.
  216. */
  217. static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
  218. u8 htc_ctrl_buf)
  219. {
  220. int status;
  221. u32 blk_size;
  222. blk_size = ar->mbox_info.block_size;
  223. if (htc_ctrl_buf)
  224. blk_size |= ((u32)htc_ctrl_buf) << 16;
  225. /* set the host interest area for the block size */
  226. status = ath6kl_bmi_write(ar,
  227. ath6kl_get_hi_item_addr(ar,
  228. HI_ITEM(hi_mbox_io_block_sz)),
  229. (u8 *)&blk_size,
  230. 4);
  231. if (status) {
  232. ath6kl_err("bmi_write_memory for IO block size failed\n");
  233. goto out;
  234. }
  235. ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
  236. blk_size,
  237. ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
  238. if (mbox_isr_yield_val) {
  239. /* set the host interest area for the mbox ISR yield limit */
  240. status = ath6kl_bmi_write(ar,
  241. ath6kl_get_hi_item_addr(ar,
  242. HI_ITEM(hi_mbox_isr_yield_limit)),
  243. (u8 *)&mbox_isr_yield_val,
  244. 4);
  245. if (status) {
  246. ath6kl_err("bmi_write_memory for yield limit failed\n");
  247. goto out;
  248. }
  249. }
  250. out:
  251. return status;
  252. }
  253. #define REG_DUMP_COUNT_AR6003 60
  254. #define REGISTER_DUMP_LEN_MAX 60
  255. static void ath6kl_dump_target_assert_info(struct ath6kl *ar)
  256. {
  257. u32 address;
  258. u32 regdump_loc = 0;
  259. int status;
  260. u32 regdump_val[REGISTER_DUMP_LEN_MAX];
  261. u32 i;
  262. if (ar->target_type != TARGET_TYPE_AR6003)
  263. return;
  264. /* the reg dump pointer is copied to the host interest area */
  265. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_failure_state));
  266. address = TARG_VTOP(ar->target_type, address);
  267. /* read RAM location through diagnostic window */
  268. status = ath6kl_diag_read32(ar, address, &regdump_loc);
  269. if (status || !regdump_loc) {
  270. ath6kl_err("failed to get ptr to register dump area\n");
  271. return;
  272. }
  273. ath6kl_dbg(ATH6KL_DBG_TRC, "location of register dump data: 0x%X\n",
  274. regdump_loc);
  275. regdump_loc = TARG_VTOP(ar->target_type, regdump_loc);
  276. /* fetch register dump data */
  277. status = ath6kl_diag_read(ar, regdump_loc, (u8 *)&regdump_val[0],
  278. REG_DUMP_COUNT_AR6003 * (sizeof(u32)));
  279. if (status) {
  280. ath6kl_err("failed to get register dump\n");
  281. return;
  282. }
  283. ath6kl_dbg(ATH6KL_DBG_TRC, "Register Dump:\n");
  284. for (i = 0; i < REG_DUMP_COUNT_AR6003; i++)
  285. ath6kl_dbg(ATH6KL_DBG_TRC, " %d : 0x%8.8X\n",
  286. i, regdump_val[i]);
  287. }
  288. void ath6kl_target_failure(struct ath6kl *ar)
  289. {
  290. ath6kl_err("target asserted\n");
  291. /* try dumping target assertion information (if any) */
  292. ath6kl_dump_target_assert_info(ar);
  293. }
  294. static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
  295. {
  296. int status = 0;
  297. int ret;
  298. /*
  299. * Configure the device for rx dot11 header rules. "0,0" are the
  300. * default values. Required if checksum offload is needed. Set
  301. * RxMetaVersion to 2.
  302. */
  303. if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
  304. ar->rx_meta_ver, 0, 0)) {
  305. ath6kl_err("unable to set the rx frame format\n");
  306. status = -EIO;
  307. }
  308. if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
  309. if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
  310. IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
  311. ath6kl_err("unable to set power save fail event policy\n");
  312. status = -EIO;
  313. }
  314. if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
  315. if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
  316. WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
  317. ath6kl_err("unable to set barker preamble policy\n");
  318. status = -EIO;
  319. }
  320. if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
  321. WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
  322. ath6kl_err("unable to set keep alive interval\n");
  323. status = -EIO;
  324. }
  325. if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
  326. WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
  327. ath6kl_err("unable to set disconnect timeout\n");
  328. status = -EIO;
  329. }
  330. if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
  331. if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) {
  332. ath6kl_err("unable to set txop bursting\n");
  333. status = -EIO;
  334. }
  335. /*
  336. * FIXME: Make sure p2p configurations are not applied to
  337. * non-p2p capable interfaces when multivif support is enabled.
  338. */
  339. if (ar->p2p) {
  340. ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
  341. P2P_FLAG_CAPABILITIES_REQ |
  342. P2P_FLAG_MACADDR_REQ |
  343. P2P_FLAG_HMODEL_REQ);
  344. if (ret) {
  345. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
  346. "capabilities (%d) - assuming P2P not "
  347. "supported\n", ret);
  348. ar->p2p = 0;
  349. }
  350. }
  351. /*
  352. * FIXME: Make sure p2p configurations are not applied to
  353. * non-p2p capable interfaces when multivif support is enabled.
  354. */
  355. if (ar->p2p) {
  356. /* Enable Probe Request reporting for P2P */
  357. ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
  358. if (ret) {
  359. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
  360. "Request reporting (%d)\n", ret);
  361. }
  362. }
  363. return status;
  364. }
  365. int ath6kl_configure_target(struct ath6kl *ar)
  366. {
  367. u32 param, ram_reserved_size;
  368. u8 fw_iftype, fw_mode = 0, fw_submode = 0;
  369. int i;
  370. /*
  371. * Note: Even though the firmware interface type is
  372. * chosen as BSS_STA for all three interfaces, can
  373. * be configured to IBSS/AP as long as the fw submode
  374. * remains normal mode (0 - AP, STA and IBSS). But
  375. * due to an target assert in firmware only one interface is
  376. * configured for now.
  377. */
  378. fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
  379. for (i = 0; i < MAX_NUM_VIF; i++)
  380. fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
  381. /*
  382. * By default, submodes :
  383. * vif[0] - AP/STA/IBSS
  384. * vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
  385. * vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
  386. */
  387. for (i = 0; i < ar->max_norm_iface; i++)
  388. fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
  389. (i * HI_OPTION_FW_SUBMODE_BITS);
  390. for (i = ar->max_norm_iface; i < MAX_NUM_VIF; i++)
  391. fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
  392. (i * HI_OPTION_FW_SUBMODE_BITS);
  393. /*
  394. * FIXME: This needs to be removed once the multivif
  395. * support is enabled.
  396. */
  397. if (ar->p2p)
  398. fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
  399. param = HTC_PROTOCOL_VERSION;
  400. if (ath6kl_bmi_write(ar,
  401. ath6kl_get_hi_item_addr(ar,
  402. HI_ITEM(hi_app_host_interest)),
  403. (u8 *)&param, 4) != 0) {
  404. ath6kl_err("bmi_write_memory for htc version failed\n");
  405. return -EIO;
  406. }
  407. /* set the firmware mode to STA/IBSS/AP */
  408. param = 0;
  409. if (ath6kl_bmi_read(ar,
  410. ath6kl_get_hi_item_addr(ar,
  411. HI_ITEM(hi_option_flag)),
  412. (u8 *)&param, 4) != 0) {
  413. ath6kl_err("bmi_read_memory for setting fwmode failed\n");
  414. return -EIO;
  415. }
  416. param |= (MAX_NUM_VIF << HI_OPTION_NUM_DEV_SHIFT);
  417. param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
  418. param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
  419. param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  420. param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  421. if (ath6kl_bmi_write(ar,
  422. ath6kl_get_hi_item_addr(ar,
  423. HI_ITEM(hi_option_flag)),
  424. (u8 *)&param,
  425. 4) != 0) {
  426. ath6kl_err("bmi_write_memory for setting fwmode failed\n");
  427. return -EIO;
  428. }
  429. ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
  430. /*
  431. * Hardcode the address use for the extended board data
  432. * Ideally this should be pre-allocate by the OS at boot time
  433. * But since it is a new feature and board data is loaded
  434. * at init time, we have to workaround this from host.
  435. * It is difficult to patch the firmware boot code,
  436. * but possible in theory.
  437. */
  438. param = ar->hw.board_ext_data_addr;
  439. ram_reserved_size = ar->hw.reserved_ram_size;
  440. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  441. HI_ITEM(hi_board_ext_data)),
  442. (u8 *)&param, 4) != 0) {
  443. ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
  444. return -EIO;
  445. }
  446. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  447. HI_ITEM(hi_end_ram_reserve_sz)),
  448. (u8 *)&ram_reserved_size, 4) != 0) {
  449. ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
  450. return -EIO;
  451. }
  452. /* set the block size for the target */
  453. if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
  454. /* use default number of control buffers */
  455. return -EIO;
  456. return 0;
  457. }
  458. void ath6kl_core_free(struct ath6kl *ar)
  459. {
  460. wiphy_free(ar->wiphy);
  461. }
  462. void ath6kl_core_cleanup(struct ath6kl *ar)
  463. {
  464. destroy_workqueue(ar->ath6kl_wq);
  465. if (ar->htc_target)
  466. ath6kl_htc_cleanup(ar->htc_target);
  467. ath6kl_cookie_cleanup(ar);
  468. ath6kl_cleanup_amsdu_rxbufs(ar);
  469. ath6kl_bmi_cleanup(ar);
  470. ath6kl_debug_cleanup(ar);
  471. kfree(ar->fw_board);
  472. kfree(ar->fw_otp);
  473. kfree(ar->fw);
  474. kfree(ar->fw_patch);
  475. ath6kl_deinit_ieee80211_hw(ar);
  476. }
  477. /* firmware upload */
  478. static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
  479. u8 **fw, size_t *fw_len)
  480. {
  481. const struct firmware *fw_entry;
  482. int ret;
  483. ret = request_firmware(&fw_entry, filename, ar->dev);
  484. if (ret)
  485. return ret;
  486. *fw_len = fw_entry->size;
  487. *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
  488. if (*fw == NULL)
  489. ret = -ENOMEM;
  490. release_firmware(fw_entry);
  491. return ret;
  492. }
  493. #ifdef CONFIG_OF
  494. static const char *get_target_ver_dir(const struct ath6kl *ar)
  495. {
  496. switch (ar->version.target_ver) {
  497. case AR6003_REV1_VERSION:
  498. return "ath6k/AR6003/hw1.0";
  499. case AR6003_REV2_VERSION:
  500. return "ath6k/AR6003/hw2.0";
  501. case AR6003_REV3_VERSION:
  502. return "ath6k/AR6003/hw2.1.1";
  503. }
  504. ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__,
  505. ar->version.target_ver);
  506. return NULL;
  507. }
  508. /*
  509. * Check the device tree for a board-id and use it to construct
  510. * the pathname to the firmware file. Used (for now) to find a
  511. * fallback to the "bdata.bin" file--typically a symlink to the
  512. * appropriate board-specific file.
  513. */
  514. static bool check_device_tree(struct ath6kl *ar)
  515. {
  516. static const char *board_id_prop = "atheros,board-id";
  517. struct device_node *node;
  518. char board_filename[64];
  519. const char *board_id;
  520. int ret;
  521. for_each_compatible_node(node, NULL, "atheros,ath6kl") {
  522. board_id = of_get_property(node, board_id_prop, NULL);
  523. if (board_id == NULL) {
  524. ath6kl_warn("No \"%s\" property on %s node.\n",
  525. board_id_prop, node->name);
  526. continue;
  527. }
  528. snprintf(board_filename, sizeof(board_filename),
  529. "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id);
  530. ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
  531. &ar->fw_board_len);
  532. if (ret) {
  533. ath6kl_err("Failed to get DT board file %s: %d\n",
  534. board_filename, ret);
  535. continue;
  536. }
  537. return true;
  538. }
  539. return false;
  540. }
  541. #else
  542. static bool check_device_tree(struct ath6kl *ar)
  543. {
  544. return false;
  545. }
  546. #endif /* CONFIG_OF */
  547. static int ath6kl_fetch_board_file(struct ath6kl *ar)
  548. {
  549. const char *filename;
  550. int ret;
  551. if (ar->fw_board != NULL)
  552. return 0;
  553. switch (ar->version.target_ver) {
  554. case AR6003_REV2_VERSION:
  555. filename = AR6003_REV2_BOARD_DATA_FILE;
  556. break;
  557. case AR6004_REV1_VERSION:
  558. filename = AR6004_REV1_BOARD_DATA_FILE;
  559. break;
  560. default:
  561. filename = AR6003_REV3_BOARD_DATA_FILE;
  562. break;
  563. }
  564. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  565. &ar->fw_board_len);
  566. if (ret == 0) {
  567. /* managed to get proper board file */
  568. return 0;
  569. }
  570. if (check_device_tree(ar)) {
  571. /* got board file from device tree */
  572. return 0;
  573. }
  574. /* there was no proper board file, try to use default instead */
  575. ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
  576. filename, ret);
  577. switch (ar->version.target_ver) {
  578. case AR6003_REV2_VERSION:
  579. filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE;
  580. break;
  581. case AR6004_REV1_VERSION:
  582. filename = AR6004_REV1_DEFAULT_BOARD_DATA_FILE;
  583. break;
  584. default:
  585. filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE;
  586. break;
  587. }
  588. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  589. &ar->fw_board_len);
  590. if (ret) {
  591. ath6kl_err("Failed to get default board file %s: %d\n",
  592. filename, ret);
  593. return ret;
  594. }
  595. ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
  596. ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
  597. return 0;
  598. }
  599. static int ath6kl_fetch_otp_file(struct ath6kl *ar)
  600. {
  601. const char *filename;
  602. int ret;
  603. if (ar->fw_otp != NULL)
  604. return 0;
  605. switch (ar->version.target_ver) {
  606. case AR6003_REV2_VERSION:
  607. filename = AR6003_REV2_OTP_FILE;
  608. break;
  609. case AR6004_REV1_VERSION:
  610. ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n");
  611. return 0;
  612. break;
  613. default:
  614. filename = AR6003_REV3_OTP_FILE;
  615. break;
  616. }
  617. ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
  618. &ar->fw_otp_len);
  619. if (ret) {
  620. ath6kl_err("Failed to get OTP file %s: %d\n",
  621. filename, ret);
  622. return ret;
  623. }
  624. return 0;
  625. }
  626. static int ath6kl_fetch_fw_file(struct ath6kl *ar)
  627. {
  628. const char *filename;
  629. int ret;
  630. if (ar->fw != NULL)
  631. return 0;
  632. if (testmode) {
  633. switch (ar->version.target_ver) {
  634. case AR6003_REV2_VERSION:
  635. filename = AR6003_REV2_TCMD_FIRMWARE_FILE;
  636. break;
  637. case AR6003_REV3_VERSION:
  638. filename = AR6003_REV3_TCMD_FIRMWARE_FILE;
  639. break;
  640. case AR6004_REV1_VERSION:
  641. ath6kl_warn("testmode not supported with ar6004\n");
  642. return -EOPNOTSUPP;
  643. default:
  644. ath6kl_warn("unknown target version: 0x%x\n",
  645. ar->version.target_ver);
  646. return -EINVAL;
  647. }
  648. set_bit(TESTMODE, &ar->flag);
  649. goto get_fw;
  650. }
  651. switch (ar->version.target_ver) {
  652. case AR6003_REV2_VERSION:
  653. filename = AR6003_REV2_FIRMWARE_FILE;
  654. break;
  655. case AR6004_REV1_VERSION:
  656. filename = AR6004_REV1_FIRMWARE_FILE;
  657. break;
  658. default:
  659. filename = AR6003_REV3_FIRMWARE_FILE;
  660. break;
  661. }
  662. get_fw:
  663. ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
  664. if (ret) {
  665. ath6kl_err("Failed to get firmware file %s: %d\n",
  666. filename, ret);
  667. return ret;
  668. }
  669. return 0;
  670. }
  671. static int ath6kl_fetch_patch_file(struct ath6kl *ar)
  672. {
  673. const char *filename;
  674. int ret;
  675. switch (ar->version.target_ver) {
  676. case AR6003_REV2_VERSION:
  677. filename = AR6003_REV2_PATCH_FILE;
  678. break;
  679. case AR6004_REV1_VERSION:
  680. /* FIXME: implement for AR6004 */
  681. return 0;
  682. break;
  683. default:
  684. filename = AR6003_REV3_PATCH_FILE;
  685. break;
  686. }
  687. if (ar->fw_patch == NULL) {
  688. ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
  689. &ar->fw_patch_len);
  690. if (ret) {
  691. ath6kl_err("Failed to get patch file %s: %d\n",
  692. filename, ret);
  693. return ret;
  694. }
  695. }
  696. return 0;
  697. }
  698. static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
  699. {
  700. int ret;
  701. ret = ath6kl_fetch_otp_file(ar);
  702. if (ret)
  703. return ret;
  704. ret = ath6kl_fetch_fw_file(ar);
  705. if (ret)
  706. return ret;
  707. ret = ath6kl_fetch_patch_file(ar);
  708. if (ret)
  709. return ret;
  710. return 0;
  711. }
  712. static int ath6kl_fetch_fw_api2(struct ath6kl *ar)
  713. {
  714. size_t magic_len, len, ie_len;
  715. const struct firmware *fw;
  716. struct ath6kl_fw_ie *hdr;
  717. const char *filename;
  718. const u8 *data;
  719. int ret, ie_id, i, index, bit;
  720. __le32 *val;
  721. switch (ar->version.target_ver) {
  722. case AR6003_REV2_VERSION:
  723. filename = AR6003_REV2_FIRMWARE_2_FILE;
  724. break;
  725. case AR6003_REV3_VERSION:
  726. filename = AR6003_REV3_FIRMWARE_2_FILE;
  727. break;
  728. case AR6004_REV1_VERSION:
  729. filename = AR6004_REV1_FIRMWARE_2_FILE;
  730. break;
  731. default:
  732. return -EOPNOTSUPP;
  733. }
  734. ret = request_firmware(&fw, filename, ar->dev);
  735. if (ret)
  736. return ret;
  737. data = fw->data;
  738. len = fw->size;
  739. /* magic also includes the null byte, check that as well */
  740. magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
  741. if (len < magic_len) {
  742. ret = -EINVAL;
  743. goto out;
  744. }
  745. if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
  746. ret = -EINVAL;
  747. goto out;
  748. }
  749. len -= magic_len;
  750. data += magic_len;
  751. /* loop elements */
  752. while (len > sizeof(struct ath6kl_fw_ie)) {
  753. /* hdr is unaligned! */
  754. hdr = (struct ath6kl_fw_ie *) data;
  755. ie_id = le32_to_cpup(&hdr->id);
  756. ie_len = le32_to_cpup(&hdr->len);
  757. len -= sizeof(*hdr);
  758. data += sizeof(*hdr);
  759. if (len < ie_len) {
  760. ret = -EINVAL;
  761. goto out;
  762. }
  763. switch (ie_id) {
  764. case ATH6KL_FW_IE_OTP_IMAGE:
  765. ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
  766. ie_len);
  767. ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
  768. if (ar->fw_otp == NULL) {
  769. ret = -ENOMEM;
  770. goto out;
  771. }
  772. ar->fw_otp_len = ie_len;
  773. break;
  774. case ATH6KL_FW_IE_FW_IMAGE:
  775. ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
  776. ie_len);
  777. ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
  778. if (ar->fw == NULL) {
  779. ret = -ENOMEM;
  780. goto out;
  781. }
  782. ar->fw_len = ie_len;
  783. break;
  784. case ATH6KL_FW_IE_PATCH_IMAGE:
  785. ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
  786. ie_len);
  787. ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
  788. if (ar->fw_patch == NULL) {
  789. ret = -ENOMEM;
  790. goto out;
  791. }
  792. ar->fw_patch_len = ie_len;
  793. break;
  794. case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
  795. val = (__le32 *) data;
  796. ar->hw.reserved_ram_size = le32_to_cpup(val);
  797. ath6kl_dbg(ATH6KL_DBG_BOOT,
  798. "found reserved ram size ie 0x%d\n",
  799. ar->hw.reserved_ram_size);
  800. break;
  801. case ATH6KL_FW_IE_CAPABILITIES:
  802. ath6kl_dbg(ATH6KL_DBG_BOOT,
  803. "found firmware capabilities ie (%zd B)\n",
  804. ie_len);
  805. for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
  806. index = ALIGN(i, 8) / 8;
  807. bit = i % 8;
  808. if (data[index] & (1 << bit))
  809. __set_bit(i, ar->fw_capabilities);
  810. }
  811. ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
  812. ar->fw_capabilities,
  813. sizeof(ar->fw_capabilities));
  814. break;
  815. case ATH6KL_FW_IE_PATCH_ADDR:
  816. if (ie_len != sizeof(*val))
  817. break;
  818. val = (__le32 *) data;
  819. ar->hw.dataset_patch_addr = le32_to_cpup(val);
  820. ath6kl_dbg(ATH6KL_DBG_BOOT,
  821. "found patch address ie 0x%d\n",
  822. ar->hw.dataset_patch_addr);
  823. break;
  824. default:
  825. ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
  826. le32_to_cpup(&hdr->id));
  827. break;
  828. }
  829. len -= ie_len;
  830. data += ie_len;
  831. };
  832. ret = 0;
  833. out:
  834. release_firmware(fw);
  835. return ret;
  836. }
  837. static int ath6kl_fetch_firmwares(struct ath6kl *ar)
  838. {
  839. int ret;
  840. ret = ath6kl_fetch_board_file(ar);
  841. if (ret)
  842. return ret;
  843. ret = ath6kl_fetch_fw_api2(ar);
  844. if (ret == 0) {
  845. ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n");
  846. return 0;
  847. }
  848. ret = ath6kl_fetch_fw_api1(ar);
  849. if (ret)
  850. return ret;
  851. ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n");
  852. return 0;
  853. }
  854. static int ath6kl_upload_board_file(struct ath6kl *ar)
  855. {
  856. u32 board_address, board_ext_address, param;
  857. u32 board_data_size, board_ext_data_size;
  858. int ret;
  859. if (WARN_ON(ar->fw_board == NULL))
  860. return -ENOENT;
  861. /*
  862. * Determine where in Target RAM to write Board Data.
  863. * For AR6004, host determine Target RAM address for
  864. * writing board data.
  865. */
  866. if (ar->target_type == TARGET_TYPE_AR6004) {
  867. board_address = AR6004_REV1_BOARD_DATA_ADDRESS;
  868. ath6kl_bmi_write(ar,
  869. ath6kl_get_hi_item_addr(ar,
  870. HI_ITEM(hi_board_data)),
  871. (u8 *) &board_address, 4);
  872. } else {
  873. ath6kl_bmi_read(ar,
  874. ath6kl_get_hi_item_addr(ar,
  875. HI_ITEM(hi_board_data)),
  876. (u8 *) &board_address, 4);
  877. }
  878. /* determine where in target ram to write extended board data */
  879. ath6kl_bmi_read(ar,
  880. ath6kl_get_hi_item_addr(ar,
  881. HI_ITEM(hi_board_ext_data)),
  882. (u8 *) &board_ext_address, 4);
  883. if (board_ext_address == 0) {
  884. ath6kl_err("Failed to get board file target address.\n");
  885. return -EINVAL;
  886. }
  887. switch (ar->target_type) {
  888. case TARGET_TYPE_AR6003:
  889. board_data_size = AR6003_BOARD_DATA_SZ;
  890. board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
  891. break;
  892. case TARGET_TYPE_AR6004:
  893. board_data_size = AR6004_BOARD_DATA_SZ;
  894. board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
  895. break;
  896. default:
  897. WARN_ON(1);
  898. return -EINVAL;
  899. break;
  900. }
  901. if (ar->fw_board_len == (board_data_size +
  902. board_ext_data_size)) {
  903. /* write extended board data */
  904. ath6kl_dbg(ATH6KL_DBG_BOOT,
  905. "writing extended board data to 0x%x (%d B)\n",
  906. board_ext_address, board_ext_data_size);
  907. ret = ath6kl_bmi_write(ar, board_ext_address,
  908. ar->fw_board + board_data_size,
  909. board_ext_data_size);
  910. if (ret) {
  911. ath6kl_err("Failed to write extended board data: %d\n",
  912. ret);
  913. return ret;
  914. }
  915. /* record that extended board data is initialized */
  916. param = (board_ext_data_size << 16) | 1;
  917. ath6kl_bmi_write(ar,
  918. ath6kl_get_hi_item_addr(ar,
  919. HI_ITEM(hi_board_ext_data_config)),
  920. (unsigned char *) &param, 4);
  921. }
  922. if (ar->fw_board_len < board_data_size) {
  923. ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
  924. ret = -EINVAL;
  925. return ret;
  926. }
  927. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
  928. board_address, board_data_size);
  929. ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
  930. board_data_size);
  931. if (ret) {
  932. ath6kl_err("Board file bmi write failed: %d\n", ret);
  933. return ret;
  934. }
  935. /* record the fact that Board Data IS initialized */
  936. param = 1;
  937. ath6kl_bmi_write(ar,
  938. ath6kl_get_hi_item_addr(ar,
  939. HI_ITEM(hi_board_data_initialized)),
  940. (u8 *)&param, 4);
  941. return ret;
  942. }
  943. static int ath6kl_upload_otp(struct ath6kl *ar)
  944. {
  945. u32 address, param;
  946. bool from_hw = false;
  947. int ret;
  948. if (WARN_ON(ar->fw_otp == NULL))
  949. return -ENOENT;
  950. address = ar->hw.app_load_addr;
  951. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
  952. ar->fw_otp_len);
  953. ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
  954. ar->fw_otp_len);
  955. if (ret) {
  956. ath6kl_err("Failed to upload OTP file: %d\n", ret);
  957. return ret;
  958. }
  959. /* read firmware start address */
  960. ret = ath6kl_bmi_read(ar,
  961. ath6kl_get_hi_item_addr(ar,
  962. HI_ITEM(hi_app_start)),
  963. (u8 *) &address, sizeof(address));
  964. if (ret) {
  965. ath6kl_err("Failed to read hi_app_start: %d\n", ret);
  966. return ret;
  967. }
  968. if (ar->hw.app_start_override_addr == 0) {
  969. ar->hw.app_start_override_addr = address;
  970. from_hw = true;
  971. }
  972. ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
  973. from_hw ? " (from hw)" : "",
  974. ar->hw.app_start_override_addr);
  975. /* execute the OTP code */
  976. ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
  977. ar->hw.app_start_override_addr);
  978. param = 0;
  979. ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
  980. return ret;
  981. }
  982. static int ath6kl_upload_firmware(struct ath6kl *ar)
  983. {
  984. u32 address;
  985. int ret;
  986. if (WARN_ON(ar->fw == NULL))
  987. return -ENOENT;
  988. address = ar->hw.app_load_addr;
  989. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
  990. address, ar->fw_len);
  991. ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
  992. if (ret) {
  993. ath6kl_err("Failed to write firmware: %d\n", ret);
  994. return ret;
  995. }
  996. /*
  997. * Set starting address for firmware
  998. * Don't need to setup app_start override addr on AR6004
  999. */
  1000. if (ar->target_type != TARGET_TYPE_AR6004) {
  1001. address = ar->hw.app_start_override_addr;
  1002. ath6kl_bmi_set_app_start(ar, address);
  1003. }
  1004. return ret;
  1005. }
  1006. static int ath6kl_upload_patch(struct ath6kl *ar)
  1007. {
  1008. u32 address, param;
  1009. int ret;
  1010. if (WARN_ON(ar->fw_patch == NULL))
  1011. return -ENOENT;
  1012. address = ar->hw.dataset_patch_addr;
  1013. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
  1014. address, ar->fw_patch_len);
  1015. ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
  1016. if (ret) {
  1017. ath6kl_err("Failed to write patch file: %d\n", ret);
  1018. return ret;
  1019. }
  1020. param = address;
  1021. ath6kl_bmi_write(ar,
  1022. ath6kl_get_hi_item_addr(ar,
  1023. HI_ITEM(hi_dset_list_head)),
  1024. (unsigned char *) &param, 4);
  1025. return 0;
  1026. }
  1027. static int ath6kl_init_upload(struct ath6kl *ar)
  1028. {
  1029. u32 param, options, sleep, address;
  1030. int status = 0;
  1031. if (ar->target_type != TARGET_TYPE_AR6003 &&
  1032. ar->target_type != TARGET_TYPE_AR6004)
  1033. return -EINVAL;
  1034. /* temporarily disable system sleep */
  1035. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  1036. status = ath6kl_bmi_reg_read(ar, address, &param);
  1037. if (status)
  1038. return status;
  1039. options = param;
  1040. param |= ATH6KL_OPTION_SLEEP_DISABLE;
  1041. status = ath6kl_bmi_reg_write(ar, address, param);
  1042. if (status)
  1043. return status;
  1044. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  1045. status = ath6kl_bmi_reg_read(ar, address, &param);
  1046. if (status)
  1047. return status;
  1048. sleep = param;
  1049. param |= SM(SYSTEM_SLEEP_DISABLE, 1);
  1050. status = ath6kl_bmi_reg_write(ar, address, param);
  1051. if (status)
  1052. return status;
  1053. ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
  1054. options, sleep);
  1055. /* program analog PLL register */
  1056. /* no need to control 40/44MHz clock on AR6004 */
  1057. if (ar->target_type != TARGET_TYPE_AR6004) {
  1058. status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
  1059. 0xF9104001);
  1060. if (status)
  1061. return status;
  1062. /* Run at 80/88MHz by default */
  1063. param = SM(CPU_CLOCK_STANDARD, 1);
  1064. address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
  1065. status = ath6kl_bmi_reg_write(ar, address, param);
  1066. if (status)
  1067. return status;
  1068. }
  1069. param = 0;
  1070. address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
  1071. param = SM(LPO_CAL_ENABLE, 1);
  1072. status = ath6kl_bmi_reg_write(ar, address, param);
  1073. if (status)
  1074. return status;
  1075. /* WAR to avoid SDIO CRC err */
  1076. if (ar->version.target_ver == AR6003_REV2_VERSION) {
  1077. ath6kl_err("temporary war to avoid sdio crc error\n");
  1078. param = 0x20;
  1079. address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
  1080. status = ath6kl_bmi_reg_write(ar, address, param);
  1081. if (status)
  1082. return status;
  1083. address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
  1084. status = ath6kl_bmi_reg_write(ar, address, param);
  1085. if (status)
  1086. return status;
  1087. address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
  1088. status = ath6kl_bmi_reg_write(ar, address, param);
  1089. if (status)
  1090. return status;
  1091. address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
  1092. status = ath6kl_bmi_reg_write(ar, address, param);
  1093. if (status)
  1094. return status;
  1095. }
  1096. /* write EEPROM data to Target RAM */
  1097. status = ath6kl_upload_board_file(ar);
  1098. if (status)
  1099. return status;
  1100. /* transfer One time Programmable data */
  1101. status = ath6kl_upload_otp(ar);
  1102. if (status)
  1103. return status;
  1104. /* Download Target firmware */
  1105. status = ath6kl_upload_firmware(ar);
  1106. if (status)
  1107. return status;
  1108. status = ath6kl_upload_patch(ar);
  1109. if (status)
  1110. return status;
  1111. /* Restore system sleep */
  1112. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  1113. status = ath6kl_bmi_reg_write(ar, address, sleep);
  1114. if (status)
  1115. return status;
  1116. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  1117. param = options | 0x20;
  1118. status = ath6kl_bmi_reg_write(ar, address, param);
  1119. if (status)
  1120. return status;
  1121. /* Configure GPIO AR6003 UART */
  1122. param = CONFIG_AR600x_DEBUG_UART_TX_PIN;
  1123. status = ath6kl_bmi_write(ar,
  1124. ath6kl_get_hi_item_addr(ar,
  1125. HI_ITEM(hi_dbg_uart_txpin)),
  1126. (u8 *)&param, 4);
  1127. return status;
  1128. }
  1129. static int ath6kl_init_hw_params(struct ath6kl *ar)
  1130. {
  1131. switch (ar->version.target_ver) {
  1132. case AR6003_REV2_VERSION:
  1133. ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS;
  1134. ar->hw.app_load_addr = AR6003_REV2_APP_LOAD_ADDRESS;
  1135. ar->hw.board_ext_data_addr = AR6003_REV2_BOARD_EXT_DATA_ADDRESS;
  1136. ar->hw.reserved_ram_size = AR6003_REV2_RAM_RESERVE_SIZE;
  1137. /* hw2.0 needs override address hardcoded */
  1138. ar->hw.app_start_override_addr = 0x944C00;
  1139. break;
  1140. case AR6003_REV3_VERSION:
  1141. ar->hw.dataset_patch_addr = AR6003_REV3_DATASET_PATCH_ADDRESS;
  1142. ar->hw.app_load_addr = 0x1234;
  1143. ar->hw.board_ext_data_addr = AR6003_REV3_BOARD_EXT_DATA_ADDRESS;
  1144. ar->hw.reserved_ram_size = AR6003_REV3_RAM_RESERVE_SIZE;
  1145. break;
  1146. case AR6004_REV1_VERSION:
  1147. ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS;
  1148. ar->hw.app_load_addr = AR6003_REV3_APP_LOAD_ADDRESS;
  1149. ar->hw.board_ext_data_addr = AR6004_REV1_BOARD_EXT_DATA_ADDRESS;
  1150. ar->hw.reserved_ram_size = AR6004_REV1_RAM_RESERVE_SIZE;
  1151. break;
  1152. default:
  1153. ath6kl_err("Unsupported hardware version: 0x%x\n",
  1154. ar->version.target_ver);
  1155. return -EINVAL;
  1156. }
  1157. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1158. "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
  1159. ar->version.target_ver, ar->target_type,
  1160. ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
  1161. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1162. "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
  1163. ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
  1164. ar->hw.reserved_ram_size);
  1165. return 0;
  1166. }
  1167. static int ath6kl_init(struct ath6kl *ar)
  1168. {
  1169. int status = 0;
  1170. s32 timeleft;
  1171. struct net_device *ndev;
  1172. int i;
  1173. if (!ar)
  1174. return -EIO;
  1175. /* Do we need to finish the BMI phase */
  1176. if (ath6kl_bmi_done(ar)) {
  1177. status = -EIO;
  1178. goto ath6kl_init_done;
  1179. }
  1180. /* Indicate that WMI is enabled (although not ready yet) */
  1181. set_bit(WMI_ENABLED, &ar->flag);
  1182. ar->wmi = ath6kl_wmi_init(ar);
  1183. if (!ar->wmi) {
  1184. ath6kl_err("failed to initialize wmi\n");
  1185. status = -EIO;
  1186. goto ath6kl_init_done;
  1187. }
  1188. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
  1189. status = ath6kl_register_ieee80211_hw(ar);
  1190. if (status)
  1191. goto err_node_cleanup;
  1192. status = ath6kl_debug_init(ar);
  1193. if (status) {
  1194. wiphy_unregister(ar->wiphy);
  1195. goto err_node_cleanup;
  1196. }
  1197. for (i = 0; i < MAX_NUM_VIF; i++)
  1198. ar->avail_idx_map |= BIT(i);
  1199. rtnl_lock();
  1200. /* Add an initial station interface */
  1201. ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0,
  1202. INFRA_NETWORK);
  1203. rtnl_unlock();
  1204. if (!ndev) {
  1205. ath6kl_err("Failed to instantiate a network device\n");
  1206. status = -ENOMEM;
  1207. wiphy_unregister(ar->wiphy);
  1208. goto err_debug_init;
  1209. }
  1210. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
  1211. __func__, ndev->name, ndev, ar);
  1212. /*
  1213. * The reason we have to wait for the target here is that the
  1214. * driver layer has to init BMI in order to set the host block
  1215. * size.
  1216. */
  1217. if (ath6kl_htc_wait_target(ar->htc_target)) {
  1218. status = -EIO;
  1219. goto err_if_deinit;
  1220. }
  1221. if (ath6kl_init_service_ep(ar)) {
  1222. status = -EIO;
  1223. goto err_cleanup_scatter;
  1224. }
  1225. /* setup access class priority mappings */
  1226. ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */
  1227. ar->ac_stream_pri_map[WMM_AC_BE] = 1;
  1228. ar->ac_stream_pri_map[WMM_AC_VI] = 2;
  1229. ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
  1230. /* give our connected endpoints some buffers */
  1231. ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
  1232. ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
  1233. /* allocate some buffers that handle larger AMSDU frames */
  1234. ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
  1235. /* setup credit distribution */
  1236. ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info);
  1237. ath6kl_cookie_init(ar);
  1238. /* start HTC */
  1239. status = ath6kl_htc_start(ar->htc_target);
  1240. if (status) {
  1241. ath6kl_cookie_cleanup(ar);
  1242. goto err_rxbuf_cleanup;
  1243. }
  1244. /* Wait for Wmi event to be ready */
  1245. timeleft = wait_event_interruptible_timeout(ar->event_wq,
  1246. test_bit(WMI_READY,
  1247. &ar->flag),
  1248. WMI_TIMEOUT);
  1249. ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
  1250. if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
  1251. ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
  1252. ATH6KL_ABI_VERSION, ar->version.abi_ver);
  1253. status = -EIO;
  1254. goto err_htc_stop;
  1255. }
  1256. if (!timeleft || signal_pending(current)) {
  1257. ath6kl_err("wmi is not ready or wait was interrupted\n");
  1258. status = -EIO;
  1259. goto err_htc_stop;
  1260. }
  1261. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
  1262. /* communicate the wmi protocol verision to the target */
  1263. if ((ath6kl_set_host_app_area(ar)) != 0)
  1264. ath6kl_err("unable to set the host app area\n");
  1265. ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
  1266. ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
  1267. ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM |
  1268. WIPHY_FLAG_HAVE_AP_SME;
  1269. for (i = 0; i < MAX_NUM_VIF; i++) {
  1270. status = ath6kl_target_config_wlan_params(ar, i);
  1271. if (status)
  1272. goto err_htc_stop;
  1273. }
  1274. /*
  1275. * Set mac address which is received in ready event
  1276. * FIXME: Move to ath6kl_interface_add()
  1277. */
  1278. memcpy(ndev->dev_addr, ar->mac_addr, ETH_ALEN);
  1279. return status;
  1280. err_htc_stop:
  1281. ath6kl_htc_stop(ar->htc_target);
  1282. err_rxbuf_cleanup:
  1283. ath6kl_htc_flush_rx_buf(ar->htc_target);
  1284. ath6kl_cleanup_amsdu_rxbufs(ar);
  1285. err_cleanup_scatter:
  1286. ath6kl_hif_cleanup_scatter(ar);
  1287. err_if_deinit:
  1288. rtnl_lock();
  1289. ath6kl_deinit_if_data(netdev_priv(ndev));
  1290. rtnl_unlock();
  1291. wiphy_unregister(ar->wiphy);
  1292. err_debug_init:
  1293. ath6kl_debug_cleanup(ar);
  1294. err_node_cleanup:
  1295. ath6kl_wmi_shutdown(ar->wmi);
  1296. clear_bit(WMI_ENABLED, &ar->flag);
  1297. ar->wmi = NULL;
  1298. ath6kl_init_done:
  1299. return status;
  1300. }
  1301. int ath6kl_core_init(struct ath6kl *ar)
  1302. {
  1303. int ret = 0;
  1304. struct ath6kl_bmi_target_info targ_info;
  1305. ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
  1306. if (!ar->ath6kl_wq)
  1307. return -ENOMEM;
  1308. ret = ath6kl_bmi_init(ar);
  1309. if (ret)
  1310. goto err_wq;
  1311. ret = ath6kl_bmi_get_target_info(ar, &targ_info);
  1312. if (ret)
  1313. goto err_bmi_cleanup;
  1314. ar->version.target_ver = le32_to_cpu(targ_info.version);
  1315. ar->target_type = le32_to_cpu(targ_info.type);
  1316. ar->wiphy->hw_version = le32_to_cpu(targ_info.version);
  1317. ret = ath6kl_init_hw_params(ar);
  1318. if (ret)
  1319. goto err_bmi_cleanup;
  1320. ret = ath6kl_configure_target(ar);
  1321. if (ret)
  1322. goto err_bmi_cleanup;
  1323. ar->htc_target = ath6kl_htc_create(ar);
  1324. if (!ar->htc_target) {
  1325. ret = -ENOMEM;
  1326. goto err_bmi_cleanup;
  1327. }
  1328. ret = ath6kl_fetch_firmwares(ar);
  1329. if (ret)
  1330. goto err_htc_cleanup;
  1331. ret = ath6kl_init_upload(ar);
  1332. if (ret)
  1333. goto err_htc_cleanup;
  1334. ret = ath6kl_init(ar);
  1335. if (ret)
  1336. goto err_htc_cleanup;
  1337. return ret;
  1338. err_htc_cleanup:
  1339. ath6kl_htc_cleanup(ar->htc_target);
  1340. err_bmi_cleanup:
  1341. ath6kl_bmi_cleanup(ar);
  1342. err_wq:
  1343. destroy_workqueue(ar->ath6kl_wq);
  1344. return ret;
  1345. }
  1346. void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready)
  1347. {
  1348. static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
  1349. bool discon_issued;
  1350. netif_stop_queue(vif->ndev);
  1351. clear_bit(WLAN_ENABLED, &vif->flags);
  1352. if (wmi_ready) {
  1353. discon_issued = test_bit(CONNECTED, &vif->flags) ||
  1354. test_bit(CONNECT_PEND, &vif->flags);
  1355. ath6kl_disconnect(vif);
  1356. del_timer(&vif->disconnect_timer);
  1357. if (discon_issued)
  1358. ath6kl_disconnect_event(vif, DISCONNECT_CMD,
  1359. (vif->nw_type & AP_NETWORK) ?
  1360. bcast_mac : vif->bssid,
  1361. 0, NULL, 0);
  1362. }
  1363. if (vif->scan_req) {
  1364. cfg80211_scan_done(vif->scan_req, true);
  1365. vif->scan_req = NULL;
  1366. }
  1367. }
  1368. void ath6kl_stop_txrx(struct ath6kl *ar)
  1369. {
  1370. struct ath6kl_vif *vif, *tmp_vif;
  1371. set_bit(DESTROY_IN_PROGRESS, &ar->flag);
  1372. if (down_interruptible(&ar->sem)) {
  1373. ath6kl_err("down_interruptible failed\n");
  1374. return;
  1375. }
  1376. spin_lock(&ar->list_lock);
  1377. list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
  1378. list_del(&vif->list);
  1379. spin_unlock(&ar->list_lock);
  1380. ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag));
  1381. rtnl_lock();
  1382. ath6kl_deinit_if_data(vif);
  1383. rtnl_unlock();
  1384. spin_lock(&ar->list_lock);
  1385. }
  1386. spin_unlock(&ar->list_lock);
  1387. clear_bit(WMI_READY, &ar->flag);
  1388. /*
  1389. * After wmi_shudown all WMI events will be dropped. We
  1390. * need to cleanup the buffers allocated in AP mode and
  1391. * give disconnect notification to stack, which usually
  1392. * happens in the disconnect_event. Simulate the disconnect
  1393. * event by calling the function directly. Sometimes
  1394. * disconnect_event will be received when the debug logs
  1395. * are collected.
  1396. */
  1397. ath6kl_wmi_shutdown(ar->wmi);
  1398. clear_bit(WMI_ENABLED, &ar->flag);
  1399. if (ar->htc_target) {
  1400. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
  1401. ath6kl_htc_stop(ar->htc_target);
  1402. }
  1403. /*
  1404. * Try to reset the device if we can. The driver may have been
  1405. * configure NOT to reset the target during a debug session.
  1406. */
  1407. ath6kl_dbg(ATH6KL_DBG_TRC,
  1408. "attempting to reset target on instance destroy\n");
  1409. ath6kl_reset_device(ar, ar->target_type, true, true);
  1410. clear_bit(WLAN_ENABLED, &ar->flag);
  1411. }