mptbase.c 178 KB

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  1. /*
  2. * linux/drivers/message/fusion/mptbase.c
  3. * This is the Fusion MPT base driver which supports multiple
  4. * (SCSI + LAN) specialized protocol drivers.
  5. * For use with LSI Logic PCI chip/adapter(s)
  6. * running LSI Logic Fusion MPT (Message Passing Technology) firmware.
  7. *
  8. * Copyright (c) 1999-2005 LSI Logic Corporation
  9. * (mailto:mpt_linux_developer@lsil.com)
  10. *
  11. */
  12. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  13. /*
  14. This program is free software; you can redistribute it and/or modify
  15. it under the terms of the GNU General Public License as published by
  16. the Free Software Foundation; version 2 of the License.
  17. This program is distributed in the hope that it will be useful,
  18. but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. GNU General Public License for more details.
  21. NO WARRANTY
  22. THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  23. CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  24. LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  25. MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  26. solely responsible for determining the appropriateness of using and
  27. distributing the Program and assumes all risks associated with its
  28. exercise of rights under this Agreement, including but not limited to
  29. the risks and costs of program errors, damage to or loss of data,
  30. programs or equipment, and unavailability or interruption of operations.
  31. DISCLAIMER OF LIABILITY
  32. NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  33. DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  34. DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  35. ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  36. TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  37. USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  38. HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  39. You should have received a copy of the GNU General Public License
  40. along with this program; if not, write to the Free Software
  41. Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  42. */
  43. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  44. #include <linux/config.h>
  45. #include <linux/kernel.h>
  46. #include <linux/module.h>
  47. #include <linux/errno.h>
  48. #include <linux/init.h>
  49. #include <linux/slab.h>
  50. #include <linux/types.h>
  51. #include <linux/pci.h>
  52. #include <linux/kdev_t.h>
  53. #include <linux/blkdev.h>
  54. #include <linux/delay.h>
  55. #include <linux/interrupt.h> /* needed for in_interrupt() proto */
  56. #include <linux/dma-mapping.h>
  57. #include <asm/io.h>
  58. #ifdef CONFIG_MTRR
  59. #include <asm/mtrr.h>
  60. #endif
  61. #ifdef __sparc__
  62. #include <asm/irq.h> /* needed for __irq_itoa() proto */
  63. #endif
  64. #include "mptbase.h"
  65. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  66. #define my_NAME "Fusion MPT base driver"
  67. #define my_VERSION MPT_LINUX_VERSION_COMMON
  68. #define MYNAM "mptbase"
  69. MODULE_AUTHOR(MODULEAUTHOR);
  70. MODULE_DESCRIPTION(my_NAME);
  71. MODULE_LICENSE("GPL");
  72. /*
  73. * cmd line parameters
  74. */
  75. #ifdef MFCNT
  76. static int mfcounter = 0;
  77. #define PRINT_MF_COUNT 20000
  78. #endif
  79. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  80. /*
  81. * Public data...
  82. */
  83. int mpt_lan_index = -1;
  84. int mpt_stm_index = -1;
  85. struct proc_dir_entry *mpt_proc_root_dir;
  86. #define WHOINIT_UNKNOWN 0xAA
  87. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  88. /*
  89. * Private data...
  90. */
  91. /* Adapter link list */
  92. LIST_HEAD(ioc_list);
  93. /* Callback lookup table */
  94. static MPT_CALLBACK MptCallbacks[MPT_MAX_PROTOCOL_DRIVERS];
  95. /* Protocol driver class lookup table */
  96. static int MptDriverClass[MPT_MAX_PROTOCOL_DRIVERS];
  97. /* Event handler lookup table */
  98. static MPT_EVHANDLER MptEvHandlers[MPT_MAX_PROTOCOL_DRIVERS];
  99. /* Reset handler lookup table */
  100. static MPT_RESETHANDLER MptResetHandlers[MPT_MAX_PROTOCOL_DRIVERS];
  101. static struct mpt_pci_driver *MptDeviceDriverHandlers[MPT_MAX_PROTOCOL_DRIVERS];
  102. static int mpt_base_index = -1;
  103. static int last_drv_idx = -1;
  104. static DECLARE_WAIT_QUEUE_HEAD(mpt_waitq);
  105. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  106. /*
  107. * Forward protos...
  108. */
  109. static irqreturn_t mpt_interrupt(int irq, void *bus_id, struct pt_regs *r);
  110. static int mpt_base_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req, MPT_FRAME_HDR *reply);
  111. static int mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes,
  112. u32 *req, int replyBytes, u16 *u16reply, int maxwait,
  113. int sleepFlag);
  114. static int mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag);
  115. static void mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev);
  116. static void mpt_adapter_disable(MPT_ADAPTER *ioc);
  117. static void mpt_adapter_dispose(MPT_ADAPTER *ioc);
  118. static void MptDisplayIocCapabilities(MPT_ADAPTER *ioc);
  119. static int MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag);
  120. static int GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason);
  121. static int GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
  122. static int SendIocInit(MPT_ADAPTER *ioc, int sleepFlag);
  123. static int SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
  124. static int mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag);
  125. static int mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag);
  126. static int mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
  127. static int KickStart(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
  128. static int SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag);
  129. static int PrimeIocFifos(MPT_ADAPTER *ioc);
  130. static int WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
  131. static int WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
  132. static int WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
  133. static int GetLanConfigPages(MPT_ADAPTER *ioc);
  134. static int GetFcPortPage0(MPT_ADAPTER *ioc, int portnum);
  135. static int GetIoUnitPage2(MPT_ADAPTER *ioc);
  136. int mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode);
  137. static int mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum);
  138. static int mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum);
  139. static void mpt_read_ioc_pg_1(MPT_ADAPTER *ioc);
  140. static void mpt_read_ioc_pg_4(MPT_ADAPTER *ioc);
  141. static void mpt_timer_expired(unsigned long data);
  142. static int SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch);
  143. static int SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp);
  144. static int mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag);
  145. static int mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init);
  146. #ifdef CONFIG_PROC_FS
  147. static int procmpt_summary_read(char *buf, char **start, off_t offset,
  148. int request, int *eof, void *data);
  149. static int procmpt_version_read(char *buf, char **start, off_t offset,
  150. int request, int *eof, void *data);
  151. static int procmpt_iocinfo_read(char *buf, char **start, off_t offset,
  152. int request, int *eof, void *data);
  153. #endif
  154. static void mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc);
  155. //int mpt_HardResetHandler(MPT_ADAPTER *ioc, int sleepFlag);
  156. static int ProcessEventNotification(MPT_ADAPTER *ioc, EventNotificationReply_t *evReply, int *evHandlers);
  157. static void mpt_sp_ioc_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf);
  158. static void mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info);
  159. static void mpt_sp_log_info(MPT_ADAPTER *ioc, u32 log_info);
  160. static void mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info);
  161. /* module entry point */
  162. static int __init fusion_init (void);
  163. static void __exit fusion_exit (void);
  164. #define CHIPREG_READ32(addr) readl_relaxed(addr)
  165. #define CHIPREG_READ32_dmasync(addr) readl(addr)
  166. #define CHIPREG_WRITE32(addr,val) writel(val, addr)
  167. #define CHIPREG_PIO_WRITE32(addr,val) outl(val, (unsigned long)addr)
  168. #define CHIPREG_PIO_READ32(addr) inl((unsigned long)addr)
  169. static void
  170. pci_disable_io_access(struct pci_dev *pdev)
  171. {
  172. u16 command_reg;
  173. pci_read_config_word(pdev, PCI_COMMAND, &command_reg);
  174. command_reg &= ~1;
  175. pci_write_config_word(pdev, PCI_COMMAND, command_reg);
  176. }
  177. static void
  178. pci_enable_io_access(struct pci_dev *pdev)
  179. {
  180. u16 command_reg;
  181. pci_read_config_word(pdev, PCI_COMMAND, &command_reg);
  182. command_reg |= 1;
  183. pci_write_config_word(pdev, PCI_COMMAND, command_reg);
  184. }
  185. /*
  186. * Process turbo (context) reply...
  187. */
  188. static void
  189. mpt_turbo_reply(MPT_ADAPTER *ioc, u32 pa)
  190. {
  191. MPT_FRAME_HDR *mf = NULL;
  192. MPT_FRAME_HDR *mr = NULL;
  193. int req_idx = 0;
  194. int cb_idx;
  195. dmfprintk((MYIOC_s_INFO_FMT "Got TURBO reply req_idx=%08x\n",
  196. ioc->name, pa));
  197. switch (pa >> MPI_CONTEXT_REPLY_TYPE_SHIFT) {
  198. case MPI_CONTEXT_REPLY_TYPE_SCSI_INIT:
  199. req_idx = pa & 0x0000FFFF;
  200. cb_idx = (pa & 0x00FF0000) >> 16;
  201. mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
  202. break;
  203. case MPI_CONTEXT_REPLY_TYPE_LAN:
  204. cb_idx = mpt_lan_index;
  205. /*
  206. * Blind set of mf to NULL here was fatal
  207. * after lan_reply says "freeme"
  208. * Fix sort of combined with an optimization here;
  209. * added explicit check for case where lan_reply
  210. * was just returning 1 and doing nothing else.
  211. * For this case skip the callback, but set up
  212. * proper mf value first here:-)
  213. */
  214. if ((pa & 0x58000000) == 0x58000000) {
  215. req_idx = pa & 0x0000FFFF;
  216. mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
  217. mpt_free_msg_frame(ioc, mf);
  218. mb();
  219. return;
  220. break;
  221. }
  222. mr = (MPT_FRAME_HDR *) CAST_U32_TO_PTR(pa);
  223. break;
  224. case MPI_CONTEXT_REPLY_TYPE_SCSI_TARGET:
  225. cb_idx = mpt_stm_index;
  226. mr = (MPT_FRAME_HDR *) CAST_U32_TO_PTR(pa);
  227. break;
  228. default:
  229. cb_idx = 0;
  230. BUG();
  231. }
  232. /* Check for (valid) IO callback! */
  233. if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS ||
  234. MptCallbacks[cb_idx] == NULL) {
  235. printk(MYIOC_s_WARN_FMT "%s: Invalid cb_idx (%d)!\n",
  236. __FUNCTION__, ioc->name, cb_idx);
  237. goto out;
  238. }
  239. if (MptCallbacks[cb_idx](ioc, mf, mr))
  240. mpt_free_msg_frame(ioc, mf);
  241. out:
  242. mb();
  243. }
  244. static void
  245. mpt_reply(MPT_ADAPTER *ioc, u32 pa)
  246. {
  247. MPT_FRAME_HDR *mf;
  248. MPT_FRAME_HDR *mr;
  249. int req_idx;
  250. int cb_idx;
  251. int freeme;
  252. u32 reply_dma_low;
  253. u16 ioc_stat;
  254. /* non-TURBO reply! Hmmm, something may be up...
  255. * Newest turbo reply mechanism; get address
  256. * via left shift 1 (get rid of MPI_ADDRESS_REPLY_A_BIT)!
  257. */
  258. /* Map DMA address of reply header to cpu address.
  259. * pa is 32 bits - but the dma address may be 32 or 64 bits
  260. * get offset based only only the low addresses
  261. */
  262. reply_dma_low = (pa <<= 1);
  263. mr = (MPT_FRAME_HDR *)((u8 *)ioc->reply_frames +
  264. (reply_dma_low - ioc->reply_frames_low_dma));
  265. req_idx = le16_to_cpu(mr->u.frame.hwhdr.msgctxu.fld.req_idx);
  266. cb_idx = mr->u.frame.hwhdr.msgctxu.fld.cb_idx;
  267. mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
  268. dmfprintk((MYIOC_s_INFO_FMT "Got non-TURBO reply=%p req_idx=%x cb_idx=%x Function=%x\n",
  269. ioc->name, mr, req_idx, cb_idx, mr->u.hdr.Function));
  270. DBG_DUMP_REPLY_FRAME(mr)
  271. /* Check/log IOC log info
  272. */
  273. ioc_stat = le16_to_cpu(mr->u.reply.IOCStatus);
  274. if (ioc_stat & MPI_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) {
  275. u32 log_info = le32_to_cpu(mr->u.reply.IOCLogInfo);
  276. if (ioc->bus_type == FC)
  277. mpt_fc_log_info(ioc, log_info);
  278. else if (ioc->bus_type == SCSI)
  279. mpt_sp_log_info(ioc, log_info);
  280. else if (ioc->bus_type == SAS)
  281. mpt_sas_log_info(ioc, log_info);
  282. }
  283. if (ioc_stat & MPI_IOCSTATUS_MASK) {
  284. if (ioc->bus_type == SCSI &&
  285. cb_idx != mpt_stm_index &&
  286. cb_idx != mpt_lan_index)
  287. mpt_sp_ioc_info(ioc, (u32)ioc_stat, mf);
  288. }
  289. /* Check for (valid) IO callback! */
  290. if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS ||
  291. MptCallbacks[cb_idx] == NULL) {
  292. printk(MYIOC_s_WARN_FMT "%s: Invalid cb_idx (%d)!\n",
  293. __FUNCTION__, ioc->name, cb_idx);
  294. freeme = 0;
  295. goto out;
  296. }
  297. freeme = MptCallbacks[cb_idx](ioc, mf, mr);
  298. out:
  299. /* Flush (non-TURBO) reply with a WRITE! */
  300. CHIPREG_WRITE32(&ioc->chip->ReplyFifo, pa);
  301. if (freeme)
  302. mpt_free_msg_frame(ioc, mf);
  303. mb();
  304. }
  305. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  306. /*
  307. * mpt_interrupt - MPT adapter (IOC) specific interrupt handler.
  308. * @irq: irq number (not used)
  309. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  310. * @r: pt_regs pointer (not used)
  311. *
  312. * This routine is registered via the request_irq() kernel API call,
  313. * and handles all interrupts generated from a specific MPT adapter
  314. * (also referred to as a IO Controller or IOC).
  315. * This routine must clear the interrupt from the adapter and does
  316. * so by reading the reply FIFO. Multiple replies may be processed
  317. * per single call to this routine.
  318. *
  319. * This routine handles register-level access of the adapter but
  320. * dispatches (calls) a protocol-specific callback routine to handle
  321. * the protocol-specific details of the MPT request completion.
  322. */
  323. static irqreturn_t
  324. mpt_interrupt(int irq, void *bus_id, struct pt_regs *r)
  325. {
  326. MPT_ADAPTER *ioc = bus_id;
  327. u32 pa;
  328. /*
  329. * Drain the reply FIFO!
  330. */
  331. while (1) {
  332. pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo);
  333. if (pa == 0xFFFFFFFF)
  334. return IRQ_HANDLED;
  335. else if (pa & MPI_ADDRESS_REPLY_A_BIT)
  336. mpt_reply(ioc, pa);
  337. else
  338. mpt_turbo_reply(ioc, pa);
  339. }
  340. return IRQ_HANDLED;
  341. }
  342. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  343. /*
  344. * mpt_base_reply - MPT base driver's callback routine; all base driver
  345. * "internal" request/reply processing is routed here.
  346. * Currently used for EventNotification and EventAck handling.
  347. * @ioc: Pointer to MPT_ADAPTER structure
  348. * @mf: Pointer to original MPT request frame
  349. * @reply: Pointer to MPT reply frame (NULL if TurboReply)
  350. *
  351. * Returns 1 indicating original alloc'd request frame ptr
  352. * should be freed, or 0 if it shouldn't.
  353. */
  354. static int
  355. mpt_base_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *reply)
  356. {
  357. int freereq = 1;
  358. u8 func;
  359. dmfprintk((MYIOC_s_INFO_FMT "mpt_base_reply() called\n", ioc->name));
  360. #if defined(MPT_DEBUG_MSG_FRAME)
  361. if (!(reply->u.hdr.MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY)) {
  362. dmfprintk((KERN_INFO MYNAM ": Original request frame (@%p) header\n", mf));
  363. DBG_DUMP_REQUEST_FRAME_HDR(mf)
  364. }
  365. #endif
  366. func = reply->u.hdr.Function;
  367. dmfprintk((MYIOC_s_INFO_FMT "mpt_base_reply, Function=%02Xh\n",
  368. ioc->name, func));
  369. if (func == MPI_FUNCTION_EVENT_NOTIFICATION) {
  370. EventNotificationReply_t *pEvReply = (EventNotificationReply_t *) reply;
  371. int evHandlers = 0;
  372. int results;
  373. results = ProcessEventNotification(ioc, pEvReply, &evHandlers);
  374. if (results != evHandlers) {
  375. /* CHECKME! Any special handling needed here? */
  376. devtprintk((MYIOC_s_WARN_FMT "Called %d event handlers, sum results = %d\n",
  377. ioc->name, evHandlers, results));
  378. }
  379. /*
  380. * Hmmm... It seems that EventNotificationReply is an exception
  381. * to the rule of one reply per request.
  382. */
  383. if (pEvReply->MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY) {
  384. freereq = 0;
  385. devtprintk((MYIOC_s_WARN_FMT "EVENT_NOTIFICATION reply %p does not return Request frame\n",
  386. ioc->name, pEvReply));
  387. } else {
  388. devtprintk((MYIOC_s_WARN_FMT "EVENT_NOTIFICATION reply %p returns Request frame\n",
  389. ioc->name, pEvReply));
  390. }
  391. #ifdef CONFIG_PROC_FS
  392. // LogEvent(ioc, pEvReply);
  393. #endif
  394. } else if (func == MPI_FUNCTION_EVENT_ACK) {
  395. dprintk((MYIOC_s_INFO_FMT "mpt_base_reply, EventAck reply received\n",
  396. ioc->name));
  397. } else if (func == MPI_FUNCTION_CONFIG ||
  398. func == MPI_FUNCTION_TOOLBOX) {
  399. CONFIGPARMS *pCfg;
  400. unsigned long flags;
  401. dcprintk((MYIOC_s_INFO_FMT "config_complete (mf=%p,mr=%p)\n",
  402. ioc->name, mf, reply));
  403. pCfg = * ((CONFIGPARMS **)((u8 *) mf + ioc->req_sz - sizeof(void *)));
  404. if (pCfg) {
  405. /* disable timer and remove from linked list */
  406. del_timer(&pCfg->timer);
  407. spin_lock_irqsave(&ioc->FreeQlock, flags);
  408. list_del(&pCfg->linkage);
  409. spin_unlock_irqrestore(&ioc->FreeQlock, flags);
  410. /*
  411. * If IOC Status is SUCCESS, save the header
  412. * and set the status code to GOOD.
  413. */
  414. pCfg->status = MPT_CONFIG_ERROR;
  415. if (reply) {
  416. ConfigReply_t *pReply = (ConfigReply_t *)reply;
  417. u16 status;
  418. status = le16_to_cpu(pReply->IOCStatus) & MPI_IOCSTATUS_MASK;
  419. dcprintk((KERN_NOTICE " IOCStatus=%04xh, IOCLogInfo=%08xh\n",
  420. status, le32_to_cpu(pReply->IOCLogInfo)));
  421. pCfg->status = status;
  422. if (status == MPI_IOCSTATUS_SUCCESS) {
  423. if ((pReply->Header.PageType &
  424. MPI_CONFIG_PAGETYPE_MASK) ==
  425. MPI_CONFIG_PAGETYPE_EXTENDED) {
  426. pCfg->cfghdr.ehdr->ExtPageLength =
  427. le16_to_cpu(pReply->ExtPageLength);
  428. pCfg->cfghdr.ehdr->ExtPageType =
  429. pReply->ExtPageType;
  430. }
  431. pCfg->cfghdr.hdr->PageVersion = pReply->Header.PageVersion;
  432. /* If this is a regular header, save PageLength. */
  433. /* LMP Do this better so not using a reserved field! */
  434. pCfg->cfghdr.hdr->PageLength = pReply->Header.PageLength;
  435. pCfg->cfghdr.hdr->PageNumber = pReply->Header.PageNumber;
  436. pCfg->cfghdr.hdr->PageType = pReply->Header.PageType;
  437. }
  438. }
  439. /*
  440. * Wake up the original calling thread
  441. */
  442. pCfg->wait_done = 1;
  443. wake_up(&mpt_waitq);
  444. }
  445. } else if (func == MPI_FUNCTION_SAS_IO_UNIT_CONTROL) {
  446. /* we should be always getting a reply frame */
  447. memcpy(ioc->persist_reply_frame, reply,
  448. min(MPT_DEFAULT_FRAME_SIZE,
  449. 4*reply->u.reply.MsgLength));
  450. del_timer(&ioc->persist_timer);
  451. ioc->persist_wait_done = 1;
  452. wake_up(&mpt_waitq);
  453. } else {
  454. printk(MYIOC_s_ERR_FMT "Unexpected msg function (=%02Xh) reply received!\n",
  455. ioc->name, func);
  456. }
  457. /*
  458. * Conditionally tell caller to free the original
  459. * EventNotification/EventAck/unexpected request frame!
  460. */
  461. return freereq;
  462. }
  463. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  464. /**
  465. * mpt_register - Register protocol-specific main callback handler.
  466. * @cbfunc: callback function pointer
  467. * @dclass: Protocol driver's class (%MPT_DRIVER_CLASS enum value)
  468. *
  469. * This routine is called by a protocol-specific driver (SCSI host,
  470. * LAN, SCSI target) to register it's reply callback routine. Each
  471. * protocol-specific driver must do this before it will be able to
  472. * use any IOC resources, such as obtaining request frames.
  473. *
  474. * NOTES: The SCSI protocol driver currently calls this routine thrice
  475. * in order to register separate callbacks; one for "normal" SCSI IO;
  476. * one for MptScsiTaskMgmt requests; one for Scan/DV requests.
  477. *
  478. * Returns a positive integer valued "handle" in the
  479. * range (and S.O.D. order) {N,...,7,6,5,...,1} if successful.
  480. * Any non-positive return value (including zero!) should be considered
  481. * an error by the caller.
  482. */
  483. int
  484. mpt_register(MPT_CALLBACK cbfunc, MPT_DRIVER_CLASS dclass)
  485. {
  486. int i;
  487. last_drv_idx = -1;
  488. /*
  489. * Search for empty callback slot in this order: {N,...,7,6,5,...,1}
  490. * (slot/handle 0 is reserved!)
  491. */
  492. for (i = MPT_MAX_PROTOCOL_DRIVERS-1; i; i--) {
  493. if (MptCallbacks[i] == NULL) {
  494. MptCallbacks[i] = cbfunc;
  495. MptDriverClass[i] = dclass;
  496. MptEvHandlers[i] = NULL;
  497. last_drv_idx = i;
  498. break;
  499. }
  500. }
  501. return last_drv_idx;
  502. }
  503. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  504. /**
  505. * mpt_deregister - Deregister a protocol drivers resources.
  506. * @cb_idx: previously registered callback handle
  507. *
  508. * Each protocol-specific driver should call this routine when it's
  509. * module is unloaded.
  510. */
  511. void
  512. mpt_deregister(int cb_idx)
  513. {
  514. if ((cb_idx >= 0) && (cb_idx < MPT_MAX_PROTOCOL_DRIVERS)) {
  515. MptCallbacks[cb_idx] = NULL;
  516. MptDriverClass[cb_idx] = MPTUNKNOWN_DRIVER;
  517. MptEvHandlers[cb_idx] = NULL;
  518. last_drv_idx++;
  519. }
  520. }
  521. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  522. /**
  523. * mpt_event_register - Register protocol-specific event callback
  524. * handler.
  525. * @cb_idx: previously registered (via mpt_register) callback handle
  526. * @ev_cbfunc: callback function
  527. *
  528. * This routine can be called by one or more protocol-specific drivers
  529. * if/when they choose to be notified of MPT events.
  530. *
  531. * Returns 0 for success.
  532. */
  533. int
  534. mpt_event_register(int cb_idx, MPT_EVHANDLER ev_cbfunc)
  535. {
  536. if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
  537. return -1;
  538. MptEvHandlers[cb_idx] = ev_cbfunc;
  539. return 0;
  540. }
  541. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  542. /**
  543. * mpt_event_deregister - Deregister protocol-specific event callback
  544. * handler.
  545. * @cb_idx: previously registered callback handle
  546. *
  547. * Each protocol-specific driver should call this routine
  548. * when it does not (or can no longer) handle events,
  549. * or when it's module is unloaded.
  550. */
  551. void
  552. mpt_event_deregister(int cb_idx)
  553. {
  554. if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
  555. return;
  556. MptEvHandlers[cb_idx] = NULL;
  557. }
  558. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  559. /**
  560. * mpt_reset_register - Register protocol-specific IOC reset handler.
  561. * @cb_idx: previously registered (via mpt_register) callback handle
  562. * @reset_func: reset function
  563. *
  564. * This routine can be called by one or more protocol-specific drivers
  565. * if/when they choose to be notified of IOC resets.
  566. *
  567. * Returns 0 for success.
  568. */
  569. int
  570. mpt_reset_register(int cb_idx, MPT_RESETHANDLER reset_func)
  571. {
  572. if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
  573. return -1;
  574. MptResetHandlers[cb_idx] = reset_func;
  575. return 0;
  576. }
  577. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  578. /**
  579. * mpt_reset_deregister - Deregister protocol-specific IOC reset handler.
  580. * @cb_idx: previously registered callback handle
  581. *
  582. * Each protocol-specific driver should call this routine
  583. * when it does not (or can no longer) handle IOC reset handling,
  584. * or when it's module is unloaded.
  585. */
  586. void
  587. mpt_reset_deregister(int cb_idx)
  588. {
  589. if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
  590. return;
  591. MptResetHandlers[cb_idx] = NULL;
  592. }
  593. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  594. /**
  595. * mpt_device_driver_register - Register device driver hooks
  596. */
  597. int
  598. mpt_device_driver_register(struct mpt_pci_driver * dd_cbfunc, int cb_idx)
  599. {
  600. MPT_ADAPTER *ioc;
  601. if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS) {
  602. return -EINVAL;
  603. }
  604. MptDeviceDriverHandlers[cb_idx] = dd_cbfunc;
  605. /* call per pci device probe entry point */
  606. list_for_each_entry(ioc, &ioc_list, list) {
  607. if(dd_cbfunc->probe) {
  608. dd_cbfunc->probe(ioc->pcidev,
  609. ioc->pcidev->driver->id_table);
  610. }
  611. }
  612. return 0;
  613. }
  614. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  615. /**
  616. * mpt_device_driver_deregister - DeRegister device driver hooks
  617. */
  618. void
  619. mpt_device_driver_deregister(int cb_idx)
  620. {
  621. struct mpt_pci_driver *dd_cbfunc;
  622. MPT_ADAPTER *ioc;
  623. if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
  624. return;
  625. dd_cbfunc = MptDeviceDriverHandlers[cb_idx];
  626. list_for_each_entry(ioc, &ioc_list, list) {
  627. if (dd_cbfunc->remove)
  628. dd_cbfunc->remove(ioc->pcidev);
  629. }
  630. MptDeviceDriverHandlers[cb_idx] = NULL;
  631. }
  632. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  633. /**
  634. * mpt_get_msg_frame - Obtain a MPT request frame from the pool (of 1024)
  635. * allocated per MPT adapter.
  636. * @handle: Handle of registered MPT protocol driver
  637. * @ioc: Pointer to MPT adapter structure
  638. *
  639. * Returns pointer to a MPT request frame or %NULL if none are available
  640. * or IOC is not active.
  641. */
  642. MPT_FRAME_HDR*
  643. mpt_get_msg_frame(int handle, MPT_ADAPTER *ioc)
  644. {
  645. MPT_FRAME_HDR *mf;
  646. unsigned long flags;
  647. u16 req_idx; /* Request index */
  648. /* validate handle and ioc identifier */
  649. #ifdef MFCNT
  650. if (!ioc->active)
  651. printk(KERN_WARNING "IOC Not Active! mpt_get_msg_frame returning NULL!\n");
  652. #endif
  653. /* If interrupts are not attached, do not return a request frame */
  654. if (!ioc->active)
  655. return NULL;
  656. spin_lock_irqsave(&ioc->FreeQlock, flags);
  657. if (!list_empty(&ioc->FreeQ)) {
  658. int req_offset;
  659. mf = list_entry(ioc->FreeQ.next, MPT_FRAME_HDR,
  660. u.frame.linkage.list);
  661. list_del(&mf->u.frame.linkage.list);
  662. mf->u.frame.linkage.arg1 = 0;
  663. mf->u.frame.hwhdr.msgctxu.fld.cb_idx = handle; /* byte */
  664. req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
  665. /* u16! */
  666. req_idx = req_offset / ioc->req_sz;
  667. mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
  668. mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
  669. ioc->RequestNB[req_idx] = ioc->NB_for_64_byte_frame; /* Default, will be changed if necessary in SG generation */
  670. #ifdef MFCNT
  671. ioc->mfcnt++;
  672. #endif
  673. }
  674. else
  675. mf = NULL;
  676. spin_unlock_irqrestore(&ioc->FreeQlock, flags);
  677. #ifdef MFCNT
  678. if (mf == NULL)
  679. printk(KERN_WARNING "IOC Active. No free Msg Frames! Count 0x%x Max 0x%x\n", ioc->mfcnt, ioc->req_depth);
  680. mfcounter++;
  681. if (mfcounter == PRINT_MF_COUNT)
  682. printk(KERN_INFO "MF Count 0x%x Max 0x%x \n", ioc->mfcnt, ioc->req_depth);
  683. #endif
  684. dmfprintk((KERN_INFO MYNAM ": %s: mpt_get_msg_frame(%d,%d), got mf=%p\n",
  685. ioc->name, handle, ioc->id, mf));
  686. return mf;
  687. }
  688. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  689. /**
  690. * mpt_put_msg_frame - Send a protocol specific MPT request frame
  691. * to a IOC.
  692. * @handle: Handle of registered MPT protocol driver
  693. * @ioc: Pointer to MPT adapter structure
  694. * @mf: Pointer to MPT request frame
  695. *
  696. * This routine posts a MPT request frame to the request post FIFO of a
  697. * specific MPT adapter.
  698. */
  699. void
  700. mpt_put_msg_frame(int handle, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
  701. {
  702. u32 mf_dma_addr;
  703. int req_offset;
  704. u16 req_idx; /* Request index */
  705. /* ensure values are reset properly! */
  706. mf->u.frame.hwhdr.msgctxu.fld.cb_idx = handle; /* byte */
  707. req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
  708. /* u16! */
  709. req_idx = req_offset / ioc->req_sz;
  710. mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
  711. mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
  712. #ifdef MPT_DEBUG_MSG_FRAME
  713. {
  714. u32 *m = mf->u.frame.hwhdr.__hdr;
  715. int ii, n;
  716. printk(KERN_INFO MYNAM ": %s: About to Put msg frame @ %p:\n" KERN_INFO " ",
  717. ioc->name, m);
  718. n = ioc->req_sz/4 - 1;
  719. while (m[n] == 0)
  720. n--;
  721. for (ii=0; ii<=n; ii++) {
  722. if (ii && ((ii%8)==0))
  723. printk("\n" KERN_INFO " ");
  724. printk(" %08x", le32_to_cpu(m[ii]));
  725. }
  726. printk("\n");
  727. }
  728. #endif
  729. mf_dma_addr = (ioc->req_frames_low_dma + req_offset) | ioc->RequestNB[req_idx];
  730. dsgprintk((MYIOC_s_INFO_FMT "mf_dma_addr=%x req_idx=%d RequestNB=%x\n", ioc->name, mf_dma_addr, req_idx, ioc->RequestNB[req_idx]));
  731. CHIPREG_WRITE32(&ioc->chip->RequestFifo, mf_dma_addr);
  732. }
  733. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  734. /**
  735. * mpt_free_msg_frame - Place MPT request frame back on FreeQ.
  736. * @handle: Handle of registered MPT protocol driver
  737. * @ioc: Pointer to MPT adapter structure
  738. * @mf: Pointer to MPT request frame
  739. *
  740. * This routine places a MPT request frame back on the MPT adapter's
  741. * FreeQ.
  742. */
  743. void
  744. mpt_free_msg_frame(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
  745. {
  746. unsigned long flags;
  747. /* Put Request back on FreeQ! */
  748. spin_lock_irqsave(&ioc->FreeQlock, flags);
  749. mf->u.frame.linkage.arg1 = 0xdeadbeaf; /* signature to know if this mf is freed */
  750. list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeQ);
  751. #ifdef MFCNT
  752. ioc->mfcnt--;
  753. #endif
  754. spin_unlock_irqrestore(&ioc->FreeQlock, flags);
  755. }
  756. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  757. /**
  758. * mpt_add_sge - Place a simple SGE at address pAddr.
  759. * @pAddr: virtual address for SGE
  760. * @flagslength: SGE flags and data transfer length
  761. * @dma_addr: Physical address
  762. *
  763. * This routine places a MPT request frame back on the MPT adapter's
  764. * FreeQ.
  765. */
  766. void
  767. mpt_add_sge(char *pAddr, u32 flagslength, dma_addr_t dma_addr)
  768. {
  769. if (sizeof(dma_addr_t) == sizeof(u64)) {
  770. SGESimple64_t *pSge = (SGESimple64_t *) pAddr;
  771. u32 tmp = dma_addr & 0xFFFFFFFF;
  772. pSge->FlagsLength = cpu_to_le32(flagslength);
  773. pSge->Address.Low = cpu_to_le32(tmp);
  774. tmp = (u32) ((u64)dma_addr >> 32);
  775. pSge->Address.High = cpu_to_le32(tmp);
  776. } else {
  777. SGESimple32_t *pSge = (SGESimple32_t *) pAddr;
  778. pSge->FlagsLength = cpu_to_le32(flagslength);
  779. pSge->Address = cpu_to_le32(dma_addr);
  780. }
  781. }
  782. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  783. /**
  784. * mpt_send_handshake_request - Send MPT request via doorbell
  785. * handshake method.
  786. * @handle: Handle of registered MPT protocol driver
  787. * @ioc: Pointer to MPT adapter structure
  788. * @reqBytes: Size of the request in bytes
  789. * @req: Pointer to MPT request frame
  790. * @sleepFlag: Use schedule if CAN_SLEEP else use udelay.
  791. *
  792. * This routine is used exclusively to send MptScsiTaskMgmt
  793. * requests since they are required to be sent via doorbell handshake.
  794. *
  795. * NOTE: It is the callers responsibility to byte-swap fields in the
  796. * request which are greater than 1 byte in size.
  797. *
  798. * Returns 0 for success, non-zero for failure.
  799. */
  800. int
  801. mpt_send_handshake_request(int handle, MPT_ADAPTER *ioc, int reqBytes, u32 *req, int sleepFlag)
  802. {
  803. int r = 0;
  804. u8 *req_as_bytes;
  805. int ii;
  806. /* State is known to be good upon entering
  807. * this function so issue the bus reset
  808. * request.
  809. */
  810. /*
  811. * Emulate what mpt_put_msg_frame() does /wrt to sanity
  812. * setting cb_idx/req_idx. But ONLY if this request
  813. * is in proper (pre-alloc'd) request buffer range...
  814. */
  815. ii = MFPTR_2_MPT_INDEX(ioc,(MPT_FRAME_HDR*)req);
  816. if (reqBytes >= 12 && ii >= 0 && ii < ioc->req_depth) {
  817. MPT_FRAME_HDR *mf = (MPT_FRAME_HDR*)req;
  818. mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(ii);
  819. mf->u.frame.hwhdr.msgctxu.fld.cb_idx = handle;
  820. }
  821. /* Make sure there are no doorbells */
  822. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  823. CHIPREG_WRITE32(&ioc->chip->Doorbell,
  824. ((MPI_FUNCTION_HANDSHAKE<<MPI_DOORBELL_FUNCTION_SHIFT) |
  825. ((reqBytes/4)<<MPI_DOORBELL_ADD_DWORDS_SHIFT)));
  826. /* Wait for IOC doorbell int */
  827. if ((ii = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0) {
  828. return ii;
  829. }
  830. /* Read doorbell and check for active bit */
  831. if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
  832. return -5;
  833. dhsprintk((KERN_INFO MYNAM ": %s: mpt_send_handshake_request start, WaitCnt=%d\n",
  834. ioc->name, ii));
  835. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  836. if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
  837. return -2;
  838. }
  839. /* Send request via doorbell handshake */
  840. req_as_bytes = (u8 *) req;
  841. for (ii = 0; ii < reqBytes/4; ii++) {
  842. u32 word;
  843. word = ((req_as_bytes[(ii*4) + 0] << 0) |
  844. (req_as_bytes[(ii*4) + 1] << 8) |
  845. (req_as_bytes[(ii*4) + 2] << 16) |
  846. (req_as_bytes[(ii*4) + 3] << 24));
  847. CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
  848. if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
  849. r = -3;
  850. break;
  851. }
  852. }
  853. if (r >= 0 && WaitForDoorbellInt(ioc, 10, sleepFlag) >= 0)
  854. r = 0;
  855. else
  856. r = -4;
  857. /* Make sure there are no doorbells */
  858. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  859. return r;
  860. }
  861. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  862. /**
  863. * mpt_host_page_access_control - provides mechanism for the host
  864. * driver to control the IOC's Host Page Buffer access.
  865. * @ioc: Pointer to MPT adapter structure
  866. * @access_control_value: define bits below
  867. *
  868. * Access Control Value - bits[15:12]
  869. * 0h Reserved
  870. * 1h Enable Access { MPI_DB_HPBAC_ENABLE_ACCESS }
  871. * 2h Disable Access { MPI_DB_HPBAC_DISABLE_ACCESS }
  872. * 3h Free Buffer { MPI_DB_HPBAC_FREE_BUFFER }
  873. *
  874. * Returns 0 for success, non-zero for failure.
  875. */
  876. static int
  877. mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag)
  878. {
  879. int r = 0;
  880. /* return if in use */
  881. if (CHIPREG_READ32(&ioc->chip->Doorbell)
  882. & MPI_DOORBELL_ACTIVE)
  883. return -1;
  884. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  885. CHIPREG_WRITE32(&ioc->chip->Doorbell,
  886. ((MPI_FUNCTION_HOST_PAGEBUF_ACCESS_CONTROL
  887. <<MPI_DOORBELL_FUNCTION_SHIFT) |
  888. (access_control_value<<12)));
  889. /* Wait for IOC to clear Doorbell Status bit */
  890. if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
  891. return -2;
  892. }else
  893. return 0;
  894. }
  895. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  896. /**
  897. * mpt_host_page_alloc - allocate system memory for the fw
  898. * If we already allocated memory in past, then resend the same pointer.
  899. * ioc@: Pointer to pointer to IOC adapter
  900. * ioc_init@: Pointer to ioc init config page
  901. *
  902. * Returns 0 for success, non-zero for failure.
  903. */
  904. static int
  905. mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init)
  906. {
  907. char *psge;
  908. int flags_length;
  909. u32 host_page_buffer_sz=0;
  910. if(!ioc->HostPageBuffer) {
  911. host_page_buffer_sz =
  912. le32_to_cpu(ioc->facts.HostPageBufferSGE.FlagsLength) & 0xFFFFFF;
  913. if(!host_page_buffer_sz)
  914. return 0; /* fw doesn't need any host buffers */
  915. /* spin till we get enough memory */
  916. while(host_page_buffer_sz > 0) {
  917. if((ioc->HostPageBuffer = pci_alloc_consistent(
  918. ioc->pcidev,
  919. host_page_buffer_sz,
  920. &ioc->HostPageBuffer_dma)) != NULL) {
  921. dinitprintk((MYIOC_s_INFO_FMT
  922. "host_page_buffer @ %p, dma @ %x, sz=%d bytes\n",
  923. ioc->name,
  924. ioc->HostPageBuffer,
  925. ioc->HostPageBuffer_dma,
  926. host_page_buffer_sz));
  927. ioc->alloc_total += host_page_buffer_sz;
  928. ioc->HostPageBuffer_sz = host_page_buffer_sz;
  929. break;
  930. }
  931. host_page_buffer_sz -= (4*1024);
  932. }
  933. }
  934. if(!ioc->HostPageBuffer) {
  935. printk(MYIOC_s_ERR_FMT
  936. "Failed to alloc memory for host_page_buffer!\n",
  937. ioc->name);
  938. return -999;
  939. }
  940. psge = (char *)&ioc_init->HostPageBufferSGE;
  941. flags_length = MPI_SGE_FLAGS_SIMPLE_ELEMENT |
  942. MPI_SGE_FLAGS_SYSTEM_ADDRESS |
  943. MPI_SGE_FLAGS_32_BIT_ADDRESSING |
  944. MPI_SGE_FLAGS_HOST_TO_IOC |
  945. MPI_SGE_FLAGS_END_OF_BUFFER;
  946. if (sizeof(dma_addr_t) == sizeof(u64)) {
  947. flags_length |= MPI_SGE_FLAGS_64_BIT_ADDRESSING;
  948. }
  949. flags_length = flags_length << MPI_SGE_FLAGS_SHIFT;
  950. flags_length |= ioc->HostPageBuffer_sz;
  951. mpt_add_sge(psge, flags_length, ioc->HostPageBuffer_dma);
  952. ioc->facts.HostPageBufferSGE = ioc_init->HostPageBufferSGE;
  953. return 0;
  954. }
  955. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  956. /**
  957. * mpt_verify_adapter - Given a unique IOC identifier, set pointer to
  958. * the associated MPT adapter structure.
  959. * @iocid: IOC unique identifier (integer)
  960. * @iocpp: Pointer to pointer to IOC adapter
  961. *
  962. * Returns iocid and sets iocpp.
  963. */
  964. int
  965. mpt_verify_adapter(int iocid, MPT_ADAPTER **iocpp)
  966. {
  967. MPT_ADAPTER *ioc;
  968. list_for_each_entry(ioc,&ioc_list,list) {
  969. if (ioc->id == iocid) {
  970. *iocpp =ioc;
  971. return iocid;
  972. }
  973. }
  974. *iocpp = NULL;
  975. return -1;
  976. }
  977. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  978. /*
  979. * mpt_attach - Install a PCI intelligent MPT adapter.
  980. * @pdev: Pointer to pci_dev structure
  981. *
  982. * This routine performs all the steps necessary to bring the IOC of
  983. * a MPT adapter to a OPERATIONAL state. This includes registering
  984. * memory regions, registering the interrupt, and allocating request
  985. * and reply memory pools.
  986. *
  987. * This routine also pre-fetches the LAN MAC address of a Fibre Channel
  988. * MPT adapter.
  989. *
  990. * Returns 0 for success, non-zero for failure.
  991. *
  992. * TODO: Add support for polled controllers
  993. */
  994. int
  995. mpt_attach(struct pci_dev *pdev, const struct pci_device_id *id)
  996. {
  997. MPT_ADAPTER *ioc;
  998. u8 __iomem *mem;
  999. unsigned long mem_phys;
  1000. unsigned long port;
  1001. u32 msize;
  1002. u32 psize;
  1003. int ii;
  1004. int r = -ENODEV;
  1005. u8 revision;
  1006. u8 pcixcmd;
  1007. static int mpt_ids = 0;
  1008. #ifdef CONFIG_PROC_FS
  1009. struct proc_dir_entry *dent, *ent;
  1010. #endif
  1011. if (pci_enable_device(pdev))
  1012. return r;
  1013. dinitprintk((KERN_WARNING MYNAM ": mpt_adapter_install\n"));
  1014. if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
  1015. dprintk((KERN_INFO MYNAM
  1016. ": 64 BIT PCI BUS DMA ADDRESSING SUPPORTED\n"));
  1017. } else if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
  1018. printk(KERN_WARNING MYNAM ": 32 BIT PCI BUS DMA ADDRESSING NOT SUPPORTED\n");
  1019. return r;
  1020. }
  1021. if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
  1022. dprintk((KERN_INFO MYNAM
  1023. ": Using 64 bit consistent mask\n"));
  1024. else
  1025. dprintk((KERN_INFO MYNAM
  1026. ": Not using 64 bit consistent mask\n"));
  1027. ioc = kmalloc(sizeof(MPT_ADAPTER), GFP_ATOMIC);
  1028. if (ioc == NULL) {
  1029. printk(KERN_ERR MYNAM ": ERROR - Insufficient memory to add adapter!\n");
  1030. return -ENOMEM;
  1031. }
  1032. memset(ioc, 0, sizeof(MPT_ADAPTER));
  1033. ioc->alloc_total = sizeof(MPT_ADAPTER);
  1034. ioc->req_sz = MPT_DEFAULT_FRAME_SIZE; /* avoid div by zero! */
  1035. ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
  1036. ioc->pcidev = pdev;
  1037. ioc->diagPending = 0;
  1038. spin_lock_init(&ioc->diagLock);
  1039. /* Initialize the event logging.
  1040. */
  1041. ioc->eventTypes = 0; /* None */
  1042. ioc->eventContext = 0;
  1043. ioc->eventLogSize = 0;
  1044. ioc->events = NULL;
  1045. #ifdef MFCNT
  1046. ioc->mfcnt = 0;
  1047. #endif
  1048. ioc->cached_fw = NULL;
  1049. /* Initilize SCSI Config Data structure
  1050. */
  1051. memset(&ioc->spi_data, 0, sizeof(SpiCfgData));
  1052. /* Initialize the running configQ head.
  1053. */
  1054. INIT_LIST_HEAD(&ioc->configQ);
  1055. /* Find lookup slot. */
  1056. INIT_LIST_HEAD(&ioc->list);
  1057. ioc->id = mpt_ids++;
  1058. mem_phys = msize = 0;
  1059. port = psize = 0;
  1060. for (ii=0; ii < DEVICE_COUNT_RESOURCE; ii++) {
  1061. if (pci_resource_flags(pdev, ii) & PCI_BASE_ADDRESS_SPACE_IO) {
  1062. /* Get I/O space! */
  1063. port = pci_resource_start(pdev, ii);
  1064. psize = pci_resource_len(pdev,ii);
  1065. } else {
  1066. /* Get memmap */
  1067. mem_phys = pci_resource_start(pdev, ii);
  1068. msize = pci_resource_len(pdev,ii);
  1069. break;
  1070. }
  1071. }
  1072. ioc->mem_size = msize;
  1073. if (ii == DEVICE_COUNT_RESOURCE) {
  1074. printk(KERN_ERR MYNAM ": ERROR - MPT adapter has no memory regions defined!\n");
  1075. kfree(ioc);
  1076. return -EINVAL;
  1077. }
  1078. dinitprintk((KERN_INFO MYNAM ": MPT adapter @ %lx, msize=%dd bytes\n", mem_phys, msize));
  1079. dinitprintk((KERN_INFO MYNAM ": (port i/o @ %lx, psize=%dd bytes)\n", port, psize));
  1080. mem = NULL;
  1081. /* Get logical ptr for PciMem0 space */
  1082. /*mem = ioremap(mem_phys, msize);*/
  1083. mem = ioremap(mem_phys, 0x100);
  1084. if (mem == NULL) {
  1085. printk(KERN_ERR MYNAM ": ERROR - Unable to map adapter memory!\n");
  1086. kfree(ioc);
  1087. return -EINVAL;
  1088. }
  1089. ioc->memmap = mem;
  1090. dinitprintk((KERN_INFO MYNAM ": mem = %p, mem_phys = %lx\n", mem, mem_phys));
  1091. dinitprintk((KERN_INFO MYNAM ": facts @ %p, pfacts[0] @ %p\n",
  1092. &ioc->facts, &ioc->pfacts[0]));
  1093. ioc->mem_phys = mem_phys;
  1094. ioc->chip = (SYSIF_REGS __iomem *)mem;
  1095. /* Save Port IO values in case we need to do downloadboot */
  1096. {
  1097. u8 *pmem = (u8*)port;
  1098. ioc->pio_mem_phys = port;
  1099. ioc->pio_chip = (SYSIF_REGS __iomem *)pmem;
  1100. }
  1101. if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC909) {
  1102. ioc->prod_name = "LSIFC909";
  1103. ioc->bus_type = FC;
  1104. }
  1105. else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC929) {
  1106. ioc->prod_name = "LSIFC929";
  1107. ioc->bus_type = FC;
  1108. }
  1109. else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC919) {
  1110. ioc->prod_name = "LSIFC919";
  1111. ioc->bus_type = FC;
  1112. }
  1113. else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC929X) {
  1114. pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
  1115. ioc->bus_type = FC;
  1116. if (revision < XL_929) {
  1117. ioc->prod_name = "LSIFC929X";
  1118. /* 929X Chip Fix. Set Split transactions level
  1119. * for PCIX. Set MOST bits to zero.
  1120. */
  1121. pci_read_config_byte(pdev, 0x6a, &pcixcmd);
  1122. pcixcmd &= 0x8F;
  1123. pci_write_config_byte(pdev, 0x6a, pcixcmd);
  1124. } else {
  1125. ioc->prod_name = "LSIFC929XL";
  1126. /* 929XL Chip Fix. Set MMRBC to 0x08.
  1127. */
  1128. pci_read_config_byte(pdev, 0x6a, &pcixcmd);
  1129. pcixcmd |= 0x08;
  1130. pci_write_config_byte(pdev, 0x6a, pcixcmd);
  1131. }
  1132. }
  1133. else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC919X) {
  1134. ioc->prod_name = "LSIFC919X";
  1135. ioc->bus_type = FC;
  1136. /* 919X Chip Fix. Set Split transactions level
  1137. * for PCIX. Set MOST bits to zero.
  1138. */
  1139. pci_read_config_byte(pdev, 0x6a, &pcixcmd);
  1140. pcixcmd &= 0x8F;
  1141. pci_write_config_byte(pdev, 0x6a, pcixcmd);
  1142. }
  1143. else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC939X) {
  1144. ioc->prod_name = "LSIFC939X";
  1145. ioc->bus_type = FC;
  1146. ioc->errata_flag_1064 = 1;
  1147. }
  1148. else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC949X) {
  1149. ioc->prod_name = "LSIFC949X";
  1150. ioc->bus_type = FC;
  1151. ioc->errata_flag_1064 = 1;
  1152. }
  1153. else if (pdev->device == MPI_MANUFACTPAGE_DEVID_53C1030) {
  1154. ioc->prod_name = "LSI53C1030";
  1155. ioc->bus_type = SCSI;
  1156. /* 1030 Chip Fix. Disable Split transactions
  1157. * for PCIX. Set MOST bits to zero if Rev < C0( = 8).
  1158. */
  1159. pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
  1160. if (revision < C0_1030) {
  1161. pci_read_config_byte(pdev, 0x6a, &pcixcmd);
  1162. pcixcmd &= 0x8F;
  1163. pci_write_config_byte(pdev, 0x6a, pcixcmd);
  1164. }
  1165. }
  1166. else if (pdev->device == MPI_MANUFACTPAGE_DEVID_1030_53C1035) {
  1167. ioc->prod_name = "LSI53C1035";
  1168. ioc->bus_type = SCSI;
  1169. }
  1170. else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1064) {
  1171. ioc->prod_name = "LSISAS1064";
  1172. ioc->bus_type = SAS;
  1173. ioc->errata_flag_1064 = 1;
  1174. }
  1175. else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1066) {
  1176. ioc->prod_name = "LSISAS1066";
  1177. ioc->bus_type = SAS;
  1178. ioc->errata_flag_1064 = 1;
  1179. }
  1180. else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1068) {
  1181. ioc->prod_name = "LSISAS1068";
  1182. ioc->bus_type = SAS;
  1183. ioc->errata_flag_1064 = 1;
  1184. }
  1185. else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1064E) {
  1186. ioc->prod_name = "LSISAS1064E";
  1187. ioc->bus_type = SAS;
  1188. }
  1189. else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1066E) {
  1190. ioc->prod_name = "LSISAS1066E";
  1191. ioc->bus_type = SAS;
  1192. }
  1193. else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1068E) {
  1194. ioc->prod_name = "LSISAS1068E";
  1195. ioc->bus_type = SAS;
  1196. }
  1197. if (ioc->errata_flag_1064)
  1198. pci_disable_io_access(pdev);
  1199. sprintf(ioc->name, "ioc%d", ioc->id);
  1200. spin_lock_init(&ioc->FreeQlock);
  1201. /* Disable all! */
  1202. CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
  1203. ioc->active = 0;
  1204. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  1205. /* Set lookup ptr. */
  1206. list_add_tail(&ioc->list, &ioc_list);
  1207. ioc->pci_irq = -1;
  1208. if (pdev->irq) {
  1209. r = request_irq(pdev->irq, mpt_interrupt, SA_SHIRQ, ioc->name, ioc);
  1210. if (r < 0) {
  1211. #ifndef __sparc__
  1212. printk(MYIOC_s_ERR_FMT "Unable to allocate interrupt %d!\n",
  1213. ioc->name, pdev->irq);
  1214. #else
  1215. printk(MYIOC_s_ERR_FMT "Unable to allocate interrupt %s!\n",
  1216. ioc->name, __irq_itoa(pdev->irq));
  1217. #endif
  1218. list_del(&ioc->list);
  1219. iounmap(mem);
  1220. kfree(ioc);
  1221. return -EBUSY;
  1222. }
  1223. ioc->pci_irq = pdev->irq;
  1224. pci_set_master(pdev); /* ?? */
  1225. pci_set_drvdata(pdev, ioc);
  1226. #ifndef __sparc__
  1227. dprintk((KERN_INFO MYNAM ": %s installed at interrupt %d\n", ioc->name, pdev->irq));
  1228. #else
  1229. dprintk((KERN_INFO MYNAM ": %s installed at interrupt %s\n", ioc->name, __irq_itoa(pdev->irq)));
  1230. #endif
  1231. }
  1232. /* Check for "bound ports" (929, 929X, 1030, 1035) to reduce redundant resets.
  1233. */
  1234. mpt_detect_bound_ports(ioc, pdev);
  1235. if ((r = mpt_do_ioc_recovery(ioc,
  1236. MPT_HOSTEVENT_IOC_BRINGUP, CAN_SLEEP)) != 0) {
  1237. printk(KERN_WARNING MYNAM
  1238. ": WARNING - %s did not initialize properly! (%d)\n",
  1239. ioc->name, r);
  1240. list_del(&ioc->list);
  1241. free_irq(ioc->pci_irq, ioc);
  1242. iounmap(mem);
  1243. kfree(ioc);
  1244. pci_set_drvdata(pdev, NULL);
  1245. return r;
  1246. }
  1247. /* call per device driver probe entry point */
  1248. for(ii=0; ii<MPT_MAX_PROTOCOL_DRIVERS; ii++) {
  1249. if(MptDeviceDriverHandlers[ii] &&
  1250. MptDeviceDriverHandlers[ii]->probe) {
  1251. MptDeviceDriverHandlers[ii]->probe(pdev,id);
  1252. }
  1253. }
  1254. #ifdef CONFIG_PROC_FS
  1255. /*
  1256. * Create "/proc/mpt/iocN" subdirectory entry for each MPT adapter.
  1257. */
  1258. dent = proc_mkdir(ioc->name, mpt_proc_root_dir);
  1259. if (dent) {
  1260. ent = create_proc_entry("info", S_IFREG|S_IRUGO, dent);
  1261. if (ent) {
  1262. ent->read_proc = procmpt_iocinfo_read;
  1263. ent->data = ioc;
  1264. }
  1265. ent = create_proc_entry("summary", S_IFREG|S_IRUGO, dent);
  1266. if (ent) {
  1267. ent->read_proc = procmpt_summary_read;
  1268. ent->data = ioc;
  1269. }
  1270. }
  1271. #endif
  1272. return 0;
  1273. }
  1274. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1275. /*
  1276. * mpt_detach - Remove a PCI intelligent MPT adapter.
  1277. * @pdev: Pointer to pci_dev structure
  1278. *
  1279. */
  1280. void
  1281. mpt_detach(struct pci_dev *pdev)
  1282. {
  1283. MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
  1284. char pname[32];
  1285. int ii;
  1286. sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s/summary", ioc->name);
  1287. remove_proc_entry(pname, NULL);
  1288. sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s/info", ioc->name);
  1289. remove_proc_entry(pname, NULL);
  1290. sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s", ioc->name);
  1291. remove_proc_entry(pname, NULL);
  1292. /* call per device driver remove entry point */
  1293. for(ii=0; ii<MPT_MAX_PROTOCOL_DRIVERS; ii++) {
  1294. if(MptDeviceDriverHandlers[ii] &&
  1295. MptDeviceDriverHandlers[ii]->remove) {
  1296. MptDeviceDriverHandlers[ii]->remove(pdev);
  1297. }
  1298. }
  1299. /* Disable interrupts! */
  1300. CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
  1301. ioc->active = 0;
  1302. synchronize_irq(pdev->irq);
  1303. /* Clear any lingering interrupt */
  1304. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  1305. CHIPREG_READ32(&ioc->chip->IntStatus);
  1306. mpt_adapter_dispose(ioc);
  1307. pci_set_drvdata(pdev, NULL);
  1308. }
  1309. /**************************************************************************
  1310. * Power Management
  1311. */
  1312. #ifdef CONFIG_PM
  1313. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1314. /*
  1315. * mpt_suspend - Fusion MPT base driver suspend routine.
  1316. *
  1317. *
  1318. */
  1319. int
  1320. mpt_suspend(struct pci_dev *pdev, pm_message_t state)
  1321. {
  1322. u32 device_state;
  1323. MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
  1324. device_state=pci_choose_state(pdev, state);
  1325. printk(MYIOC_s_INFO_FMT
  1326. "pci-suspend: pdev=0x%p, slot=%s, Entering operating state [D%d]\n",
  1327. ioc->name, pdev, pci_name(pdev), device_state);
  1328. pci_save_state(pdev);
  1329. /* put ioc into READY_STATE */
  1330. if(SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, CAN_SLEEP)) {
  1331. printk(MYIOC_s_ERR_FMT
  1332. "pci-suspend: IOC msg unit reset failed!\n", ioc->name);
  1333. }
  1334. /* disable interrupts */
  1335. CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
  1336. ioc->active = 0;
  1337. /* Clear any lingering interrupt */
  1338. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  1339. pci_disable_device(pdev);
  1340. pci_set_power_state(pdev, device_state);
  1341. return 0;
  1342. }
  1343. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1344. /*
  1345. * mpt_resume - Fusion MPT base driver resume routine.
  1346. *
  1347. *
  1348. */
  1349. int
  1350. mpt_resume(struct pci_dev *pdev)
  1351. {
  1352. MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
  1353. u32 device_state = pdev->current_state;
  1354. int recovery_state;
  1355. int ii;
  1356. printk(MYIOC_s_INFO_FMT
  1357. "pci-resume: pdev=0x%p, slot=%s, Previous operating state [D%d]\n",
  1358. ioc->name, pdev, pci_name(pdev), device_state);
  1359. pci_set_power_state(pdev, 0);
  1360. pci_restore_state(pdev);
  1361. pci_enable_device(pdev);
  1362. /* enable interrupts */
  1363. CHIPREG_WRITE32(&ioc->chip->IntMask, ~(MPI_HIM_RIM));
  1364. ioc->active = 1;
  1365. /* F/W not running */
  1366. if(!CHIPREG_READ32(&ioc->chip->Doorbell)) {
  1367. /* enable domain validation flags */
  1368. for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
  1369. ioc->spi_data.dvStatus[ii] |= MPT_SCSICFG_NEED_DV;
  1370. }
  1371. }
  1372. printk(MYIOC_s_INFO_FMT
  1373. "pci-resume: ioc-state=0x%x,doorbell=0x%x\n",
  1374. ioc->name,
  1375. (mpt_GetIocState(ioc, 1) >> MPI_IOC_STATE_SHIFT),
  1376. CHIPREG_READ32(&ioc->chip->Doorbell));
  1377. /* bring ioc to operational state */
  1378. if ((recovery_state = mpt_do_ioc_recovery(ioc,
  1379. MPT_HOSTEVENT_IOC_RECOVER, CAN_SLEEP)) != 0) {
  1380. printk(MYIOC_s_INFO_FMT
  1381. "pci-resume: Cannot recover, error:[%x]\n",
  1382. ioc->name, recovery_state);
  1383. } else {
  1384. printk(MYIOC_s_INFO_FMT
  1385. "pci-resume: success\n", ioc->name);
  1386. }
  1387. return 0;
  1388. }
  1389. #endif
  1390. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1391. /*
  1392. * mpt_do_ioc_recovery - Initialize or recover MPT adapter.
  1393. * @ioc: Pointer to MPT adapter structure
  1394. * @reason: Event word / reason
  1395. * @sleepFlag: Use schedule if CAN_SLEEP else use udelay.
  1396. *
  1397. * This routine performs all the steps necessary to bring the IOC
  1398. * to a OPERATIONAL state.
  1399. *
  1400. * This routine also pre-fetches the LAN MAC address of a Fibre Channel
  1401. * MPT adapter.
  1402. *
  1403. * Returns:
  1404. * 0 for success
  1405. * -1 if failed to get board READY
  1406. * -2 if READY but IOCFacts Failed
  1407. * -3 if READY but PrimeIOCFifos Failed
  1408. * -4 if READY but IOCInit Failed
  1409. */
  1410. static int
  1411. mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag)
  1412. {
  1413. int hard_reset_done = 0;
  1414. int alt_ioc_ready = 0;
  1415. int hard;
  1416. int rc=0;
  1417. int ii;
  1418. int handlers;
  1419. int ret = 0;
  1420. int reset_alt_ioc_active = 0;
  1421. printk(KERN_INFO MYNAM ": Initiating %s %s\n",
  1422. ioc->name, reason==MPT_HOSTEVENT_IOC_BRINGUP ? "bringup" : "recovery");
  1423. /* Disable reply interrupts (also blocks FreeQ) */
  1424. CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
  1425. ioc->active = 0;
  1426. if (ioc->alt_ioc) {
  1427. if (ioc->alt_ioc->active)
  1428. reset_alt_ioc_active = 1;
  1429. /* Disable alt-IOC's reply interrupts (and FreeQ) for a bit ... */
  1430. CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, 0xFFFFFFFF);
  1431. ioc->alt_ioc->active = 0;
  1432. }
  1433. hard = 1;
  1434. if (reason == MPT_HOSTEVENT_IOC_BRINGUP)
  1435. hard = 0;
  1436. if ((hard_reset_done = MakeIocReady(ioc, hard, sleepFlag)) < 0) {
  1437. if (hard_reset_done == -4) {
  1438. printk(KERN_WARNING MYNAM ": %s Owned by PEER..skipping!\n",
  1439. ioc->name);
  1440. if (reset_alt_ioc_active && ioc->alt_ioc) {
  1441. /* (re)Enable alt-IOC! (reply interrupt, FreeQ) */
  1442. dprintk((KERN_INFO MYNAM ": alt-%s reply irq re-enabled\n",
  1443. ioc->alt_ioc->name));
  1444. CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, ~(MPI_HIM_RIM));
  1445. ioc->alt_ioc->active = 1;
  1446. }
  1447. } else {
  1448. printk(KERN_WARNING MYNAM ": %s NOT READY WARNING!\n",
  1449. ioc->name);
  1450. }
  1451. return -1;
  1452. }
  1453. /* hard_reset_done = 0 if a soft reset was performed
  1454. * and 1 if a hard reset was performed.
  1455. */
  1456. if (hard_reset_done && reset_alt_ioc_active && ioc->alt_ioc) {
  1457. if ((rc = MakeIocReady(ioc->alt_ioc, 0, sleepFlag)) == 0)
  1458. alt_ioc_ready = 1;
  1459. else
  1460. printk(KERN_WARNING MYNAM
  1461. ": alt-%s: Not ready WARNING!\n",
  1462. ioc->alt_ioc->name);
  1463. }
  1464. for (ii=0; ii<5; ii++) {
  1465. /* Get IOC facts! Allow 5 retries */
  1466. if ((rc = GetIocFacts(ioc, sleepFlag, reason)) == 0)
  1467. break;
  1468. }
  1469. if (ii == 5) {
  1470. dinitprintk((MYIOC_s_INFO_FMT "Retry IocFacts failed rc=%x\n", ioc->name, rc));
  1471. ret = -2;
  1472. } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
  1473. MptDisplayIocCapabilities(ioc);
  1474. }
  1475. if (alt_ioc_ready) {
  1476. if ((rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason)) != 0) {
  1477. dinitprintk((MYIOC_s_INFO_FMT "Initial Alt IocFacts failed rc=%x\n", ioc->name, rc));
  1478. /* Retry - alt IOC was initialized once
  1479. */
  1480. rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason);
  1481. }
  1482. if (rc) {
  1483. dinitprintk((MYIOC_s_INFO_FMT "Retry Alt IocFacts failed rc=%x\n", ioc->name, rc));
  1484. alt_ioc_ready = 0;
  1485. reset_alt_ioc_active = 0;
  1486. } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
  1487. MptDisplayIocCapabilities(ioc->alt_ioc);
  1488. }
  1489. }
  1490. /* Prime reply & request queues!
  1491. * (mucho alloc's) Must be done prior to
  1492. * init as upper addresses are needed for init.
  1493. * If fails, continue with alt-ioc processing
  1494. */
  1495. if ((ret == 0) && ((rc = PrimeIocFifos(ioc)) != 0))
  1496. ret = -3;
  1497. /* May need to check/upload firmware & data here!
  1498. * If fails, continue with alt-ioc processing
  1499. */
  1500. if ((ret == 0) && ((rc = SendIocInit(ioc, sleepFlag)) != 0))
  1501. ret = -4;
  1502. // NEW!
  1503. if (alt_ioc_ready && ((rc = PrimeIocFifos(ioc->alt_ioc)) != 0)) {
  1504. printk(KERN_WARNING MYNAM ": alt-%s: (%d) FIFO mgmt alloc WARNING!\n",
  1505. ioc->alt_ioc->name, rc);
  1506. alt_ioc_ready = 0;
  1507. reset_alt_ioc_active = 0;
  1508. }
  1509. if (alt_ioc_ready) {
  1510. if ((rc = SendIocInit(ioc->alt_ioc, sleepFlag)) != 0) {
  1511. alt_ioc_ready = 0;
  1512. reset_alt_ioc_active = 0;
  1513. printk(KERN_WARNING MYNAM
  1514. ": alt-%s: (%d) init failure WARNING!\n",
  1515. ioc->alt_ioc->name, rc);
  1516. }
  1517. }
  1518. if (reason == MPT_HOSTEVENT_IOC_BRINGUP){
  1519. if (ioc->upload_fw) {
  1520. ddlprintk((MYIOC_s_INFO_FMT
  1521. "firmware upload required!\n", ioc->name));
  1522. /* Controller is not operational, cannot do upload
  1523. */
  1524. if (ret == 0) {
  1525. rc = mpt_do_upload(ioc, sleepFlag);
  1526. if (rc == 0) {
  1527. if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
  1528. /*
  1529. * Maintain only one pointer to FW memory
  1530. * so there will not be two attempt to
  1531. * downloadboot onboard dual function
  1532. * chips (mpt_adapter_disable,
  1533. * mpt_diag_reset)
  1534. */
  1535. ioc->cached_fw = NULL;
  1536. ddlprintk((MYIOC_s_INFO_FMT ": mpt_upload: alt_%s has cached_fw=%p \n",
  1537. ioc->name, ioc->alt_ioc->name, ioc->alt_ioc->cached_fw));
  1538. }
  1539. } else {
  1540. printk(KERN_WARNING MYNAM ": firmware upload failure!\n");
  1541. ret = -5;
  1542. }
  1543. }
  1544. }
  1545. }
  1546. if (ret == 0) {
  1547. /* Enable! (reply interrupt) */
  1548. CHIPREG_WRITE32(&ioc->chip->IntMask, ~(MPI_HIM_RIM));
  1549. ioc->active = 1;
  1550. }
  1551. if (reset_alt_ioc_active && ioc->alt_ioc) {
  1552. /* (re)Enable alt-IOC! (reply interrupt) */
  1553. dinitprintk((KERN_INFO MYNAM ": alt-%s reply irq re-enabled\n",
  1554. ioc->alt_ioc->name));
  1555. CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, ~(MPI_HIM_RIM));
  1556. ioc->alt_ioc->active = 1;
  1557. }
  1558. /* Enable MPT base driver management of EventNotification
  1559. * and EventAck handling.
  1560. */
  1561. if ((ret == 0) && (!ioc->facts.EventState))
  1562. (void) SendEventNotification(ioc, 1); /* 1=Enable EventNotification */
  1563. if (ioc->alt_ioc && alt_ioc_ready && !ioc->alt_ioc->facts.EventState)
  1564. (void) SendEventNotification(ioc->alt_ioc, 1); /* 1=Enable EventNotification */
  1565. /* Add additional "reason" check before call to GetLanConfigPages
  1566. * (combined with GetIoUnitPage2 call). This prevents a somewhat
  1567. * recursive scenario; GetLanConfigPages times out, timer expired
  1568. * routine calls HardResetHandler, which calls into here again,
  1569. * and we try GetLanConfigPages again...
  1570. */
  1571. if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP)) {
  1572. if (ioc->bus_type == SAS) {
  1573. /* clear persistency table */
  1574. if(ioc->facts.IOCExceptions &
  1575. MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL) {
  1576. ret = mptbase_sas_persist_operation(ioc,
  1577. MPI_SAS_OP_CLEAR_NOT_PRESENT);
  1578. if(ret != 0)
  1579. return -1;
  1580. }
  1581. /* Find IM volumes
  1582. */
  1583. mpt_findImVolumes(ioc);
  1584. } else if (ioc->bus_type == FC) {
  1585. /*
  1586. * Pre-fetch FC port WWN and stuff...
  1587. * (FCPortPage0_t stuff)
  1588. */
  1589. for (ii=0; ii < ioc->facts.NumberOfPorts; ii++) {
  1590. (void) GetFcPortPage0(ioc, ii);
  1591. }
  1592. if ((ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) &&
  1593. (ioc->lan_cnfg_page0.Header.PageLength == 0)) {
  1594. /*
  1595. * Pre-fetch the ports LAN MAC address!
  1596. * (LANPage1_t stuff)
  1597. */
  1598. (void) GetLanConfigPages(ioc);
  1599. #ifdef MPT_DEBUG
  1600. {
  1601. u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
  1602. dprintk((MYIOC_s_INFO_FMT "LanAddr = %02X:%02X:%02X:%02X:%02X:%02X\n",
  1603. ioc->name, a[5], a[4], a[3], a[2], a[1], a[0] ));
  1604. }
  1605. #endif
  1606. }
  1607. } else {
  1608. /* Get NVRAM and adapter maximums from SPP 0 and 2
  1609. */
  1610. mpt_GetScsiPortSettings(ioc, 0);
  1611. /* Get version and length of SDP 1
  1612. */
  1613. mpt_readScsiDevicePageHeaders(ioc, 0);
  1614. /* Find IM volumes
  1615. */
  1616. if (ioc->facts.MsgVersion >= MPI_VERSION_01_02)
  1617. mpt_findImVolumes(ioc);
  1618. /* Check, and possibly reset, the coalescing value
  1619. */
  1620. mpt_read_ioc_pg_1(ioc);
  1621. mpt_read_ioc_pg_4(ioc);
  1622. }
  1623. GetIoUnitPage2(ioc);
  1624. }
  1625. /*
  1626. * Call each currently registered protocol IOC reset handler
  1627. * with post-reset indication.
  1628. * NOTE: If we're doing _IOC_BRINGUP, there can be no
  1629. * MptResetHandlers[] registered yet.
  1630. */
  1631. if (hard_reset_done) {
  1632. rc = handlers = 0;
  1633. for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) {
  1634. if ((ret == 0) && MptResetHandlers[ii]) {
  1635. dprintk((MYIOC_s_INFO_FMT "Calling IOC post_reset handler #%d\n",
  1636. ioc->name, ii));
  1637. rc += (*(MptResetHandlers[ii]))(ioc, MPT_IOC_POST_RESET);
  1638. handlers++;
  1639. }
  1640. if (alt_ioc_ready && MptResetHandlers[ii]) {
  1641. drsprintk((MYIOC_s_INFO_FMT "Calling alt-%s post_reset handler #%d\n",
  1642. ioc->name, ioc->alt_ioc->name, ii));
  1643. rc += (*(MptResetHandlers[ii]))(ioc->alt_ioc, MPT_IOC_POST_RESET);
  1644. handlers++;
  1645. }
  1646. }
  1647. /* FIXME? Examine results here? */
  1648. }
  1649. return ret;
  1650. }
  1651. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1652. /*
  1653. * mpt_detect_bound_ports - Search for PCI bus/dev_function
  1654. * which matches PCI bus/dev_function (+/-1) for newly discovered 929,
  1655. * 929X, 1030 or 1035.
  1656. * @ioc: Pointer to MPT adapter structure
  1657. * @pdev: Pointer to (struct pci_dev) structure
  1658. *
  1659. * If match on PCI dev_function +/-1 is found, bind the two MPT adapters
  1660. * using alt_ioc pointer fields in their %MPT_ADAPTER structures.
  1661. */
  1662. static void
  1663. mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev)
  1664. {
  1665. struct pci_dev *peer=NULL;
  1666. unsigned int slot = PCI_SLOT(pdev->devfn);
  1667. unsigned int func = PCI_FUNC(pdev->devfn);
  1668. MPT_ADAPTER *ioc_srch;
  1669. dprintk((MYIOC_s_INFO_FMT "PCI device %s devfn=%x/%x,"
  1670. " searching for devfn match on %x or %x\n",
  1671. ioc->name, pci_name(pdev), pdev->bus->number,
  1672. pdev->devfn, func-1, func+1));
  1673. peer = pci_get_slot(pdev->bus, PCI_DEVFN(slot,func-1));
  1674. if (!peer) {
  1675. peer = pci_get_slot(pdev->bus, PCI_DEVFN(slot,func+1));
  1676. if (!peer)
  1677. return;
  1678. }
  1679. list_for_each_entry(ioc_srch, &ioc_list, list) {
  1680. struct pci_dev *_pcidev = ioc_srch->pcidev;
  1681. if (_pcidev == peer) {
  1682. /* Paranoia checks */
  1683. if (ioc->alt_ioc != NULL) {
  1684. printk(KERN_WARNING MYNAM ": Oops, already bound (%s <==> %s)!\n",
  1685. ioc->name, ioc->alt_ioc->name);
  1686. break;
  1687. } else if (ioc_srch->alt_ioc != NULL) {
  1688. printk(KERN_WARNING MYNAM ": Oops, already bound (%s <==> %s)!\n",
  1689. ioc_srch->name, ioc_srch->alt_ioc->name);
  1690. break;
  1691. }
  1692. dprintk((KERN_INFO MYNAM ": FOUND! binding %s <==> %s\n",
  1693. ioc->name, ioc_srch->name));
  1694. ioc_srch->alt_ioc = ioc;
  1695. ioc->alt_ioc = ioc_srch;
  1696. }
  1697. }
  1698. pci_dev_put(peer);
  1699. }
  1700. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1701. /*
  1702. * mpt_adapter_disable - Disable misbehaving MPT adapter.
  1703. * @this: Pointer to MPT adapter structure
  1704. */
  1705. static void
  1706. mpt_adapter_disable(MPT_ADAPTER *ioc)
  1707. {
  1708. int sz;
  1709. int ret;
  1710. if (ioc->cached_fw != NULL) {
  1711. ddlprintk((KERN_INFO MYNAM ": mpt_adapter_disable: Pushing FW onto adapter\n"));
  1712. if ((ret = mpt_downloadboot(ioc, (MpiFwHeader_t *)ioc->cached_fw, NO_SLEEP)) < 0) {
  1713. printk(KERN_WARNING MYNAM
  1714. ": firmware downloadboot failure (%d)!\n", ret);
  1715. }
  1716. }
  1717. /* Disable adapter interrupts! */
  1718. CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
  1719. ioc->active = 0;
  1720. /* Clear any lingering interrupt */
  1721. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  1722. if (ioc->alloc != NULL) {
  1723. sz = ioc->alloc_sz;
  1724. dexitprintk((KERN_INFO MYNAM ": %s.free @ %p, sz=%d bytes\n",
  1725. ioc->name, ioc->alloc, ioc->alloc_sz));
  1726. pci_free_consistent(ioc->pcidev, sz,
  1727. ioc->alloc, ioc->alloc_dma);
  1728. ioc->reply_frames = NULL;
  1729. ioc->req_frames = NULL;
  1730. ioc->alloc = NULL;
  1731. ioc->alloc_total -= sz;
  1732. }
  1733. if (ioc->sense_buf_pool != NULL) {
  1734. sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
  1735. pci_free_consistent(ioc->pcidev, sz,
  1736. ioc->sense_buf_pool, ioc->sense_buf_pool_dma);
  1737. ioc->sense_buf_pool = NULL;
  1738. ioc->alloc_total -= sz;
  1739. }
  1740. if (ioc->events != NULL){
  1741. sz = MPTCTL_EVENT_LOG_SIZE * sizeof(MPT_IOCTL_EVENTS);
  1742. kfree(ioc->events);
  1743. ioc->events = NULL;
  1744. ioc->alloc_total -= sz;
  1745. }
  1746. if (ioc->cached_fw != NULL) {
  1747. sz = ioc->facts.FWImageSize;
  1748. pci_free_consistent(ioc->pcidev, sz,
  1749. ioc->cached_fw, ioc->cached_fw_dma);
  1750. ioc->cached_fw = NULL;
  1751. ioc->alloc_total -= sz;
  1752. }
  1753. kfree(ioc->spi_data.nvram);
  1754. kfree(ioc->raid_data.pIocPg3);
  1755. ioc->spi_data.nvram = NULL;
  1756. ioc->raid_data.pIocPg3 = NULL;
  1757. if (ioc->spi_data.pIocPg4 != NULL) {
  1758. sz = ioc->spi_data.IocPg4Sz;
  1759. pci_free_consistent(ioc->pcidev, sz,
  1760. ioc->spi_data.pIocPg4,
  1761. ioc->spi_data.IocPg4_dma);
  1762. ioc->spi_data.pIocPg4 = NULL;
  1763. ioc->alloc_total -= sz;
  1764. }
  1765. if (ioc->ReqToChain != NULL) {
  1766. kfree(ioc->ReqToChain);
  1767. kfree(ioc->RequestNB);
  1768. ioc->ReqToChain = NULL;
  1769. }
  1770. kfree(ioc->ChainToChain);
  1771. ioc->ChainToChain = NULL;
  1772. if (ioc->HostPageBuffer != NULL) {
  1773. if((ret = mpt_host_page_access_control(ioc,
  1774. MPI_DB_HPBAC_FREE_BUFFER, NO_SLEEP)) != 0) {
  1775. printk(KERN_ERR MYNAM
  1776. ": %s: host page buffers free failed (%d)!\n",
  1777. __FUNCTION__, ret);
  1778. }
  1779. dexitprintk((KERN_INFO MYNAM ": %s HostPageBuffer free @ %p, sz=%d bytes\n",
  1780. ioc->name, ioc->HostPageBuffer, ioc->HostPageBuffer_sz));
  1781. pci_free_consistent(ioc->pcidev, ioc->HostPageBuffer_sz,
  1782. ioc->HostPageBuffer,
  1783. ioc->HostPageBuffer_dma);
  1784. ioc->HostPageBuffer = NULL;
  1785. ioc->HostPageBuffer_sz = 0;
  1786. ioc->alloc_total -= ioc->HostPageBuffer_sz;
  1787. }
  1788. }
  1789. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1790. /*
  1791. * mpt_adapter_dispose - Free all resources associated with a MPT
  1792. * adapter.
  1793. * @ioc: Pointer to MPT adapter structure
  1794. *
  1795. * This routine unregisters h/w resources and frees all alloc'd memory
  1796. * associated with a MPT adapter structure.
  1797. */
  1798. static void
  1799. mpt_adapter_dispose(MPT_ADAPTER *ioc)
  1800. {
  1801. int sz_first, sz_last;
  1802. if (ioc == NULL)
  1803. return;
  1804. sz_first = ioc->alloc_total;
  1805. mpt_adapter_disable(ioc);
  1806. if (ioc->pci_irq != -1) {
  1807. free_irq(ioc->pci_irq, ioc);
  1808. ioc->pci_irq = -1;
  1809. }
  1810. if (ioc->memmap != NULL) {
  1811. iounmap(ioc->memmap);
  1812. ioc->memmap = NULL;
  1813. }
  1814. #if defined(CONFIG_MTRR) && 0
  1815. if (ioc->mtrr_reg > 0) {
  1816. mtrr_del(ioc->mtrr_reg, 0, 0);
  1817. dprintk((KERN_INFO MYNAM ": %s: MTRR region de-registered\n", ioc->name));
  1818. }
  1819. #endif
  1820. /* Zap the adapter lookup ptr! */
  1821. list_del(&ioc->list);
  1822. sz_last = ioc->alloc_total;
  1823. dprintk((KERN_INFO MYNAM ": %s: free'd %d of %d bytes\n",
  1824. ioc->name, sz_first-sz_last+(int)sizeof(*ioc), sz_first));
  1825. kfree(ioc);
  1826. }
  1827. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1828. /*
  1829. * MptDisplayIocCapabilities - Disply IOC's capacilities.
  1830. * @ioc: Pointer to MPT adapter structure
  1831. */
  1832. static void
  1833. MptDisplayIocCapabilities(MPT_ADAPTER *ioc)
  1834. {
  1835. int i = 0;
  1836. printk(KERN_INFO "%s: ", ioc->name);
  1837. if (ioc->prod_name && strlen(ioc->prod_name) > 3)
  1838. printk("%s: ", ioc->prod_name+3);
  1839. printk("Capabilities={");
  1840. if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_INITIATOR) {
  1841. printk("Initiator");
  1842. i++;
  1843. }
  1844. if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
  1845. printk("%sTarget", i ? "," : "");
  1846. i++;
  1847. }
  1848. if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) {
  1849. printk("%sLAN", i ? "," : "");
  1850. i++;
  1851. }
  1852. #if 0
  1853. /*
  1854. * This would probably evoke more questions than it's worth
  1855. */
  1856. if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
  1857. printk("%sLogBusAddr", i ? "," : "");
  1858. i++;
  1859. }
  1860. #endif
  1861. printk("}\n");
  1862. }
  1863. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1864. /*
  1865. * MakeIocReady - Get IOC to a READY state, using KickStart if needed.
  1866. * @ioc: Pointer to MPT_ADAPTER structure
  1867. * @force: Force hard KickStart of IOC
  1868. * @sleepFlag: Specifies whether the process can sleep
  1869. *
  1870. * Returns:
  1871. * 1 - DIAG reset and READY
  1872. * 0 - READY initially OR soft reset and READY
  1873. * -1 - Any failure on KickStart
  1874. * -2 - Msg Unit Reset Failed
  1875. * -3 - IO Unit Reset Failed
  1876. * -4 - IOC owned by a PEER
  1877. */
  1878. static int
  1879. MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag)
  1880. {
  1881. u32 ioc_state;
  1882. int statefault = 0;
  1883. int cntdn;
  1884. int hard_reset_done = 0;
  1885. int r;
  1886. int ii;
  1887. int whoinit;
  1888. /* Get current [raw] IOC state */
  1889. ioc_state = mpt_GetIocState(ioc, 0);
  1890. dhsprintk((KERN_INFO MYNAM "::MakeIocReady, %s [raw] state=%08x\n", ioc->name, ioc_state));
  1891. /*
  1892. * Check to see if IOC got left/stuck in doorbell handshake
  1893. * grip of death. If so, hard reset the IOC.
  1894. */
  1895. if (ioc_state & MPI_DOORBELL_ACTIVE) {
  1896. statefault = 1;
  1897. printk(MYIOC_s_WARN_FMT "Unexpected doorbell active!\n",
  1898. ioc->name);
  1899. }
  1900. /* Is it already READY? */
  1901. if (!statefault && (ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_READY)
  1902. return 0;
  1903. /*
  1904. * Check to see if IOC is in FAULT state.
  1905. */
  1906. if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_FAULT) {
  1907. statefault = 2;
  1908. printk(MYIOC_s_WARN_FMT "IOC is in FAULT state!!!\n",
  1909. ioc->name);
  1910. printk(KERN_WARNING " FAULT code = %04xh\n",
  1911. ioc_state & MPI_DOORBELL_DATA_MASK);
  1912. }
  1913. /*
  1914. * Hmmm... Did it get left operational?
  1915. */
  1916. if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_OPERATIONAL) {
  1917. dinitprintk((MYIOC_s_INFO_FMT "IOC operational unexpected\n",
  1918. ioc->name));
  1919. /* Check WhoInit.
  1920. * If PCI Peer, exit.
  1921. * Else, if no fault conditions are present, issue a MessageUnitReset
  1922. * Else, fall through to KickStart case
  1923. */
  1924. whoinit = (ioc_state & MPI_DOORBELL_WHO_INIT_MASK) >> MPI_DOORBELL_WHO_INIT_SHIFT;
  1925. dinitprintk((KERN_INFO MYNAM
  1926. ": whoinit 0x%x statefault %d force %d\n",
  1927. whoinit, statefault, force));
  1928. if (whoinit == MPI_WHOINIT_PCI_PEER)
  1929. return -4;
  1930. else {
  1931. if ((statefault == 0 ) && (force == 0)) {
  1932. if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) == 0)
  1933. return 0;
  1934. }
  1935. statefault = 3;
  1936. }
  1937. }
  1938. hard_reset_done = KickStart(ioc, statefault||force, sleepFlag);
  1939. if (hard_reset_done < 0)
  1940. return -1;
  1941. /*
  1942. * Loop here waiting for IOC to come READY.
  1943. */
  1944. ii = 0;
  1945. cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 5; /* 5 seconds */
  1946. while ((ioc_state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
  1947. if (ioc_state == MPI_IOC_STATE_OPERATIONAL) {
  1948. /*
  1949. * BIOS or previous driver load left IOC in OP state.
  1950. * Reset messaging FIFOs.
  1951. */
  1952. if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) != 0) {
  1953. printk(MYIOC_s_ERR_FMT "IOC msg unit reset failed!\n", ioc->name);
  1954. return -2;
  1955. }
  1956. } else if (ioc_state == MPI_IOC_STATE_RESET) {
  1957. /*
  1958. * Something is wrong. Try to get IOC back
  1959. * to a known state.
  1960. */
  1961. if ((r = SendIocReset(ioc, MPI_FUNCTION_IO_UNIT_RESET, sleepFlag)) != 0) {
  1962. printk(MYIOC_s_ERR_FMT "IO unit reset failed!\n", ioc->name);
  1963. return -3;
  1964. }
  1965. }
  1966. ii++; cntdn--;
  1967. if (!cntdn) {
  1968. printk(MYIOC_s_ERR_FMT "Wait IOC_READY state timeout(%d)!\n",
  1969. ioc->name, (int)((ii+5)/HZ));
  1970. return -ETIME;
  1971. }
  1972. if (sleepFlag == CAN_SLEEP) {
  1973. msleep_interruptible(1);
  1974. } else {
  1975. mdelay (1); /* 1 msec delay */
  1976. }
  1977. }
  1978. if (statefault < 3) {
  1979. printk(MYIOC_s_INFO_FMT "Recovered from %s\n",
  1980. ioc->name,
  1981. statefault==1 ? "stuck handshake" : "IOC FAULT");
  1982. }
  1983. return hard_reset_done;
  1984. }
  1985. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1986. /*
  1987. * mpt_GetIocState - Get the current state of a MPT adapter.
  1988. * @ioc: Pointer to MPT_ADAPTER structure
  1989. * @cooked: Request raw or cooked IOC state
  1990. *
  1991. * Returns all IOC Doorbell register bits if cooked==0, else just the
  1992. * Doorbell bits in MPI_IOC_STATE_MASK.
  1993. */
  1994. u32
  1995. mpt_GetIocState(MPT_ADAPTER *ioc, int cooked)
  1996. {
  1997. u32 s, sc;
  1998. /* Get! */
  1999. s = CHIPREG_READ32(&ioc->chip->Doorbell);
  2000. // dprintk((MYIOC_s_INFO_FMT "raw state = %08x\n", ioc->name, s));
  2001. sc = s & MPI_IOC_STATE_MASK;
  2002. /* Save! */
  2003. ioc->last_state = sc;
  2004. return cooked ? sc : s;
  2005. }
  2006. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  2007. /*
  2008. * GetIocFacts - Send IOCFacts request to MPT adapter.
  2009. * @ioc: Pointer to MPT_ADAPTER structure
  2010. * @sleepFlag: Specifies whether the process can sleep
  2011. * @reason: If recovery, only update facts.
  2012. *
  2013. * Returns 0 for success, non-zero for failure.
  2014. */
  2015. static int
  2016. GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason)
  2017. {
  2018. IOCFacts_t get_facts;
  2019. IOCFactsReply_t *facts;
  2020. int r;
  2021. int req_sz;
  2022. int reply_sz;
  2023. int sz;
  2024. u32 status, vv;
  2025. u8 shiftFactor=1;
  2026. /* IOC *must* NOT be in RESET state! */
  2027. if (ioc->last_state == MPI_IOC_STATE_RESET) {
  2028. printk(KERN_ERR MYNAM ": ERROR - Can't get IOCFacts, %s NOT READY! (%08x)\n",
  2029. ioc->name,
  2030. ioc->last_state );
  2031. return -44;
  2032. }
  2033. facts = &ioc->facts;
  2034. /* Destination (reply area)... */
  2035. reply_sz = sizeof(*facts);
  2036. memset(facts, 0, reply_sz);
  2037. /* Request area (get_facts on the stack right now!) */
  2038. req_sz = sizeof(get_facts);
  2039. memset(&get_facts, 0, req_sz);
  2040. get_facts.Function = MPI_FUNCTION_IOC_FACTS;
  2041. /* Assert: All other get_facts fields are zero! */
  2042. dinitprintk((MYIOC_s_INFO_FMT
  2043. "Sending get IocFacts request req_sz=%d reply_sz=%d\n",
  2044. ioc->name, req_sz, reply_sz));
  2045. /* No non-zero fields in the get_facts request are greater than
  2046. * 1 byte in size, so we can just fire it off as is.
  2047. */
  2048. r = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_facts,
  2049. reply_sz, (u16*)facts, 5 /*seconds*/, sleepFlag);
  2050. if (r != 0)
  2051. return r;
  2052. /*
  2053. * Now byte swap (GRRR) the necessary fields before any further
  2054. * inspection of reply contents.
  2055. *
  2056. * But need to do some sanity checks on MsgLength (byte) field
  2057. * to make sure we don't zero IOC's req_sz!
  2058. */
  2059. /* Did we get a valid reply? */
  2060. if (facts->MsgLength > offsetof(IOCFactsReply_t, RequestFrameSize)/sizeof(u32)) {
  2061. if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
  2062. /*
  2063. * If not been here, done that, save off first WhoInit value
  2064. */
  2065. if (ioc->FirstWhoInit == WHOINIT_UNKNOWN)
  2066. ioc->FirstWhoInit = facts->WhoInit;
  2067. }
  2068. facts->MsgVersion = le16_to_cpu(facts->MsgVersion);
  2069. facts->MsgContext = le32_to_cpu(facts->MsgContext);
  2070. facts->IOCExceptions = le16_to_cpu(facts->IOCExceptions);
  2071. facts->IOCStatus = le16_to_cpu(facts->IOCStatus);
  2072. facts->IOCLogInfo = le32_to_cpu(facts->IOCLogInfo);
  2073. status = le16_to_cpu(facts->IOCStatus) & MPI_IOCSTATUS_MASK;
  2074. /* CHECKME! IOCStatus, IOCLogInfo */
  2075. facts->ReplyQueueDepth = le16_to_cpu(facts->ReplyQueueDepth);
  2076. facts->RequestFrameSize = le16_to_cpu(facts->RequestFrameSize);
  2077. /*
  2078. * FC f/w version changed between 1.1 and 1.2
  2079. * Old: u16{Major(4),Minor(4),SubMinor(8)}
  2080. * New: u32{Major(8),Minor(8),Unit(8),Dev(8)}
  2081. */
  2082. if (facts->MsgVersion < 0x0102) {
  2083. /*
  2084. * Handle old FC f/w style, convert to new...
  2085. */
  2086. u16 oldv = le16_to_cpu(facts->Reserved_0101_FWVersion);
  2087. facts->FWVersion.Word =
  2088. ((oldv<<12) & 0xFF000000) |
  2089. ((oldv<<8) & 0x000FFF00);
  2090. } else
  2091. facts->FWVersion.Word = le32_to_cpu(facts->FWVersion.Word);
  2092. facts->ProductID = le16_to_cpu(facts->ProductID);
  2093. facts->CurrentHostMfaHighAddr =
  2094. le32_to_cpu(facts->CurrentHostMfaHighAddr);
  2095. facts->GlobalCredits = le16_to_cpu(facts->GlobalCredits);
  2096. facts->CurrentSenseBufferHighAddr =
  2097. le32_to_cpu(facts->CurrentSenseBufferHighAddr);
  2098. facts->CurReplyFrameSize =
  2099. le16_to_cpu(facts->CurReplyFrameSize);
  2100. facts->IOCCapabilities = le32_to_cpu(facts->IOCCapabilities);
  2101. /*
  2102. * Handle NEW (!) IOCFactsReply fields in MPI-1.01.xx
  2103. * Older MPI-1.00.xx struct had 13 dwords, and enlarged
  2104. * to 14 in MPI-1.01.0x.
  2105. */
  2106. if (facts->MsgLength >= (offsetof(IOCFactsReply_t,FWImageSize) + 7)/4 &&
  2107. facts->MsgVersion > 0x0100) {
  2108. facts->FWImageSize = le32_to_cpu(facts->FWImageSize);
  2109. }
  2110. sz = facts->FWImageSize;
  2111. if ( sz & 0x01 )
  2112. sz += 1;
  2113. if ( sz & 0x02 )
  2114. sz += 2;
  2115. facts->FWImageSize = sz;
  2116. if (!facts->RequestFrameSize) {
  2117. /* Something is wrong! */
  2118. printk(MYIOC_s_ERR_FMT "IOC reported invalid 0 request size!\n",
  2119. ioc->name);
  2120. return -55;
  2121. }
  2122. r = sz = facts->BlockSize;
  2123. vv = ((63 / (sz * 4)) + 1) & 0x03;
  2124. ioc->NB_for_64_byte_frame = vv;
  2125. while ( sz )
  2126. {
  2127. shiftFactor++;
  2128. sz = sz >> 1;
  2129. }
  2130. ioc->NBShiftFactor = shiftFactor;
  2131. dinitprintk((MYIOC_s_INFO_FMT "NB_for_64_byte_frame=%x NBShiftFactor=%x BlockSize=%x\n",
  2132. ioc->name, vv, shiftFactor, r));
  2133. if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
  2134. /*
  2135. * Set values for this IOC's request & reply frame sizes,
  2136. * and request & reply queue depths...
  2137. */
  2138. ioc->req_sz = min(MPT_DEFAULT_FRAME_SIZE, facts->RequestFrameSize * 4);
  2139. ioc->req_depth = min_t(int, MPT_MAX_REQ_DEPTH, facts->GlobalCredits);
  2140. ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
  2141. ioc->reply_depth = min_t(int, MPT_DEFAULT_REPLY_DEPTH, facts->ReplyQueueDepth);
  2142. dinitprintk((MYIOC_s_INFO_FMT "reply_sz=%3d, reply_depth=%4d\n",
  2143. ioc->name, ioc->reply_sz, ioc->reply_depth));
  2144. dinitprintk((MYIOC_s_INFO_FMT "req_sz =%3d, req_depth =%4d\n",
  2145. ioc->name, ioc->req_sz, ioc->req_depth));
  2146. /* Get port facts! */
  2147. if ( (r = GetPortFacts(ioc, 0, sleepFlag)) != 0 )
  2148. return r;
  2149. }
  2150. } else {
  2151. printk(MYIOC_s_ERR_FMT
  2152. "Invalid IOC facts reply, msgLength=%d offsetof=%zd!\n",
  2153. ioc->name, facts->MsgLength, (offsetof(IOCFactsReply_t,
  2154. RequestFrameSize)/sizeof(u32)));
  2155. return -66;
  2156. }
  2157. return 0;
  2158. }
  2159. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  2160. /*
  2161. * GetPortFacts - Send PortFacts request to MPT adapter.
  2162. * @ioc: Pointer to MPT_ADAPTER structure
  2163. * @portnum: Port number
  2164. * @sleepFlag: Specifies whether the process can sleep
  2165. *
  2166. * Returns 0 for success, non-zero for failure.
  2167. */
  2168. static int
  2169. GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
  2170. {
  2171. PortFacts_t get_pfacts;
  2172. PortFactsReply_t *pfacts;
  2173. int ii;
  2174. int req_sz;
  2175. int reply_sz;
  2176. /* IOC *must* NOT be in RESET state! */
  2177. if (ioc->last_state == MPI_IOC_STATE_RESET) {
  2178. printk(KERN_ERR MYNAM ": ERROR - Can't get PortFacts, %s NOT READY! (%08x)\n",
  2179. ioc->name,
  2180. ioc->last_state );
  2181. return -4;
  2182. }
  2183. pfacts = &ioc->pfacts[portnum];
  2184. /* Destination (reply area)... */
  2185. reply_sz = sizeof(*pfacts);
  2186. memset(pfacts, 0, reply_sz);
  2187. /* Request area (get_pfacts on the stack right now!) */
  2188. req_sz = sizeof(get_pfacts);
  2189. memset(&get_pfacts, 0, req_sz);
  2190. get_pfacts.Function = MPI_FUNCTION_PORT_FACTS;
  2191. get_pfacts.PortNumber = portnum;
  2192. /* Assert: All other get_pfacts fields are zero! */
  2193. dinitprintk((MYIOC_s_INFO_FMT "Sending get PortFacts(%d) request\n",
  2194. ioc->name, portnum));
  2195. /* No non-zero fields in the get_pfacts request are greater than
  2196. * 1 byte in size, so we can just fire it off as is.
  2197. */
  2198. ii = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_pfacts,
  2199. reply_sz, (u16*)pfacts, 5 /*seconds*/, sleepFlag);
  2200. if (ii != 0)
  2201. return ii;
  2202. /* Did we get a valid reply? */
  2203. /* Now byte swap the necessary fields in the response. */
  2204. pfacts->MsgContext = le32_to_cpu(pfacts->MsgContext);
  2205. pfacts->IOCStatus = le16_to_cpu(pfacts->IOCStatus);
  2206. pfacts->IOCLogInfo = le32_to_cpu(pfacts->IOCLogInfo);
  2207. pfacts->MaxDevices = le16_to_cpu(pfacts->MaxDevices);
  2208. pfacts->PortSCSIID = le16_to_cpu(pfacts->PortSCSIID);
  2209. pfacts->ProtocolFlags = le16_to_cpu(pfacts->ProtocolFlags);
  2210. pfacts->MaxPostedCmdBuffers = le16_to_cpu(pfacts->MaxPostedCmdBuffers);
  2211. pfacts->MaxPersistentIDs = le16_to_cpu(pfacts->MaxPersistentIDs);
  2212. pfacts->MaxLanBuckets = le16_to_cpu(pfacts->MaxLanBuckets);
  2213. return 0;
  2214. }
  2215. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  2216. /*
  2217. * SendIocInit - Send IOCInit request to MPT adapter.
  2218. * @ioc: Pointer to MPT_ADAPTER structure
  2219. * @sleepFlag: Specifies whether the process can sleep
  2220. *
  2221. * Send IOCInit followed by PortEnable to bring IOC to OPERATIONAL state.
  2222. *
  2223. * Returns 0 for success, non-zero for failure.
  2224. */
  2225. static int
  2226. SendIocInit(MPT_ADAPTER *ioc, int sleepFlag)
  2227. {
  2228. IOCInit_t ioc_init;
  2229. MPIDefaultReply_t init_reply;
  2230. u32 state;
  2231. int r;
  2232. int count;
  2233. int cntdn;
  2234. memset(&ioc_init, 0, sizeof(ioc_init));
  2235. memset(&init_reply, 0, sizeof(init_reply));
  2236. ioc_init.WhoInit = MPI_WHOINIT_HOST_DRIVER;
  2237. ioc_init.Function = MPI_FUNCTION_IOC_INIT;
  2238. /* If we are in a recovery mode and we uploaded the FW image,
  2239. * then this pointer is not NULL. Skip the upload a second time.
  2240. * Set this flag if cached_fw set for either IOC.
  2241. */
  2242. if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)
  2243. ioc->upload_fw = 1;
  2244. else
  2245. ioc->upload_fw = 0;
  2246. ddlprintk((MYIOC_s_INFO_FMT "upload_fw %d facts.Flags=%x\n",
  2247. ioc->name, ioc->upload_fw, ioc->facts.Flags));
  2248. if(ioc->bus_type == SAS)
  2249. ioc_init.MaxDevices = ioc->facts.MaxDevices;
  2250. else if(ioc->bus_type == FC)
  2251. ioc_init.MaxDevices = MPT_MAX_FC_DEVICES;
  2252. else
  2253. ioc_init.MaxDevices = MPT_MAX_SCSI_DEVICES;
  2254. ioc_init.MaxBuses = MPT_MAX_BUS;
  2255. dinitprintk((MYIOC_s_INFO_FMT "facts.MsgVersion=%x\n",
  2256. ioc->name, ioc->facts.MsgVersion));
  2257. if (ioc->facts.MsgVersion >= MPI_VERSION_01_05) {
  2258. // set MsgVersion and HeaderVersion host driver was built with
  2259. ioc_init.MsgVersion = cpu_to_le16(MPI_VERSION);
  2260. ioc_init.HeaderVersion = cpu_to_le16(MPI_HEADER_VERSION);
  2261. if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT) {
  2262. ioc_init.HostPageBufferSGE = ioc->facts.HostPageBufferSGE;
  2263. } else if(mpt_host_page_alloc(ioc, &ioc_init))
  2264. return -99;
  2265. }
  2266. ioc_init.ReplyFrameSize = cpu_to_le16(ioc->reply_sz); /* in BYTES */
  2267. if (sizeof(dma_addr_t) == sizeof(u64)) {
  2268. /* Save the upper 32-bits of the request
  2269. * (reply) and sense buffers.
  2270. */
  2271. ioc_init.HostMfaHighAddr = cpu_to_le32((u32)((u64)ioc->alloc_dma >> 32));
  2272. ioc_init.SenseBufferHighAddr = cpu_to_le32((u32)((u64)ioc->sense_buf_pool_dma >> 32));
  2273. } else {
  2274. /* Force 32-bit addressing */
  2275. ioc_init.HostMfaHighAddr = cpu_to_le32(0);
  2276. ioc_init.SenseBufferHighAddr = cpu_to_le32(0);
  2277. }
  2278. ioc->facts.CurrentHostMfaHighAddr = ioc_init.HostMfaHighAddr;
  2279. ioc->facts.CurrentSenseBufferHighAddr = ioc_init.SenseBufferHighAddr;
  2280. ioc->facts.MaxDevices = ioc_init.MaxDevices;
  2281. ioc->facts.MaxBuses = ioc_init.MaxBuses;
  2282. dhsprintk((MYIOC_s_INFO_FMT "Sending IOCInit (req @ %p)\n",
  2283. ioc->name, &ioc_init));
  2284. r = mpt_handshake_req_reply_wait(ioc, sizeof(IOCInit_t), (u32*)&ioc_init,
  2285. sizeof(MPIDefaultReply_t), (u16*)&init_reply, 10 /*seconds*/, sleepFlag);
  2286. if (r != 0) {
  2287. printk(MYIOC_s_ERR_FMT "Sending IOCInit failed(%d)!\n",ioc->name, r);
  2288. return r;
  2289. }
  2290. /* No need to byte swap the multibyte fields in the reply
  2291. * since we don't even look at it's contents.
  2292. */
  2293. dhsprintk((MYIOC_s_INFO_FMT "Sending PortEnable (req @ %p)\n",
  2294. ioc->name, &ioc_init));
  2295. if ((r = SendPortEnable(ioc, 0, sleepFlag)) != 0) {
  2296. printk(MYIOC_s_ERR_FMT "Sending PortEnable failed(%d)!\n",ioc->name, r);
  2297. return r;
  2298. }
  2299. /* YIKES! SUPER IMPORTANT!!!
  2300. * Poll IocState until _OPERATIONAL while IOC is doing
  2301. * LoopInit and TargetDiscovery!
  2302. */
  2303. count = 0;
  2304. cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 60; /* 60 seconds */
  2305. state = mpt_GetIocState(ioc, 1);
  2306. while (state != MPI_IOC_STATE_OPERATIONAL && --cntdn) {
  2307. if (sleepFlag == CAN_SLEEP) {
  2308. msleep_interruptible(1);
  2309. } else {
  2310. mdelay(1);
  2311. }
  2312. if (!cntdn) {
  2313. printk(MYIOC_s_ERR_FMT "Wait IOC_OP state timeout(%d)!\n",
  2314. ioc->name, (int)((count+5)/HZ));
  2315. return -9;
  2316. }
  2317. state = mpt_GetIocState(ioc, 1);
  2318. count++;
  2319. }
  2320. dinitprintk((MYIOC_s_INFO_FMT "INFO - Wait IOC_OPERATIONAL state (cnt=%d)\n",
  2321. ioc->name, count));
  2322. return r;
  2323. }
  2324. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  2325. /*
  2326. * SendPortEnable - Send PortEnable request to MPT adapter port.
  2327. * @ioc: Pointer to MPT_ADAPTER structure
  2328. * @portnum: Port number to enable
  2329. * @sleepFlag: Specifies whether the process can sleep
  2330. *
  2331. * Send PortEnable to bring IOC to OPERATIONAL state.
  2332. *
  2333. * Returns 0 for success, non-zero for failure.
  2334. */
  2335. static int
  2336. SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
  2337. {
  2338. PortEnable_t port_enable;
  2339. MPIDefaultReply_t reply_buf;
  2340. int rc;
  2341. int req_sz;
  2342. int reply_sz;
  2343. /* Destination... */
  2344. reply_sz = sizeof(MPIDefaultReply_t);
  2345. memset(&reply_buf, 0, reply_sz);
  2346. req_sz = sizeof(PortEnable_t);
  2347. memset(&port_enable, 0, req_sz);
  2348. port_enable.Function = MPI_FUNCTION_PORT_ENABLE;
  2349. port_enable.PortNumber = portnum;
  2350. /* port_enable.ChainOffset = 0; */
  2351. /* port_enable.MsgFlags = 0; */
  2352. /* port_enable.MsgContext = 0; */
  2353. dinitprintk((MYIOC_s_INFO_FMT "Sending Port(%d)Enable (req @ %p)\n",
  2354. ioc->name, portnum, &port_enable));
  2355. /* RAID FW may take a long time to enable
  2356. */
  2357. if ( (ioc->facts.ProductID & MPI_FW_HEADER_PID_PROD_MASK)
  2358. > MPI_FW_HEADER_PID_PROD_TARGET_SCSI ) {
  2359. rc = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&port_enable,
  2360. reply_sz, (u16*)&reply_buf, 300 /*seconds*/, sleepFlag);
  2361. } else {
  2362. rc = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&port_enable,
  2363. reply_sz, (u16*)&reply_buf, 30 /*seconds*/, sleepFlag);
  2364. }
  2365. return rc;
  2366. }
  2367. /*
  2368. * ioc: Pointer to MPT_ADAPTER structure
  2369. * size - total FW bytes
  2370. */
  2371. void
  2372. mpt_alloc_fw_memory(MPT_ADAPTER *ioc, int size)
  2373. {
  2374. if (ioc->cached_fw)
  2375. return; /* use already allocated memory */
  2376. if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
  2377. ioc->cached_fw = ioc->alt_ioc->cached_fw; /* use alt_ioc's memory */
  2378. ioc->cached_fw_dma = ioc->alt_ioc->cached_fw_dma;
  2379. } else {
  2380. if ( (ioc->cached_fw = pci_alloc_consistent(ioc->pcidev, size, &ioc->cached_fw_dma) ) )
  2381. ioc->alloc_total += size;
  2382. }
  2383. }
  2384. /*
  2385. * If alt_img is NULL, delete from ioc structure.
  2386. * Else, delete a secondary image in same format.
  2387. */
  2388. void
  2389. mpt_free_fw_memory(MPT_ADAPTER *ioc)
  2390. {
  2391. int sz;
  2392. sz = ioc->facts.FWImageSize;
  2393. dinitprintk((KERN_INFO MYNAM "free_fw_memory: FW Image @ %p[%p], sz=%d[%x] bytes\n",
  2394. ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
  2395. pci_free_consistent(ioc->pcidev, sz,
  2396. ioc->cached_fw, ioc->cached_fw_dma);
  2397. ioc->cached_fw = NULL;
  2398. return;
  2399. }
  2400. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  2401. /*
  2402. * mpt_do_upload - Construct and Send FWUpload request to MPT adapter port.
  2403. * @ioc: Pointer to MPT_ADAPTER structure
  2404. * @sleepFlag: Specifies whether the process can sleep
  2405. *
  2406. * Returns 0 for success, >0 for handshake failure
  2407. * <0 for fw upload failure.
  2408. *
  2409. * Remark: If bound IOC and a successful FWUpload was performed
  2410. * on the bound IOC, the second image is discarded
  2411. * and memory is free'd. Both channels must upload to prevent
  2412. * IOC from running in degraded mode.
  2413. */
  2414. static int
  2415. mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag)
  2416. {
  2417. u8 request[ioc->req_sz];
  2418. u8 reply[sizeof(FWUploadReply_t)];
  2419. FWUpload_t *prequest;
  2420. FWUploadReply_t *preply;
  2421. FWUploadTCSGE_t *ptcsge;
  2422. int sgeoffset;
  2423. u32 flagsLength;
  2424. int ii, sz, reply_sz;
  2425. int cmdStatus;
  2426. /* If the image size is 0, we are done.
  2427. */
  2428. if ((sz = ioc->facts.FWImageSize) == 0)
  2429. return 0;
  2430. mpt_alloc_fw_memory(ioc, sz);
  2431. dinitprintk((KERN_INFO MYNAM ": FW Image @ %p[%p], sz=%d[%x] bytes\n",
  2432. ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
  2433. if (ioc->cached_fw == NULL) {
  2434. /* Major Failure.
  2435. */
  2436. return -ENOMEM;
  2437. }
  2438. prequest = (FWUpload_t *)&request;
  2439. preply = (FWUploadReply_t *)&reply;
  2440. /* Destination... */
  2441. memset(prequest, 0, ioc->req_sz);
  2442. reply_sz = sizeof(reply);
  2443. memset(preply, 0, reply_sz);
  2444. prequest->ImageType = MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM;
  2445. prequest->Function = MPI_FUNCTION_FW_UPLOAD;
  2446. ptcsge = (FWUploadTCSGE_t *) &prequest->SGL;
  2447. ptcsge->DetailsLength = 12;
  2448. ptcsge->Flags = MPI_SGE_FLAGS_TRANSACTION_ELEMENT;
  2449. ptcsge->ImageSize = cpu_to_le32(sz);
  2450. sgeoffset = sizeof(FWUpload_t) - sizeof(SGE_MPI_UNION) + sizeof(FWUploadTCSGE_t);
  2451. flagsLength = MPT_SGE_FLAGS_SSIMPLE_READ | sz;
  2452. mpt_add_sge(&request[sgeoffset], flagsLength, ioc->cached_fw_dma);
  2453. sgeoffset += sizeof(u32) + sizeof(dma_addr_t);
  2454. dinitprintk((KERN_INFO MYNAM ": Sending FW Upload (req @ %p) sgeoffset=%d \n",
  2455. prequest, sgeoffset));
  2456. DBG_DUMP_FW_REQUEST_FRAME(prequest)
  2457. ii = mpt_handshake_req_reply_wait(ioc, sgeoffset, (u32*)prequest,
  2458. reply_sz, (u16*)preply, 65 /*seconds*/, sleepFlag);
  2459. dinitprintk((KERN_INFO MYNAM ": FW Upload completed rc=%x \n", ii));
  2460. cmdStatus = -EFAULT;
  2461. if (ii == 0) {
  2462. /* Handshake transfer was complete and successful.
  2463. * Check the Reply Frame.
  2464. */
  2465. int status, transfer_sz;
  2466. status = le16_to_cpu(preply->IOCStatus);
  2467. if (status == MPI_IOCSTATUS_SUCCESS) {
  2468. transfer_sz = le32_to_cpu(preply->ActualImageSize);
  2469. if (transfer_sz == sz)
  2470. cmdStatus = 0;
  2471. }
  2472. }
  2473. dinitprintk((MYIOC_s_INFO_FMT ": do_upload cmdStatus=%d \n",
  2474. ioc->name, cmdStatus));
  2475. if (cmdStatus) {
  2476. ddlprintk((MYIOC_s_INFO_FMT ": fw upload failed, freeing image \n",
  2477. ioc->name));
  2478. mpt_free_fw_memory(ioc);
  2479. }
  2480. return cmdStatus;
  2481. }
  2482. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  2483. /*
  2484. * mpt_downloadboot - DownloadBoot code
  2485. * @ioc: Pointer to MPT_ADAPTER structure
  2486. * @flag: Specify which part of IOC memory is to be uploaded.
  2487. * @sleepFlag: Specifies whether the process can sleep
  2488. *
  2489. * FwDownloadBoot requires Programmed IO access.
  2490. *
  2491. * Returns 0 for success
  2492. * -1 FW Image size is 0
  2493. * -2 No valid cached_fw Pointer
  2494. * <0 for fw upload failure.
  2495. */
  2496. static int
  2497. mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag)
  2498. {
  2499. MpiExtImageHeader_t *pExtImage;
  2500. u32 fwSize;
  2501. u32 diag0val;
  2502. int count;
  2503. u32 *ptrFw;
  2504. u32 diagRwData;
  2505. u32 nextImage;
  2506. u32 load_addr;
  2507. u32 ioc_state=0;
  2508. ddlprintk((MYIOC_s_INFO_FMT "downloadboot: fw size 0x%x (%d), FW Ptr %p\n",
  2509. ioc->name, pFwHeader->ImageSize, pFwHeader->ImageSize, pFwHeader));
  2510. CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
  2511. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
  2512. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
  2513. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
  2514. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
  2515. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
  2516. CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM));
  2517. /* wait 1 msec */
  2518. if (sleepFlag == CAN_SLEEP) {
  2519. msleep_interruptible(1);
  2520. } else {
  2521. mdelay (1);
  2522. }
  2523. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2524. CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
  2525. for (count = 0; count < 30; count ++) {
  2526. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2527. if (!(diag0val & MPI_DIAG_RESET_ADAPTER)) {
  2528. ddlprintk((MYIOC_s_INFO_FMT "RESET_ADAPTER cleared, count=%d\n",
  2529. ioc->name, count));
  2530. break;
  2531. }
  2532. /* wait .1 sec */
  2533. if (sleepFlag == CAN_SLEEP) {
  2534. msleep_interruptible (100);
  2535. } else {
  2536. mdelay (100);
  2537. }
  2538. }
  2539. if ( count == 30 ) {
  2540. ddlprintk((MYIOC_s_INFO_FMT "downloadboot failed! "
  2541. "Unable to get MPI_DIAG_DRWE mode, diag0val=%x\n",
  2542. ioc->name, diag0val));
  2543. return -3;
  2544. }
  2545. CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
  2546. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
  2547. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
  2548. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
  2549. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
  2550. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
  2551. /* Set the DiagRwEn and Disable ARM bits */
  2552. CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_RW_ENABLE | MPI_DIAG_DISABLE_ARM));
  2553. fwSize = (pFwHeader->ImageSize + 3)/4;
  2554. ptrFw = (u32 *) pFwHeader;
  2555. /* Write the LoadStartAddress to the DiagRw Address Register
  2556. * using Programmed IO
  2557. */
  2558. if (ioc->errata_flag_1064)
  2559. pci_enable_io_access(ioc->pcidev);
  2560. CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->LoadStartAddress);
  2561. ddlprintk((MYIOC_s_INFO_FMT "LoadStart addr written 0x%x \n",
  2562. ioc->name, pFwHeader->LoadStartAddress));
  2563. ddlprintk((MYIOC_s_INFO_FMT "Write FW Image: 0x%x bytes @ %p\n",
  2564. ioc->name, fwSize*4, ptrFw));
  2565. while (fwSize--) {
  2566. CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
  2567. }
  2568. nextImage = pFwHeader->NextImageHeaderOffset;
  2569. while (nextImage) {
  2570. pExtImage = (MpiExtImageHeader_t *) ((char *)pFwHeader + nextImage);
  2571. load_addr = pExtImage->LoadStartAddress;
  2572. fwSize = (pExtImage->ImageSize + 3) >> 2;
  2573. ptrFw = (u32 *)pExtImage;
  2574. ddlprintk((MYIOC_s_INFO_FMT "Write Ext Image: 0x%x (%d) bytes @ %p load_addr=%x\n",
  2575. ioc->name, fwSize*4, fwSize*4, ptrFw, load_addr));
  2576. CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, load_addr);
  2577. while (fwSize--) {
  2578. CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
  2579. }
  2580. nextImage = pExtImage->NextImageHeaderOffset;
  2581. }
  2582. /* Write the IopResetVectorRegAddr */
  2583. ddlprintk((MYIOC_s_INFO_FMT "Write IopResetVector Addr=%x! \n", ioc->name, pFwHeader->IopResetRegAddr));
  2584. CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->IopResetRegAddr);
  2585. /* Write the IopResetVectorValue */
  2586. ddlprintk((MYIOC_s_INFO_FMT "Write IopResetVector Value=%x! \n", ioc->name, pFwHeader->IopResetVectorValue));
  2587. CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, pFwHeader->IopResetVectorValue);
  2588. /* Clear the internal flash bad bit - autoincrementing register,
  2589. * so must do two writes.
  2590. */
  2591. if (ioc->bus_type == SCSI) {
  2592. /*
  2593. * 1030 and 1035 H/W errata, workaround to access
  2594. * the ClearFlashBadSignatureBit
  2595. */
  2596. CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
  2597. diagRwData = CHIPREG_PIO_READ32(&ioc->pio_chip->DiagRwData);
  2598. diagRwData |= 0x40000000;
  2599. CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
  2600. CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, diagRwData);
  2601. } else /* if((ioc->bus_type == SAS) || (ioc->bus_type == FC)) */ {
  2602. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2603. CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val |
  2604. MPI_DIAG_CLEAR_FLASH_BAD_SIG);
  2605. /* wait 1 msec */
  2606. if (sleepFlag == CAN_SLEEP) {
  2607. msleep_interruptible (1);
  2608. } else {
  2609. mdelay (1);
  2610. }
  2611. }
  2612. if (ioc->errata_flag_1064)
  2613. pci_disable_io_access(ioc->pcidev);
  2614. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2615. ddlprintk((MYIOC_s_INFO_FMT "downloadboot diag0val=%x, "
  2616. "turning off PREVENT_IOC_BOOT, DISABLE_ARM, RW_ENABLE\n",
  2617. ioc->name, diag0val));
  2618. diag0val &= ~(MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM | MPI_DIAG_RW_ENABLE);
  2619. ddlprintk((MYIOC_s_INFO_FMT "downloadboot now diag0val=%x\n",
  2620. ioc->name, diag0val));
  2621. CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
  2622. /* Write 0xFF to reset the sequencer */
  2623. CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
  2624. if (ioc->bus_type == SAS) {
  2625. ioc_state = mpt_GetIocState(ioc, 0);
  2626. if ( (GetIocFacts(ioc, sleepFlag,
  2627. MPT_HOSTEVENT_IOC_BRINGUP)) != 0 ) {
  2628. ddlprintk((MYIOC_s_INFO_FMT "GetIocFacts failed: IocState=%x\n",
  2629. ioc->name, ioc_state));
  2630. return -EFAULT;
  2631. }
  2632. }
  2633. for (count=0; count<HZ*20; count++) {
  2634. if ((ioc_state = mpt_GetIocState(ioc, 0)) & MPI_IOC_STATE_READY) {
  2635. ddlprintk((MYIOC_s_INFO_FMT "downloadboot successful! (count=%d) IocState=%x\n",
  2636. ioc->name, count, ioc_state));
  2637. if (ioc->bus_type == SAS) {
  2638. return 0;
  2639. }
  2640. if ((SendIocInit(ioc, sleepFlag)) != 0) {
  2641. ddlprintk((MYIOC_s_INFO_FMT "downloadboot: SendIocInit failed\n",
  2642. ioc->name));
  2643. return -EFAULT;
  2644. }
  2645. ddlprintk((MYIOC_s_INFO_FMT "downloadboot: SendIocInit successful\n",
  2646. ioc->name));
  2647. return 0;
  2648. }
  2649. if (sleepFlag == CAN_SLEEP) {
  2650. msleep_interruptible (10);
  2651. } else {
  2652. mdelay (10);
  2653. }
  2654. }
  2655. ddlprintk((MYIOC_s_INFO_FMT "downloadboot failed! IocState=%x\n",
  2656. ioc->name, ioc_state));
  2657. return -EFAULT;
  2658. }
  2659. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  2660. /*
  2661. * KickStart - Perform hard reset of MPT adapter.
  2662. * @ioc: Pointer to MPT_ADAPTER structure
  2663. * @force: Force hard reset
  2664. * @sleepFlag: Specifies whether the process can sleep
  2665. *
  2666. * This routine places MPT adapter in diagnostic mode via the
  2667. * WriteSequence register, and then performs a hard reset of adapter
  2668. * via the Diagnostic register.
  2669. *
  2670. * Inputs: sleepflag - CAN_SLEEP (non-interrupt thread)
  2671. * or NO_SLEEP (interrupt thread, use mdelay)
  2672. * force - 1 if doorbell active, board fault state
  2673. * board operational, IOC_RECOVERY or
  2674. * IOC_BRINGUP and there is an alt_ioc.
  2675. * 0 else
  2676. *
  2677. * Returns:
  2678. * 1 - hard reset, READY
  2679. * 0 - no reset due to History bit, READY
  2680. * -1 - no reset due to History bit but not READY
  2681. * OR reset but failed to come READY
  2682. * -2 - no reset, could not enter DIAG mode
  2683. * -3 - reset but bad FW bit
  2684. */
  2685. static int
  2686. KickStart(MPT_ADAPTER *ioc, int force, int sleepFlag)
  2687. {
  2688. int hard_reset_done = 0;
  2689. u32 ioc_state=0;
  2690. int cnt,cntdn;
  2691. dinitprintk((KERN_WARNING MYNAM ": KickStarting %s!\n", ioc->name));
  2692. if (ioc->bus_type == SCSI) {
  2693. /* Always issue a Msg Unit Reset first. This will clear some
  2694. * SCSI bus hang conditions.
  2695. */
  2696. SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag);
  2697. if (sleepFlag == CAN_SLEEP) {
  2698. msleep_interruptible (1000);
  2699. } else {
  2700. mdelay (1000);
  2701. }
  2702. }
  2703. hard_reset_done = mpt_diag_reset(ioc, force, sleepFlag);
  2704. if (hard_reset_done < 0)
  2705. return hard_reset_done;
  2706. dinitprintk((MYIOC_s_INFO_FMT "Diagnostic reset successful!\n",
  2707. ioc->name));
  2708. cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 2; /* 2 seconds */
  2709. for (cnt=0; cnt<cntdn; cnt++) {
  2710. ioc_state = mpt_GetIocState(ioc, 1);
  2711. if ((ioc_state == MPI_IOC_STATE_READY) || (ioc_state == MPI_IOC_STATE_OPERATIONAL)) {
  2712. dinitprintk((MYIOC_s_INFO_FMT "KickStart successful! (cnt=%d)\n",
  2713. ioc->name, cnt));
  2714. return hard_reset_done;
  2715. }
  2716. if (sleepFlag == CAN_SLEEP) {
  2717. msleep_interruptible (10);
  2718. } else {
  2719. mdelay (10);
  2720. }
  2721. }
  2722. printk(MYIOC_s_ERR_FMT "Failed to come READY after reset! IocState=%x\n",
  2723. ioc->name, ioc_state);
  2724. return -1;
  2725. }
  2726. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  2727. /*
  2728. * mpt_diag_reset - Perform hard reset of the adapter.
  2729. * @ioc: Pointer to MPT_ADAPTER structure
  2730. * @ignore: Set if to honor and clear to ignore
  2731. * the reset history bit
  2732. * @sleepflag: CAN_SLEEP if called in a non-interrupt thread,
  2733. * else set to NO_SLEEP (use mdelay instead)
  2734. *
  2735. * This routine places the adapter in diagnostic mode via the
  2736. * WriteSequence register and then performs a hard reset of adapter
  2737. * via the Diagnostic register. Adapter should be in ready state
  2738. * upon successful completion.
  2739. *
  2740. * Returns: 1 hard reset successful
  2741. * 0 no reset performed because reset history bit set
  2742. * -2 enabling diagnostic mode failed
  2743. * -3 diagnostic reset failed
  2744. */
  2745. static int
  2746. mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag)
  2747. {
  2748. u32 diag0val;
  2749. u32 doorbell;
  2750. int hard_reset_done = 0;
  2751. int count = 0;
  2752. #ifdef MPT_DEBUG
  2753. u32 diag1val = 0;
  2754. #endif
  2755. /* Clear any existing interrupts */
  2756. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  2757. /* Use "Diagnostic reset" method! (only thing available!) */
  2758. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2759. #ifdef MPT_DEBUG
  2760. if (ioc->alt_ioc)
  2761. diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
  2762. dprintk((MYIOC_s_INFO_FMT "DbG1: diag0=%08x, diag1=%08x\n",
  2763. ioc->name, diag0val, diag1val));
  2764. #endif
  2765. /* Do the reset if we are told to ignore the reset history
  2766. * or if the reset history is 0
  2767. */
  2768. if (ignore || !(diag0val & MPI_DIAG_RESET_HISTORY)) {
  2769. while ((diag0val & MPI_DIAG_DRWE) == 0) {
  2770. /* Write magic sequence to WriteSequence register
  2771. * Loop until in diagnostic mode
  2772. */
  2773. CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
  2774. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
  2775. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
  2776. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
  2777. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
  2778. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
  2779. /* wait 100 msec */
  2780. if (sleepFlag == CAN_SLEEP) {
  2781. msleep_interruptible (100);
  2782. } else {
  2783. mdelay (100);
  2784. }
  2785. count++;
  2786. if (count > 20) {
  2787. printk(MYIOC_s_ERR_FMT "Enable Diagnostic mode FAILED! (%02xh)\n",
  2788. ioc->name, diag0val);
  2789. return -2;
  2790. }
  2791. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2792. dprintk((MYIOC_s_INFO_FMT "Wrote magic DiagWriteEn sequence (%x)\n",
  2793. ioc->name, diag0val));
  2794. }
  2795. #ifdef MPT_DEBUG
  2796. if (ioc->alt_ioc)
  2797. diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
  2798. dprintk((MYIOC_s_INFO_FMT "DbG2: diag0=%08x, diag1=%08x\n",
  2799. ioc->name, diag0val, diag1val));
  2800. #endif
  2801. /*
  2802. * Disable the ARM (Bug fix)
  2803. *
  2804. */
  2805. CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_DISABLE_ARM);
  2806. mdelay(1);
  2807. /*
  2808. * Now hit the reset bit in the Diagnostic register
  2809. * (THE BIG HAMMER!) (Clears DRWE bit).
  2810. */
  2811. CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
  2812. hard_reset_done = 1;
  2813. dprintk((MYIOC_s_INFO_FMT "Diagnostic reset performed\n",
  2814. ioc->name));
  2815. /*
  2816. * Call each currently registered protocol IOC reset handler
  2817. * with pre-reset indication.
  2818. * NOTE: If we're doing _IOC_BRINGUP, there can be no
  2819. * MptResetHandlers[] registered yet.
  2820. */
  2821. {
  2822. int ii;
  2823. int r = 0;
  2824. for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) {
  2825. if (MptResetHandlers[ii]) {
  2826. dprintk((MYIOC_s_INFO_FMT "Calling IOC pre_reset handler #%d\n",
  2827. ioc->name, ii));
  2828. r += (*(MptResetHandlers[ii]))(ioc, MPT_IOC_PRE_RESET);
  2829. if (ioc->alt_ioc) {
  2830. dprintk((MYIOC_s_INFO_FMT "Calling alt-%s pre_reset handler #%d\n",
  2831. ioc->name, ioc->alt_ioc->name, ii));
  2832. r += (*(MptResetHandlers[ii]))(ioc->alt_ioc, MPT_IOC_PRE_RESET);
  2833. }
  2834. }
  2835. }
  2836. /* FIXME? Examine results here? */
  2837. }
  2838. if (ioc->cached_fw) {
  2839. /* If the DownloadBoot operation fails, the
  2840. * IOC will be left unusable. This is a fatal error
  2841. * case. _diag_reset will return < 0
  2842. */
  2843. for (count = 0; count < 30; count ++) {
  2844. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2845. if (!(diag0val & MPI_DIAG_RESET_ADAPTER)) {
  2846. break;
  2847. }
  2848. /* wait 1 sec */
  2849. if (sleepFlag == CAN_SLEEP) {
  2850. msleep_interruptible (1000);
  2851. } else {
  2852. mdelay (1000);
  2853. }
  2854. }
  2855. if ((count = mpt_downloadboot(ioc,
  2856. (MpiFwHeader_t *)ioc->cached_fw, sleepFlag)) < 0) {
  2857. printk(KERN_WARNING MYNAM
  2858. ": firmware downloadboot failure (%d)!\n", count);
  2859. }
  2860. } else {
  2861. /* Wait for FW to reload and for board
  2862. * to go to the READY state.
  2863. * Maximum wait is 60 seconds.
  2864. * If fail, no error will check again
  2865. * with calling program.
  2866. */
  2867. for (count = 0; count < 60; count ++) {
  2868. doorbell = CHIPREG_READ32(&ioc->chip->Doorbell);
  2869. doorbell &= MPI_IOC_STATE_MASK;
  2870. if (doorbell == MPI_IOC_STATE_READY) {
  2871. break;
  2872. }
  2873. /* wait 1 sec */
  2874. if (sleepFlag == CAN_SLEEP) {
  2875. msleep_interruptible (1000);
  2876. } else {
  2877. mdelay (1000);
  2878. }
  2879. }
  2880. }
  2881. }
  2882. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2883. #ifdef MPT_DEBUG
  2884. if (ioc->alt_ioc)
  2885. diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
  2886. dprintk((MYIOC_s_INFO_FMT "DbG3: diag0=%08x, diag1=%08x\n",
  2887. ioc->name, diag0val, diag1val));
  2888. #endif
  2889. /* Clear RESET_HISTORY bit! Place board in the
  2890. * diagnostic mode to update the diag register.
  2891. */
  2892. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2893. count = 0;
  2894. while ((diag0val & MPI_DIAG_DRWE) == 0) {
  2895. /* Write magic sequence to WriteSequence register
  2896. * Loop until in diagnostic mode
  2897. */
  2898. CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
  2899. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
  2900. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
  2901. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
  2902. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
  2903. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
  2904. /* wait 100 msec */
  2905. if (sleepFlag == CAN_SLEEP) {
  2906. msleep_interruptible (100);
  2907. } else {
  2908. mdelay (100);
  2909. }
  2910. count++;
  2911. if (count > 20) {
  2912. printk(MYIOC_s_ERR_FMT "Enable Diagnostic mode FAILED! (%02xh)\n",
  2913. ioc->name, diag0val);
  2914. break;
  2915. }
  2916. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2917. }
  2918. diag0val &= ~MPI_DIAG_RESET_HISTORY;
  2919. CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
  2920. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2921. if (diag0val & MPI_DIAG_RESET_HISTORY) {
  2922. printk(MYIOC_s_WARN_FMT "ResetHistory bit failed to clear!\n",
  2923. ioc->name);
  2924. }
  2925. /* Disable Diagnostic Mode
  2926. */
  2927. CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFFFFFFFF);
  2928. /* Check FW reload status flags.
  2929. */
  2930. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2931. if (diag0val & (MPI_DIAG_FLASH_BAD_SIG | MPI_DIAG_RESET_ADAPTER | MPI_DIAG_DISABLE_ARM)) {
  2932. printk(MYIOC_s_ERR_FMT "Diagnostic reset FAILED! (%02xh)\n",
  2933. ioc->name, diag0val);
  2934. return -3;
  2935. }
  2936. #ifdef MPT_DEBUG
  2937. if (ioc->alt_ioc)
  2938. diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
  2939. dprintk((MYIOC_s_INFO_FMT "DbG4: diag0=%08x, diag1=%08x\n",
  2940. ioc->name, diag0val, diag1val));
  2941. #endif
  2942. /*
  2943. * Reset flag that says we've enabled event notification
  2944. */
  2945. ioc->facts.EventState = 0;
  2946. if (ioc->alt_ioc)
  2947. ioc->alt_ioc->facts.EventState = 0;
  2948. return hard_reset_done;
  2949. }
  2950. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  2951. /*
  2952. * SendIocReset - Send IOCReset request to MPT adapter.
  2953. * @ioc: Pointer to MPT_ADAPTER structure
  2954. * @reset_type: reset type, expected values are
  2955. * %MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET or %MPI_FUNCTION_IO_UNIT_RESET
  2956. *
  2957. * Send IOCReset request to the MPT adapter.
  2958. *
  2959. * Returns 0 for success, non-zero for failure.
  2960. */
  2961. static int
  2962. SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag)
  2963. {
  2964. int r;
  2965. u32 state;
  2966. int cntdn, count;
  2967. drsprintk((KERN_INFO MYNAM ": %s: Sending IOC reset(0x%02x)!\n",
  2968. ioc->name, reset_type));
  2969. CHIPREG_WRITE32(&ioc->chip->Doorbell, reset_type<<MPI_DOORBELL_FUNCTION_SHIFT);
  2970. if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
  2971. return r;
  2972. /* FW ACK'd request, wait for READY state
  2973. */
  2974. count = 0;
  2975. cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 15; /* 15 seconds */
  2976. while ((state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
  2977. cntdn--;
  2978. count++;
  2979. if (!cntdn) {
  2980. if (sleepFlag != CAN_SLEEP)
  2981. count *= 10;
  2982. printk(KERN_ERR MYNAM ": %s: ERROR - Wait IOC_READY state timeout(%d)!\n",
  2983. ioc->name, (int)((count+5)/HZ));
  2984. return -ETIME;
  2985. }
  2986. if (sleepFlag == CAN_SLEEP) {
  2987. msleep_interruptible(1);
  2988. } else {
  2989. mdelay (1); /* 1 msec delay */
  2990. }
  2991. }
  2992. /* TODO!
  2993. * Cleanup all event stuff for this IOC; re-issue EventNotification
  2994. * request if needed.
  2995. */
  2996. if (ioc->facts.Function)
  2997. ioc->facts.EventState = 0;
  2998. return 0;
  2999. }
  3000. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3001. /*
  3002. * initChainBuffers - Allocate memory for and initialize
  3003. * chain buffers, chain buffer control arrays and spinlock.
  3004. * @hd: Pointer to MPT_SCSI_HOST structure
  3005. * @init: If set, initialize the spin lock.
  3006. */
  3007. static int
  3008. initChainBuffers(MPT_ADAPTER *ioc)
  3009. {
  3010. u8 *mem;
  3011. int sz, ii, num_chain;
  3012. int scale, num_sge, numSGE;
  3013. /* ReqToChain size must equal the req_depth
  3014. * index = req_idx
  3015. */
  3016. if (ioc->ReqToChain == NULL) {
  3017. sz = ioc->req_depth * sizeof(int);
  3018. mem = kmalloc(sz, GFP_ATOMIC);
  3019. if (mem == NULL)
  3020. return -1;
  3021. ioc->ReqToChain = (int *) mem;
  3022. dinitprintk((KERN_INFO MYNAM ": %s ReqToChain alloc @ %p, sz=%d bytes\n",
  3023. ioc->name, mem, sz));
  3024. mem = kmalloc(sz, GFP_ATOMIC);
  3025. if (mem == NULL)
  3026. return -1;
  3027. ioc->RequestNB = (int *) mem;
  3028. dinitprintk((KERN_INFO MYNAM ": %s RequestNB alloc @ %p, sz=%d bytes\n",
  3029. ioc->name, mem, sz));
  3030. }
  3031. for (ii = 0; ii < ioc->req_depth; ii++) {
  3032. ioc->ReqToChain[ii] = MPT_HOST_NO_CHAIN;
  3033. }
  3034. /* ChainToChain size must equal the total number
  3035. * of chain buffers to be allocated.
  3036. * index = chain_idx
  3037. *
  3038. * Calculate the number of chain buffers needed(plus 1) per I/O
  3039. * then multiply the the maximum number of simultaneous cmds
  3040. *
  3041. * num_sge = num sge in request frame + last chain buffer
  3042. * scale = num sge per chain buffer if no chain element
  3043. */
  3044. scale = ioc->req_sz/(sizeof(dma_addr_t) + sizeof(u32));
  3045. if (sizeof(dma_addr_t) == sizeof(u64))
  3046. num_sge = scale + (ioc->req_sz - 60) / (sizeof(dma_addr_t) + sizeof(u32));
  3047. else
  3048. num_sge = 1+ scale + (ioc->req_sz - 64) / (sizeof(dma_addr_t) + sizeof(u32));
  3049. if (sizeof(dma_addr_t) == sizeof(u64)) {
  3050. numSGE = (scale - 1) * (ioc->facts.MaxChainDepth-1) + scale +
  3051. (ioc->req_sz - 60) / (sizeof(dma_addr_t) + sizeof(u32));
  3052. } else {
  3053. numSGE = 1 + (scale - 1) * (ioc->facts.MaxChainDepth-1) + scale +
  3054. (ioc->req_sz - 64) / (sizeof(dma_addr_t) + sizeof(u32));
  3055. }
  3056. dinitprintk((KERN_INFO MYNAM ": %s num_sge=%d numSGE=%d\n",
  3057. ioc->name, num_sge, numSGE));
  3058. if ( numSGE > MPT_SCSI_SG_DEPTH )
  3059. numSGE = MPT_SCSI_SG_DEPTH;
  3060. num_chain = 1;
  3061. while (numSGE - num_sge > 0) {
  3062. num_chain++;
  3063. num_sge += (scale - 1);
  3064. }
  3065. num_chain++;
  3066. dinitprintk((KERN_INFO MYNAM ": %s Now numSGE=%d num_sge=%d num_chain=%d\n",
  3067. ioc->name, numSGE, num_sge, num_chain));
  3068. if (ioc->bus_type == SCSI)
  3069. num_chain *= MPT_SCSI_CAN_QUEUE;
  3070. else
  3071. num_chain *= MPT_FC_CAN_QUEUE;
  3072. ioc->num_chain = num_chain;
  3073. sz = num_chain * sizeof(int);
  3074. if (ioc->ChainToChain == NULL) {
  3075. mem = kmalloc(sz, GFP_ATOMIC);
  3076. if (mem == NULL)
  3077. return -1;
  3078. ioc->ChainToChain = (int *) mem;
  3079. dinitprintk((KERN_INFO MYNAM ": %s ChainToChain alloc @ %p, sz=%d bytes\n",
  3080. ioc->name, mem, sz));
  3081. } else {
  3082. mem = (u8 *) ioc->ChainToChain;
  3083. }
  3084. memset(mem, 0xFF, sz);
  3085. return num_chain;
  3086. }
  3087. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3088. /*
  3089. * PrimeIocFifos - Initialize IOC request and reply FIFOs.
  3090. * @ioc: Pointer to MPT_ADAPTER structure
  3091. *
  3092. * This routine allocates memory for the MPT reply and request frame
  3093. * pools (if necessary), and primes the IOC reply FIFO with
  3094. * reply frames.
  3095. *
  3096. * Returns 0 for success, non-zero for failure.
  3097. */
  3098. static int
  3099. PrimeIocFifos(MPT_ADAPTER *ioc)
  3100. {
  3101. MPT_FRAME_HDR *mf;
  3102. unsigned long flags;
  3103. dma_addr_t alloc_dma;
  3104. u8 *mem;
  3105. int i, reply_sz, sz, total_size, num_chain;
  3106. /* Prime reply FIFO... */
  3107. if (ioc->reply_frames == NULL) {
  3108. if ( (num_chain = initChainBuffers(ioc)) < 0)
  3109. return -1;
  3110. total_size = reply_sz = (ioc->reply_sz * ioc->reply_depth);
  3111. dinitprintk((KERN_INFO MYNAM ": %s.ReplyBuffer sz=%d bytes, ReplyDepth=%d\n",
  3112. ioc->name, ioc->reply_sz, ioc->reply_depth));
  3113. dinitprintk((KERN_INFO MYNAM ": %s.ReplyBuffer sz=%d[%x] bytes\n",
  3114. ioc->name, reply_sz, reply_sz));
  3115. sz = (ioc->req_sz * ioc->req_depth);
  3116. dinitprintk((KERN_INFO MYNAM ": %s.RequestBuffer sz=%d bytes, RequestDepth=%d\n",
  3117. ioc->name, ioc->req_sz, ioc->req_depth));
  3118. dinitprintk((KERN_INFO MYNAM ": %s.RequestBuffer sz=%d[%x] bytes\n",
  3119. ioc->name, sz, sz));
  3120. total_size += sz;
  3121. sz = num_chain * ioc->req_sz; /* chain buffer pool size */
  3122. dinitprintk((KERN_INFO MYNAM ": %s.ChainBuffer sz=%d bytes, ChainDepth=%d\n",
  3123. ioc->name, ioc->req_sz, num_chain));
  3124. dinitprintk((KERN_INFO MYNAM ": %s.ChainBuffer sz=%d[%x] bytes num_chain=%d\n",
  3125. ioc->name, sz, sz, num_chain));
  3126. total_size += sz;
  3127. mem = pci_alloc_consistent(ioc->pcidev, total_size, &alloc_dma);
  3128. if (mem == NULL) {
  3129. printk(MYIOC_s_ERR_FMT "Unable to allocate Reply, Request, Chain Buffers!\n",
  3130. ioc->name);
  3131. goto out_fail;
  3132. }
  3133. dinitprintk((KERN_INFO MYNAM ": %s.Total alloc @ %p[%p], sz=%d[%x] bytes\n",
  3134. ioc->name, mem, (void *)(ulong)alloc_dma, total_size, total_size));
  3135. memset(mem, 0, total_size);
  3136. ioc->alloc_total += total_size;
  3137. ioc->alloc = mem;
  3138. ioc->alloc_dma = alloc_dma;
  3139. ioc->alloc_sz = total_size;
  3140. ioc->reply_frames = (MPT_FRAME_HDR *) mem;
  3141. ioc->reply_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF);
  3142. dinitprintk((KERN_INFO MYNAM ": %s ReplyBuffers @ %p[%p]\n",
  3143. ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma));
  3144. alloc_dma += reply_sz;
  3145. mem += reply_sz;
  3146. /* Request FIFO - WE manage this! */
  3147. ioc->req_frames = (MPT_FRAME_HDR *) mem;
  3148. ioc->req_frames_dma = alloc_dma;
  3149. dinitprintk((KERN_INFO MYNAM ": %s RequestBuffers @ %p[%p]\n",
  3150. ioc->name, mem, (void *)(ulong)alloc_dma));
  3151. ioc->req_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF);
  3152. #if defined(CONFIG_MTRR) && 0
  3153. /*
  3154. * Enable Write Combining MTRR for IOC's memory region.
  3155. * (at least as much as we can; "size and base must be
  3156. * multiples of 4 kiB"
  3157. */
  3158. ioc->mtrr_reg = mtrr_add(ioc->req_frames_dma,
  3159. sz,
  3160. MTRR_TYPE_WRCOMB, 1);
  3161. dprintk((MYIOC_s_INFO_FMT "MTRR region registered (base:size=%08x:%x)\n",
  3162. ioc->name, ioc->req_frames_dma, sz));
  3163. #endif
  3164. for (i = 0; i < ioc->req_depth; i++) {
  3165. alloc_dma += ioc->req_sz;
  3166. mem += ioc->req_sz;
  3167. }
  3168. ioc->ChainBuffer = mem;
  3169. ioc->ChainBufferDMA = alloc_dma;
  3170. dinitprintk((KERN_INFO MYNAM " :%s ChainBuffers @ %p(%p)\n",
  3171. ioc->name, ioc->ChainBuffer, (void *)(ulong)ioc->ChainBufferDMA));
  3172. /* Initialize the free chain Q.
  3173. */
  3174. INIT_LIST_HEAD(&ioc->FreeChainQ);
  3175. /* Post the chain buffers to the FreeChainQ.
  3176. */
  3177. mem = (u8 *)ioc->ChainBuffer;
  3178. for (i=0; i < num_chain; i++) {
  3179. mf = (MPT_FRAME_HDR *) mem;
  3180. list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeChainQ);
  3181. mem += ioc->req_sz;
  3182. }
  3183. /* Initialize Request frames linked list
  3184. */
  3185. alloc_dma = ioc->req_frames_dma;
  3186. mem = (u8 *) ioc->req_frames;
  3187. spin_lock_irqsave(&ioc->FreeQlock, flags);
  3188. INIT_LIST_HEAD(&ioc->FreeQ);
  3189. for (i = 0; i < ioc->req_depth; i++) {
  3190. mf = (MPT_FRAME_HDR *) mem;
  3191. /* Queue REQUESTs *internally*! */
  3192. list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeQ);
  3193. mem += ioc->req_sz;
  3194. }
  3195. spin_unlock_irqrestore(&ioc->FreeQlock, flags);
  3196. sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
  3197. ioc->sense_buf_pool =
  3198. pci_alloc_consistent(ioc->pcidev, sz, &ioc->sense_buf_pool_dma);
  3199. if (ioc->sense_buf_pool == NULL) {
  3200. printk(MYIOC_s_ERR_FMT "Unable to allocate Sense Buffers!\n",
  3201. ioc->name);
  3202. goto out_fail;
  3203. }
  3204. ioc->sense_buf_low_dma = (u32) (ioc->sense_buf_pool_dma & 0xFFFFFFFF);
  3205. ioc->alloc_total += sz;
  3206. dinitprintk((KERN_INFO MYNAM ": %s.SenseBuffers @ %p[%p]\n",
  3207. ioc->name, ioc->sense_buf_pool, (void *)(ulong)ioc->sense_buf_pool_dma));
  3208. }
  3209. /* Post Reply frames to FIFO
  3210. */
  3211. alloc_dma = ioc->alloc_dma;
  3212. dinitprintk((KERN_INFO MYNAM ": %s.ReplyBuffers @ %p[%p]\n",
  3213. ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma));
  3214. for (i = 0; i < ioc->reply_depth; i++) {
  3215. /* Write each address to the IOC! */
  3216. CHIPREG_WRITE32(&ioc->chip->ReplyFifo, alloc_dma);
  3217. alloc_dma += ioc->reply_sz;
  3218. }
  3219. return 0;
  3220. out_fail:
  3221. if (ioc->alloc != NULL) {
  3222. sz = ioc->alloc_sz;
  3223. pci_free_consistent(ioc->pcidev,
  3224. sz,
  3225. ioc->alloc, ioc->alloc_dma);
  3226. ioc->reply_frames = NULL;
  3227. ioc->req_frames = NULL;
  3228. ioc->alloc_total -= sz;
  3229. }
  3230. if (ioc->sense_buf_pool != NULL) {
  3231. sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
  3232. pci_free_consistent(ioc->pcidev,
  3233. sz,
  3234. ioc->sense_buf_pool, ioc->sense_buf_pool_dma);
  3235. ioc->sense_buf_pool = NULL;
  3236. }
  3237. return -1;
  3238. }
  3239. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3240. /**
  3241. * mpt_handshake_req_reply_wait - Send MPT request to and receive reply
  3242. * from IOC via doorbell handshake method.
  3243. * @ioc: Pointer to MPT_ADAPTER structure
  3244. * @reqBytes: Size of the request in bytes
  3245. * @req: Pointer to MPT request frame
  3246. * @replyBytes: Expected size of the reply in bytes
  3247. * @u16reply: Pointer to area where reply should be written
  3248. * @maxwait: Max wait time for a reply (in seconds)
  3249. * @sleepFlag: Specifies whether the process can sleep
  3250. *
  3251. * NOTES: It is the callers responsibility to byte-swap fields in the
  3252. * request which are greater than 1 byte in size. It is also the
  3253. * callers responsibility to byte-swap response fields which are
  3254. * greater than 1 byte in size.
  3255. *
  3256. * Returns 0 for success, non-zero for failure.
  3257. */
  3258. static int
  3259. mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes, u32 *req,
  3260. int replyBytes, u16 *u16reply, int maxwait, int sleepFlag)
  3261. {
  3262. MPIDefaultReply_t *mptReply;
  3263. int failcnt = 0;
  3264. int t;
  3265. /*
  3266. * Get ready to cache a handshake reply
  3267. */
  3268. ioc->hs_reply_idx = 0;
  3269. mptReply = (MPIDefaultReply_t *) ioc->hs_reply;
  3270. mptReply->MsgLength = 0;
  3271. /*
  3272. * Make sure there are no doorbells (WRITE 0 to IntStatus reg),
  3273. * then tell IOC that we want to handshake a request of N words.
  3274. * (WRITE u32val to Doorbell reg).
  3275. */
  3276. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  3277. CHIPREG_WRITE32(&ioc->chip->Doorbell,
  3278. ((MPI_FUNCTION_HANDSHAKE<<MPI_DOORBELL_FUNCTION_SHIFT) |
  3279. ((reqBytes/4)<<MPI_DOORBELL_ADD_DWORDS_SHIFT)));
  3280. /*
  3281. * Wait for IOC's doorbell handshake int
  3282. */
  3283. if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
  3284. failcnt++;
  3285. dhsprintk((MYIOC_s_INFO_FMT "HandShake request start reqBytes=%d, WaitCnt=%d%s\n",
  3286. ioc->name, reqBytes, t, failcnt ? " - MISSING DOORBELL HANDSHAKE!" : ""));
  3287. /* Read doorbell and check for active bit */
  3288. if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
  3289. return -1;
  3290. /*
  3291. * Clear doorbell int (WRITE 0 to IntStatus reg),
  3292. * then wait for IOC to ACKnowledge that it's ready for
  3293. * our handshake request.
  3294. */
  3295. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  3296. if (!failcnt && (t = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
  3297. failcnt++;
  3298. if (!failcnt) {
  3299. int ii;
  3300. u8 *req_as_bytes = (u8 *) req;
  3301. /*
  3302. * Stuff request words via doorbell handshake,
  3303. * with ACK from IOC for each.
  3304. */
  3305. for (ii = 0; !failcnt && ii < reqBytes/4; ii++) {
  3306. u32 word = ((req_as_bytes[(ii*4) + 0] << 0) |
  3307. (req_as_bytes[(ii*4) + 1] << 8) |
  3308. (req_as_bytes[(ii*4) + 2] << 16) |
  3309. (req_as_bytes[(ii*4) + 3] << 24));
  3310. CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
  3311. if ((t = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
  3312. failcnt++;
  3313. }
  3314. dhsprintk((KERN_INFO MYNAM ": Handshake request frame (@%p) header\n", req));
  3315. DBG_DUMP_REQUEST_FRAME_HDR(req)
  3316. dhsprintk((MYIOC_s_INFO_FMT "HandShake request post done, WaitCnt=%d%s\n",
  3317. ioc->name, t, failcnt ? " - MISSING DOORBELL ACK!" : ""));
  3318. /*
  3319. * Wait for completion of doorbell handshake reply from the IOC
  3320. */
  3321. if (!failcnt && (t = WaitForDoorbellReply(ioc, maxwait, sleepFlag)) < 0)
  3322. failcnt++;
  3323. dhsprintk((MYIOC_s_INFO_FMT "HandShake reply count=%d%s\n",
  3324. ioc->name, t, failcnt ? " - MISSING DOORBELL REPLY!" : ""));
  3325. /*
  3326. * Copy out the cached reply...
  3327. */
  3328. for (ii=0; ii < min(replyBytes/2,mptReply->MsgLength*2); ii++)
  3329. u16reply[ii] = ioc->hs_reply[ii];
  3330. } else {
  3331. return -99;
  3332. }
  3333. return -failcnt;
  3334. }
  3335. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3336. /*
  3337. * WaitForDoorbellAck - Wait for IOC to clear the IOP_DOORBELL_STATUS bit
  3338. * in it's IntStatus register.
  3339. * @ioc: Pointer to MPT_ADAPTER structure
  3340. * @howlong: How long to wait (in seconds)
  3341. * @sleepFlag: Specifies whether the process can sleep
  3342. *
  3343. * This routine waits (up to ~2 seconds max) for IOC doorbell
  3344. * handshake ACKnowledge.
  3345. *
  3346. * Returns a negative value on failure, else wait loop count.
  3347. */
  3348. static int
  3349. WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
  3350. {
  3351. int cntdn;
  3352. int count = 0;
  3353. u32 intstat=0;
  3354. cntdn = 1000 * howlong;
  3355. if (sleepFlag == CAN_SLEEP) {
  3356. while (--cntdn) {
  3357. intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
  3358. if (! (intstat & MPI_HIS_IOP_DOORBELL_STATUS))
  3359. break;
  3360. msleep_interruptible (1);
  3361. count++;
  3362. }
  3363. } else {
  3364. while (--cntdn) {
  3365. intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
  3366. if (! (intstat & MPI_HIS_IOP_DOORBELL_STATUS))
  3367. break;
  3368. mdelay (1);
  3369. count++;
  3370. }
  3371. }
  3372. if (cntdn) {
  3373. dprintk((MYIOC_s_INFO_FMT "WaitForDoorbell ACK (count=%d)\n",
  3374. ioc->name, count));
  3375. return count;
  3376. }
  3377. printk(MYIOC_s_ERR_FMT "Doorbell ACK timeout (count=%d), IntStatus=%x!\n",
  3378. ioc->name, count, intstat);
  3379. return -1;
  3380. }
  3381. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3382. /*
  3383. * WaitForDoorbellInt - Wait for IOC to set the HIS_DOORBELL_INTERRUPT bit
  3384. * in it's IntStatus register.
  3385. * @ioc: Pointer to MPT_ADAPTER structure
  3386. * @howlong: How long to wait (in seconds)
  3387. * @sleepFlag: Specifies whether the process can sleep
  3388. *
  3389. * This routine waits (up to ~2 seconds max) for IOC doorbell interrupt.
  3390. *
  3391. * Returns a negative value on failure, else wait loop count.
  3392. */
  3393. static int
  3394. WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
  3395. {
  3396. int cntdn;
  3397. int count = 0;
  3398. u32 intstat=0;
  3399. cntdn = 1000 * howlong;
  3400. if (sleepFlag == CAN_SLEEP) {
  3401. while (--cntdn) {
  3402. intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
  3403. if (intstat & MPI_HIS_DOORBELL_INTERRUPT)
  3404. break;
  3405. msleep_interruptible(1);
  3406. count++;
  3407. }
  3408. } else {
  3409. while (--cntdn) {
  3410. intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
  3411. if (intstat & MPI_HIS_DOORBELL_INTERRUPT)
  3412. break;
  3413. mdelay(1);
  3414. count++;
  3415. }
  3416. }
  3417. if (cntdn) {
  3418. dprintk((MYIOC_s_INFO_FMT "WaitForDoorbell INT (cnt=%d) howlong=%d\n",
  3419. ioc->name, count, howlong));
  3420. return count;
  3421. }
  3422. printk(MYIOC_s_ERR_FMT "Doorbell INT timeout (count=%d), IntStatus=%x!\n",
  3423. ioc->name, count, intstat);
  3424. return -1;
  3425. }
  3426. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3427. /*
  3428. * WaitForDoorbellReply - Wait for and capture a IOC handshake reply.
  3429. * @ioc: Pointer to MPT_ADAPTER structure
  3430. * @howlong: How long to wait (in seconds)
  3431. * @sleepFlag: Specifies whether the process can sleep
  3432. *
  3433. * This routine polls the IOC for a handshake reply, 16 bits at a time.
  3434. * Reply is cached to IOC private area large enough to hold a maximum
  3435. * of 128 bytes of reply data.
  3436. *
  3437. * Returns a negative value on failure, else size of reply in WORDS.
  3438. */
  3439. static int
  3440. WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
  3441. {
  3442. int u16cnt = 0;
  3443. int failcnt = 0;
  3444. int t;
  3445. u16 *hs_reply = ioc->hs_reply;
  3446. volatile MPIDefaultReply_t *mptReply = (MPIDefaultReply_t *) ioc->hs_reply;
  3447. u16 hword;
  3448. hs_reply[0] = hs_reply[1] = hs_reply[7] = 0;
  3449. /*
  3450. * Get first two u16's so we can look at IOC's intended reply MsgLength
  3451. */
  3452. u16cnt=0;
  3453. if ((t = WaitForDoorbellInt(ioc, howlong, sleepFlag)) < 0) {
  3454. failcnt++;
  3455. } else {
  3456. hs_reply[u16cnt++] = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
  3457. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  3458. if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
  3459. failcnt++;
  3460. else {
  3461. hs_reply[u16cnt++] = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
  3462. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  3463. }
  3464. }
  3465. dhsprintk((MYIOC_s_INFO_FMT "WaitCnt=%d First handshake reply word=%08x%s\n",
  3466. ioc->name, t, le32_to_cpu(*(u32 *)hs_reply),
  3467. failcnt ? " - MISSING DOORBELL HANDSHAKE!" : ""));
  3468. /*
  3469. * If no error (and IOC said MsgLength is > 0), piece together
  3470. * reply 16 bits at a time.
  3471. */
  3472. for (u16cnt=2; !failcnt && u16cnt < (2 * mptReply->MsgLength); u16cnt++) {
  3473. if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
  3474. failcnt++;
  3475. hword = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
  3476. /* don't overflow our IOC hs_reply[] buffer! */
  3477. if (u16cnt < sizeof(ioc->hs_reply) / sizeof(ioc->hs_reply[0]))
  3478. hs_reply[u16cnt] = hword;
  3479. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  3480. }
  3481. if (!failcnt && (t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
  3482. failcnt++;
  3483. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  3484. if (failcnt) {
  3485. printk(MYIOC_s_ERR_FMT "Handshake reply failure!\n",
  3486. ioc->name);
  3487. return -failcnt;
  3488. }
  3489. #if 0
  3490. else if (u16cnt != (2 * mptReply->MsgLength)) {
  3491. return -101;
  3492. }
  3493. else if ((mptReply->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) {
  3494. return -102;
  3495. }
  3496. #endif
  3497. dhsprintk((MYIOC_s_INFO_FMT "Got Handshake reply:\n", ioc->name));
  3498. DBG_DUMP_REPLY_FRAME(mptReply)
  3499. dhsprintk((MYIOC_s_INFO_FMT "WaitForDoorbell REPLY WaitCnt=%d (sz=%d)\n",
  3500. ioc->name, t, u16cnt/2));
  3501. return u16cnt/2;
  3502. }
  3503. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3504. /*
  3505. * GetLanConfigPages - Fetch LANConfig pages.
  3506. * @ioc: Pointer to MPT_ADAPTER structure
  3507. *
  3508. * Return: 0 for success
  3509. * -ENOMEM if no memory available
  3510. * -EPERM if not allowed due to ISR context
  3511. * -EAGAIN if no msg frames currently available
  3512. * -EFAULT for non-successful reply or no reply (timeout)
  3513. */
  3514. static int
  3515. GetLanConfigPages(MPT_ADAPTER *ioc)
  3516. {
  3517. ConfigPageHeader_t hdr;
  3518. CONFIGPARMS cfg;
  3519. LANPage0_t *ppage0_alloc;
  3520. dma_addr_t page0_dma;
  3521. LANPage1_t *ppage1_alloc;
  3522. dma_addr_t page1_dma;
  3523. int rc = 0;
  3524. int data_sz;
  3525. int copy_sz;
  3526. /* Get LAN Page 0 header */
  3527. hdr.PageVersion = 0;
  3528. hdr.PageLength = 0;
  3529. hdr.PageNumber = 0;
  3530. hdr.PageType = MPI_CONFIG_PAGETYPE_LAN;
  3531. cfg.cfghdr.hdr = &hdr;
  3532. cfg.physAddr = -1;
  3533. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  3534. cfg.dir = 0;
  3535. cfg.pageAddr = 0;
  3536. cfg.timeout = 0;
  3537. if ((rc = mpt_config(ioc, &cfg)) != 0)
  3538. return rc;
  3539. if (hdr.PageLength > 0) {
  3540. data_sz = hdr.PageLength * 4;
  3541. ppage0_alloc = (LANPage0_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page0_dma);
  3542. rc = -ENOMEM;
  3543. if (ppage0_alloc) {
  3544. memset((u8 *)ppage0_alloc, 0, data_sz);
  3545. cfg.physAddr = page0_dma;
  3546. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  3547. if ((rc = mpt_config(ioc, &cfg)) == 0) {
  3548. /* save the data */
  3549. copy_sz = min_t(int, sizeof(LANPage0_t), data_sz);
  3550. memcpy(&ioc->lan_cnfg_page0, ppage0_alloc, copy_sz);
  3551. }
  3552. pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage0_alloc, page0_dma);
  3553. /* FIXME!
  3554. * Normalize endianness of structure data,
  3555. * by byte-swapping all > 1 byte fields!
  3556. */
  3557. }
  3558. if (rc)
  3559. return rc;
  3560. }
  3561. /* Get LAN Page 1 header */
  3562. hdr.PageVersion = 0;
  3563. hdr.PageLength = 0;
  3564. hdr.PageNumber = 1;
  3565. hdr.PageType = MPI_CONFIG_PAGETYPE_LAN;
  3566. cfg.cfghdr.hdr = &hdr;
  3567. cfg.physAddr = -1;
  3568. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  3569. cfg.dir = 0;
  3570. cfg.pageAddr = 0;
  3571. if ((rc = mpt_config(ioc, &cfg)) != 0)
  3572. return rc;
  3573. if (hdr.PageLength == 0)
  3574. return 0;
  3575. data_sz = hdr.PageLength * 4;
  3576. rc = -ENOMEM;
  3577. ppage1_alloc = (LANPage1_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page1_dma);
  3578. if (ppage1_alloc) {
  3579. memset((u8 *)ppage1_alloc, 0, data_sz);
  3580. cfg.physAddr = page1_dma;
  3581. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  3582. if ((rc = mpt_config(ioc, &cfg)) == 0) {
  3583. /* save the data */
  3584. copy_sz = min_t(int, sizeof(LANPage1_t), data_sz);
  3585. memcpy(&ioc->lan_cnfg_page1, ppage1_alloc, copy_sz);
  3586. }
  3587. pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage1_alloc, page1_dma);
  3588. /* FIXME!
  3589. * Normalize endianness of structure data,
  3590. * by byte-swapping all > 1 byte fields!
  3591. */
  3592. }
  3593. return rc;
  3594. }
  3595. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3596. /*
  3597. * GetFcPortPage0 - Fetch FCPort config Page0.
  3598. * @ioc: Pointer to MPT_ADAPTER structure
  3599. * @portnum: IOC Port number
  3600. *
  3601. * Return: 0 for success
  3602. * -ENOMEM if no memory available
  3603. * -EPERM if not allowed due to ISR context
  3604. * -EAGAIN if no msg frames currently available
  3605. * -EFAULT for non-successful reply or no reply (timeout)
  3606. */
  3607. static int
  3608. GetFcPortPage0(MPT_ADAPTER *ioc, int portnum)
  3609. {
  3610. ConfigPageHeader_t hdr;
  3611. CONFIGPARMS cfg;
  3612. FCPortPage0_t *ppage0_alloc;
  3613. FCPortPage0_t *pp0dest;
  3614. dma_addr_t page0_dma;
  3615. int data_sz;
  3616. int copy_sz;
  3617. int rc;
  3618. /* Get FCPort Page 0 header */
  3619. hdr.PageVersion = 0;
  3620. hdr.PageLength = 0;
  3621. hdr.PageNumber = 0;
  3622. hdr.PageType = MPI_CONFIG_PAGETYPE_FC_PORT;
  3623. cfg.cfghdr.hdr = &hdr;
  3624. cfg.physAddr = -1;
  3625. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  3626. cfg.dir = 0;
  3627. cfg.pageAddr = portnum;
  3628. cfg.timeout = 0;
  3629. if ((rc = mpt_config(ioc, &cfg)) != 0)
  3630. return rc;
  3631. if (hdr.PageLength == 0)
  3632. return 0;
  3633. data_sz = hdr.PageLength * 4;
  3634. rc = -ENOMEM;
  3635. ppage0_alloc = (FCPortPage0_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page0_dma);
  3636. if (ppage0_alloc) {
  3637. memset((u8 *)ppage0_alloc, 0, data_sz);
  3638. cfg.physAddr = page0_dma;
  3639. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  3640. if ((rc = mpt_config(ioc, &cfg)) == 0) {
  3641. /* save the data */
  3642. pp0dest = &ioc->fc_port_page0[portnum];
  3643. copy_sz = min_t(int, sizeof(FCPortPage0_t), data_sz);
  3644. memcpy(pp0dest, ppage0_alloc, copy_sz);
  3645. /*
  3646. * Normalize endianness of structure data,
  3647. * by byte-swapping all > 1 byte fields!
  3648. */
  3649. pp0dest->Flags = le32_to_cpu(pp0dest->Flags);
  3650. pp0dest->PortIdentifier = le32_to_cpu(pp0dest->PortIdentifier);
  3651. pp0dest->WWNN.Low = le32_to_cpu(pp0dest->WWNN.Low);
  3652. pp0dest->WWNN.High = le32_to_cpu(pp0dest->WWNN.High);
  3653. pp0dest->WWPN.Low = le32_to_cpu(pp0dest->WWPN.Low);
  3654. pp0dest->WWPN.High = le32_to_cpu(pp0dest->WWPN.High);
  3655. pp0dest->SupportedServiceClass = le32_to_cpu(pp0dest->SupportedServiceClass);
  3656. pp0dest->SupportedSpeeds = le32_to_cpu(pp0dest->SupportedSpeeds);
  3657. pp0dest->CurrentSpeed = le32_to_cpu(pp0dest->CurrentSpeed);
  3658. pp0dest->MaxFrameSize = le32_to_cpu(pp0dest->MaxFrameSize);
  3659. pp0dest->FabricWWNN.Low = le32_to_cpu(pp0dest->FabricWWNN.Low);
  3660. pp0dest->FabricWWNN.High = le32_to_cpu(pp0dest->FabricWWNN.High);
  3661. pp0dest->FabricWWPN.Low = le32_to_cpu(pp0dest->FabricWWPN.Low);
  3662. pp0dest->FabricWWPN.High = le32_to_cpu(pp0dest->FabricWWPN.High);
  3663. pp0dest->DiscoveredPortsCount = le32_to_cpu(pp0dest->DiscoveredPortsCount);
  3664. pp0dest->MaxInitiators = le32_to_cpu(pp0dest->MaxInitiators);
  3665. }
  3666. pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage0_alloc, page0_dma);
  3667. }
  3668. return rc;
  3669. }
  3670. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3671. /*
  3672. * mptbase_sas_persist_operation - Perform operation on SAS Persitent Table
  3673. * @ioc: Pointer to MPT_ADAPTER structure
  3674. * @sas_address: 64bit SAS Address for operation.
  3675. * @target_id: specified target for operation
  3676. * @bus: specified bus for operation
  3677. * @persist_opcode: see below
  3678. *
  3679. * MPI_SAS_OP_CLEAR_NOT_PRESENT - Free all persist TargetID mappings for
  3680. * devices not currently present.
  3681. * MPI_SAS_OP_CLEAR_ALL_PERSISTENT - Clear al persist TargetID mappings
  3682. *
  3683. * NOTE: Don't use not this function during interrupt time.
  3684. *
  3685. * Returns: 0 for success, non-zero error
  3686. */
  3687. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3688. int
  3689. mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode)
  3690. {
  3691. SasIoUnitControlRequest_t *sasIoUnitCntrReq;
  3692. SasIoUnitControlReply_t *sasIoUnitCntrReply;
  3693. MPT_FRAME_HDR *mf = NULL;
  3694. MPIHeader_t *mpi_hdr;
  3695. /* insure garbage is not sent to fw */
  3696. switch(persist_opcode) {
  3697. case MPI_SAS_OP_CLEAR_NOT_PRESENT:
  3698. case MPI_SAS_OP_CLEAR_ALL_PERSISTENT:
  3699. break;
  3700. default:
  3701. return -1;
  3702. break;
  3703. }
  3704. printk("%s: persist_opcode=%x\n",__FUNCTION__, persist_opcode);
  3705. /* Get a MF for this command.
  3706. */
  3707. if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
  3708. printk("%s: no msg frames!\n",__FUNCTION__);
  3709. return -1;
  3710. }
  3711. mpi_hdr = (MPIHeader_t *) mf;
  3712. sasIoUnitCntrReq = (SasIoUnitControlRequest_t *)mf;
  3713. memset(sasIoUnitCntrReq,0,sizeof(SasIoUnitControlRequest_t));
  3714. sasIoUnitCntrReq->Function = MPI_FUNCTION_SAS_IO_UNIT_CONTROL;
  3715. sasIoUnitCntrReq->MsgContext = mpi_hdr->MsgContext;
  3716. sasIoUnitCntrReq->Operation = persist_opcode;
  3717. init_timer(&ioc->persist_timer);
  3718. ioc->persist_timer.data = (unsigned long) ioc;
  3719. ioc->persist_timer.function = mpt_timer_expired;
  3720. ioc->persist_timer.expires = jiffies + HZ*10 /* 10 sec */;
  3721. ioc->persist_wait_done=0;
  3722. add_timer(&ioc->persist_timer);
  3723. mpt_put_msg_frame(mpt_base_index, ioc, mf);
  3724. wait_event(mpt_waitq, ioc->persist_wait_done);
  3725. sasIoUnitCntrReply =
  3726. (SasIoUnitControlReply_t *)ioc->persist_reply_frame;
  3727. if (le16_to_cpu(sasIoUnitCntrReply->IOCStatus) != MPI_IOCSTATUS_SUCCESS) {
  3728. printk("%s: IOCStatus=0x%X IOCLogInfo=0x%X\n",
  3729. __FUNCTION__,
  3730. sasIoUnitCntrReply->IOCStatus,
  3731. sasIoUnitCntrReply->IOCLogInfo);
  3732. return -1;
  3733. }
  3734. printk("%s: success\n",__FUNCTION__);
  3735. return 0;
  3736. }
  3737. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3738. /*
  3739. * GetIoUnitPage2 - Retrieve BIOS version and boot order information.
  3740. * @ioc: Pointer to MPT_ADAPTER structure
  3741. *
  3742. * Returns: 0 for success
  3743. * -ENOMEM if no memory available
  3744. * -EPERM if not allowed due to ISR context
  3745. * -EAGAIN if no msg frames currently available
  3746. * -EFAULT for non-successful reply or no reply (timeout)
  3747. */
  3748. static int
  3749. GetIoUnitPage2(MPT_ADAPTER *ioc)
  3750. {
  3751. ConfigPageHeader_t hdr;
  3752. CONFIGPARMS cfg;
  3753. IOUnitPage2_t *ppage_alloc;
  3754. dma_addr_t page_dma;
  3755. int data_sz;
  3756. int rc;
  3757. /* Get the page header */
  3758. hdr.PageVersion = 0;
  3759. hdr.PageLength = 0;
  3760. hdr.PageNumber = 2;
  3761. hdr.PageType = MPI_CONFIG_PAGETYPE_IO_UNIT;
  3762. cfg.cfghdr.hdr = &hdr;
  3763. cfg.physAddr = -1;
  3764. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  3765. cfg.dir = 0;
  3766. cfg.pageAddr = 0;
  3767. cfg.timeout = 0;
  3768. if ((rc = mpt_config(ioc, &cfg)) != 0)
  3769. return rc;
  3770. if (hdr.PageLength == 0)
  3771. return 0;
  3772. /* Read the config page */
  3773. data_sz = hdr.PageLength * 4;
  3774. rc = -ENOMEM;
  3775. ppage_alloc = (IOUnitPage2_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page_dma);
  3776. if (ppage_alloc) {
  3777. memset((u8 *)ppage_alloc, 0, data_sz);
  3778. cfg.physAddr = page_dma;
  3779. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  3780. /* If Good, save data */
  3781. if ((rc = mpt_config(ioc, &cfg)) == 0)
  3782. ioc->biosVersion = le32_to_cpu(ppage_alloc->BiosVersion);
  3783. pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage_alloc, page_dma);
  3784. }
  3785. return rc;
  3786. }
  3787. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3788. /* mpt_GetScsiPortSettings - read SCSI Port Page 0 and 2
  3789. * @ioc: Pointer to a Adapter Strucutre
  3790. * @portnum: IOC port number
  3791. *
  3792. * Return: -EFAULT if read of config page header fails
  3793. * or if no nvram
  3794. * If read of SCSI Port Page 0 fails,
  3795. * NVRAM = MPT_HOST_NVRAM_INVALID (0xFFFFFFFF)
  3796. * Adapter settings: async, narrow
  3797. * Return 1
  3798. * If read of SCSI Port Page 2 fails,
  3799. * Adapter settings valid
  3800. * NVRAM = MPT_HOST_NVRAM_INVALID (0xFFFFFFFF)
  3801. * Return 1
  3802. * Else
  3803. * Both valid
  3804. * Return 0
  3805. * CHECK - what type of locking mechanisms should be used????
  3806. */
  3807. static int
  3808. mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum)
  3809. {
  3810. u8 *pbuf;
  3811. dma_addr_t buf_dma;
  3812. CONFIGPARMS cfg;
  3813. ConfigPageHeader_t header;
  3814. int ii;
  3815. int data, rc = 0;
  3816. /* Allocate memory
  3817. */
  3818. if (!ioc->spi_data.nvram) {
  3819. int sz;
  3820. u8 *mem;
  3821. sz = MPT_MAX_SCSI_DEVICES * sizeof(int);
  3822. mem = kmalloc(sz, GFP_ATOMIC);
  3823. if (mem == NULL)
  3824. return -EFAULT;
  3825. ioc->spi_data.nvram = (int *) mem;
  3826. dprintk((MYIOC_s_INFO_FMT "SCSI device NVRAM settings @ %p, sz=%d\n",
  3827. ioc->name, ioc->spi_data.nvram, sz));
  3828. }
  3829. /* Invalidate NVRAM information
  3830. */
  3831. for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
  3832. ioc->spi_data.nvram[ii] = MPT_HOST_NVRAM_INVALID;
  3833. }
  3834. /* Read SPP0 header, allocate memory, then read page.
  3835. */
  3836. header.PageVersion = 0;
  3837. header.PageLength = 0;
  3838. header.PageNumber = 0;
  3839. header.PageType = MPI_CONFIG_PAGETYPE_SCSI_PORT;
  3840. cfg.cfghdr.hdr = &header;
  3841. cfg.physAddr = -1;
  3842. cfg.pageAddr = portnum;
  3843. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  3844. cfg.dir = 0;
  3845. cfg.timeout = 0; /* use default */
  3846. if (mpt_config(ioc, &cfg) != 0)
  3847. return -EFAULT;
  3848. if (header.PageLength > 0) {
  3849. pbuf = pci_alloc_consistent(ioc->pcidev, header.PageLength * 4, &buf_dma);
  3850. if (pbuf) {
  3851. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  3852. cfg.physAddr = buf_dma;
  3853. if (mpt_config(ioc, &cfg) != 0) {
  3854. ioc->spi_data.maxBusWidth = MPT_NARROW;
  3855. ioc->spi_data.maxSyncOffset = 0;
  3856. ioc->spi_data.minSyncFactor = MPT_ASYNC;
  3857. ioc->spi_data.busType = MPT_HOST_BUS_UNKNOWN;
  3858. rc = 1;
  3859. ddvprintk((MYIOC_s_INFO_FMT "Unable to read PortPage0 minSyncFactor=%x\n",
  3860. ioc->name, ioc->spi_data.minSyncFactor));
  3861. } else {
  3862. /* Save the Port Page 0 data
  3863. */
  3864. SCSIPortPage0_t *pPP0 = (SCSIPortPage0_t *) pbuf;
  3865. pPP0->Capabilities = le32_to_cpu(pPP0->Capabilities);
  3866. pPP0->PhysicalInterface = le32_to_cpu(pPP0->PhysicalInterface);
  3867. if ( (pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_QAS) == 0 ) {
  3868. ioc->spi_data.noQas |= MPT_TARGET_NO_NEGO_QAS;
  3869. ddvprintk((KERN_INFO MYNAM " :%s noQas due to Capabilities=%x\n",
  3870. ioc->name, pPP0->Capabilities));
  3871. }
  3872. ioc->spi_data.maxBusWidth = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_WIDE ? 1 : 0;
  3873. data = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_MAX_SYNC_OFFSET_MASK;
  3874. if (data) {
  3875. ioc->spi_data.maxSyncOffset = (u8) (data >> 16);
  3876. data = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_MIN_SYNC_PERIOD_MASK;
  3877. ioc->spi_data.minSyncFactor = (u8) (data >> 8);
  3878. ddvprintk((MYIOC_s_INFO_FMT "PortPage0 minSyncFactor=%x\n",
  3879. ioc->name, ioc->spi_data.minSyncFactor));
  3880. } else {
  3881. ioc->spi_data.maxSyncOffset = 0;
  3882. ioc->spi_data.minSyncFactor = MPT_ASYNC;
  3883. }
  3884. ioc->spi_data.busType = pPP0->PhysicalInterface & MPI_SCSIPORTPAGE0_PHY_SIGNAL_TYPE_MASK;
  3885. /* Update the minSyncFactor based on bus type.
  3886. */
  3887. if ((ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_HVD) ||
  3888. (ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_SE)) {
  3889. if (ioc->spi_data.minSyncFactor < MPT_ULTRA) {
  3890. ioc->spi_data.minSyncFactor = MPT_ULTRA;
  3891. ddvprintk((MYIOC_s_INFO_FMT "HVD or SE detected, minSyncFactor=%x\n",
  3892. ioc->name, ioc->spi_data.minSyncFactor));
  3893. }
  3894. }
  3895. }
  3896. if (pbuf) {
  3897. pci_free_consistent(ioc->pcidev, header.PageLength * 4, pbuf, buf_dma);
  3898. }
  3899. }
  3900. }
  3901. /* SCSI Port Page 2 - Read the header then the page.
  3902. */
  3903. header.PageVersion = 0;
  3904. header.PageLength = 0;
  3905. header.PageNumber = 2;
  3906. header.PageType = MPI_CONFIG_PAGETYPE_SCSI_PORT;
  3907. cfg.cfghdr.hdr = &header;
  3908. cfg.physAddr = -1;
  3909. cfg.pageAddr = portnum;
  3910. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  3911. cfg.dir = 0;
  3912. if (mpt_config(ioc, &cfg) != 0)
  3913. return -EFAULT;
  3914. if (header.PageLength > 0) {
  3915. /* Allocate memory and read SCSI Port Page 2
  3916. */
  3917. pbuf = pci_alloc_consistent(ioc->pcidev, header.PageLength * 4, &buf_dma);
  3918. if (pbuf) {
  3919. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_NVRAM;
  3920. cfg.physAddr = buf_dma;
  3921. if (mpt_config(ioc, &cfg) != 0) {
  3922. /* Nvram data is left with INVALID mark
  3923. */
  3924. rc = 1;
  3925. } else {
  3926. SCSIPortPage2_t *pPP2 = (SCSIPortPage2_t *) pbuf;
  3927. MpiDeviceInfo_t *pdevice = NULL;
  3928. /* Save the Port Page 2 data
  3929. * (reformat into a 32bit quantity)
  3930. */
  3931. data = le32_to_cpu(pPP2->PortFlags) & MPI_SCSIPORTPAGE2_PORT_FLAGS_DV_MASK;
  3932. ioc->spi_data.PortFlags = data;
  3933. for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
  3934. pdevice = &pPP2->DeviceSettings[ii];
  3935. data = (le16_to_cpu(pdevice->DeviceFlags) << 16) |
  3936. (pdevice->SyncFactor << 8) | pdevice->Timeout;
  3937. ioc->spi_data.nvram[ii] = data;
  3938. }
  3939. }
  3940. pci_free_consistent(ioc->pcidev, header.PageLength * 4, pbuf, buf_dma);
  3941. }
  3942. }
  3943. /* Update Adapter limits with those from NVRAM
  3944. * Comment: Don't need to do this. Target performance
  3945. * parameters will never exceed the adapters limits.
  3946. */
  3947. return rc;
  3948. }
  3949. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3950. /* mpt_readScsiDevicePageHeaders - save version and length of SDP1
  3951. * @ioc: Pointer to a Adapter Strucutre
  3952. * @portnum: IOC port number
  3953. *
  3954. * Return: -EFAULT if read of config page header fails
  3955. * or 0 if success.
  3956. */
  3957. static int
  3958. mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum)
  3959. {
  3960. CONFIGPARMS cfg;
  3961. ConfigPageHeader_t header;
  3962. /* Read the SCSI Device Page 1 header
  3963. */
  3964. header.PageVersion = 0;
  3965. header.PageLength = 0;
  3966. header.PageNumber = 1;
  3967. header.PageType = MPI_CONFIG_PAGETYPE_SCSI_DEVICE;
  3968. cfg.cfghdr.hdr = &header;
  3969. cfg.physAddr = -1;
  3970. cfg.pageAddr = portnum;
  3971. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  3972. cfg.dir = 0;
  3973. cfg.timeout = 0;
  3974. if (mpt_config(ioc, &cfg) != 0)
  3975. return -EFAULT;
  3976. ioc->spi_data.sdp1version = cfg.cfghdr.hdr->PageVersion;
  3977. ioc->spi_data.sdp1length = cfg.cfghdr.hdr->PageLength;
  3978. header.PageVersion = 0;
  3979. header.PageLength = 0;
  3980. header.PageNumber = 0;
  3981. header.PageType = MPI_CONFIG_PAGETYPE_SCSI_DEVICE;
  3982. if (mpt_config(ioc, &cfg) != 0)
  3983. return -EFAULT;
  3984. ioc->spi_data.sdp0version = cfg.cfghdr.hdr->PageVersion;
  3985. ioc->spi_data.sdp0length = cfg.cfghdr.hdr->PageLength;
  3986. dcprintk((MYIOC_s_INFO_FMT "Headers: 0: version %d length %d\n",
  3987. ioc->name, ioc->spi_data.sdp0version, ioc->spi_data.sdp0length));
  3988. dcprintk((MYIOC_s_INFO_FMT "Headers: 1: version %d length %d\n",
  3989. ioc->name, ioc->spi_data.sdp1version, ioc->spi_data.sdp1length));
  3990. return 0;
  3991. }
  3992. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3993. /**
  3994. * mpt_findImVolumes - Identify IDs of hidden disks and RAID Volumes
  3995. * @ioc: Pointer to a Adapter Strucutre
  3996. * @portnum: IOC port number
  3997. *
  3998. * Return:
  3999. * 0 on success
  4000. * -EFAULT if read of config page header fails or data pointer not NULL
  4001. * -ENOMEM if pci_alloc failed
  4002. */
  4003. int
  4004. mpt_findImVolumes(MPT_ADAPTER *ioc)
  4005. {
  4006. IOCPage2_t *pIoc2;
  4007. u8 *mem;
  4008. ConfigPageIoc2RaidVol_t *pIocRv;
  4009. dma_addr_t ioc2_dma;
  4010. CONFIGPARMS cfg;
  4011. ConfigPageHeader_t header;
  4012. int jj;
  4013. int rc = 0;
  4014. int iocpage2sz;
  4015. u8 nVols, nPhys;
  4016. u8 vid, vbus, vioc;
  4017. /* Read IOCP2 header then the page.
  4018. */
  4019. header.PageVersion = 0;
  4020. header.PageLength = 0;
  4021. header.PageNumber = 2;
  4022. header.PageType = MPI_CONFIG_PAGETYPE_IOC;
  4023. cfg.cfghdr.hdr = &header;
  4024. cfg.physAddr = -1;
  4025. cfg.pageAddr = 0;
  4026. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  4027. cfg.dir = 0;
  4028. cfg.timeout = 0;
  4029. if (mpt_config(ioc, &cfg) != 0)
  4030. return -EFAULT;
  4031. if (header.PageLength == 0)
  4032. return -EFAULT;
  4033. iocpage2sz = header.PageLength * 4;
  4034. pIoc2 = pci_alloc_consistent(ioc->pcidev, iocpage2sz, &ioc2_dma);
  4035. if (!pIoc2)
  4036. return -ENOMEM;
  4037. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  4038. cfg.physAddr = ioc2_dma;
  4039. if (mpt_config(ioc, &cfg) != 0)
  4040. goto done_and_free;
  4041. if ( (mem = (u8 *)ioc->raid_data.pIocPg2) == NULL ) {
  4042. mem = kmalloc(iocpage2sz, GFP_ATOMIC);
  4043. if (mem) {
  4044. ioc->raid_data.pIocPg2 = (IOCPage2_t *) mem;
  4045. } else {
  4046. goto done_and_free;
  4047. }
  4048. }
  4049. memcpy(mem, (u8 *)pIoc2, iocpage2sz);
  4050. /* Identify RAID Volume Id's */
  4051. nVols = pIoc2->NumActiveVolumes;
  4052. if ( nVols == 0) {
  4053. /* No RAID Volume.
  4054. */
  4055. goto done_and_free;
  4056. } else {
  4057. /* At least 1 RAID Volume
  4058. */
  4059. pIocRv = pIoc2->RaidVolume;
  4060. ioc->raid_data.isRaid = 0;
  4061. for (jj = 0; jj < nVols; jj++, pIocRv++) {
  4062. vid = pIocRv->VolumeID;
  4063. vbus = pIocRv->VolumeBus;
  4064. vioc = pIocRv->VolumeIOC;
  4065. /* find the match
  4066. */
  4067. if (vbus == 0) {
  4068. ioc->raid_data.isRaid |= (1 << vid);
  4069. } else {
  4070. /* Error! Always bus 0
  4071. */
  4072. }
  4073. }
  4074. }
  4075. /* Identify Hidden Physical Disk Id's */
  4076. nPhys = pIoc2->NumActivePhysDisks;
  4077. if (nPhys == 0) {
  4078. /* No physical disks.
  4079. */
  4080. } else {
  4081. mpt_read_ioc_pg_3(ioc);
  4082. }
  4083. done_and_free:
  4084. pci_free_consistent(ioc->pcidev, iocpage2sz, pIoc2, ioc2_dma);
  4085. return rc;
  4086. }
  4087. int
  4088. mpt_read_ioc_pg_3(MPT_ADAPTER *ioc)
  4089. {
  4090. IOCPage3_t *pIoc3;
  4091. u8 *mem;
  4092. CONFIGPARMS cfg;
  4093. ConfigPageHeader_t header;
  4094. dma_addr_t ioc3_dma;
  4095. int iocpage3sz = 0;
  4096. /* Free the old page
  4097. */
  4098. kfree(ioc->raid_data.pIocPg3);
  4099. ioc->raid_data.pIocPg3 = NULL;
  4100. /* There is at least one physical disk.
  4101. * Read and save IOC Page 3
  4102. */
  4103. header.PageVersion = 0;
  4104. header.PageLength = 0;
  4105. header.PageNumber = 3;
  4106. header.PageType = MPI_CONFIG_PAGETYPE_IOC;
  4107. cfg.cfghdr.hdr = &header;
  4108. cfg.physAddr = -1;
  4109. cfg.pageAddr = 0;
  4110. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  4111. cfg.dir = 0;
  4112. cfg.timeout = 0;
  4113. if (mpt_config(ioc, &cfg) != 0)
  4114. return 0;
  4115. if (header.PageLength == 0)
  4116. return 0;
  4117. /* Read Header good, alloc memory
  4118. */
  4119. iocpage3sz = header.PageLength * 4;
  4120. pIoc3 = pci_alloc_consistent(ioc->pcidev, iocpage3sz, &ioc3_dma);
  4121. if (!pIoc3)
  4122. return 0;
  4123. /* Read the Page and save the data
  4124. * into malloc'd memory.
  4125. */
  4126. cfg.physAddr = ioc3_dma;
  4127. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  4128. if (mpt_config(ioc, &cfg) == 0) {
  4129. mem = kmalloc(iocpage3sz, GFP_ATOMIC);
  4130. if (mem) {
  4131. memcpy(mem, (u8 *)pIoc3, iocpage3sz);
  4132. ioc->raid_data.pIocPg3 = (IOCPage3_t *) mem;
  4133. }
  4134. }
  4135. pci_free_consistent(ioc->pcidev, iocpage3sz, pIoc3, ioc3_dma);
  4136. return 0;
  4137. }
  4138. static void
  4139. mpt_read_ioc_pg_4(MPT_ADAPTER *ioc)
  4140. {
  4141. IOCPage4_t *pIoc4;
  4142. CONFIGPARMS cfg;
  4143. ConfigPageHeader_t header;
  4144. dma_addr_t ioc4_dma;
  4145. int iocpage4sz;
  4146. /* Read and save IOC Page 4
  4147. */
  4148. header.PageVersion = 0;
  4149. header.PageLength = 0;
  4150. header.PageNumber = 4;
  4151. header.PageType = MPI_CONFIG_PAGETYPE_IOC;
  4152. cfg.cfghdr.hdr = &header;
  4153. cfg.physAddr = -1;
  4154. cfg.pageAddr = 0;
  4155. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  4156. cfg.dir = 0;
  4157. cfg.timeout = 0;
  4158. if (mpt_config(ioc, &cfg) != 0)
  4159. return;
  4160. if (header.PageLength == 0)
  4161. return;
  4162. if ( (pIoc4 = ioc->spi_data.pIocPg4) == NULL ) {
  4163. iocpage4sz = (header.PageLength + 4) * 4; /* Allow 4 additional SEP's */
  4164. pIoc4 = pci_alloc_consistent(ioc->pcidev, iocpage4sz, &ioc4_dma);
  4165. if (!pIoc4)
  4166. return;
  4167. } else {
  4168. ioc4_dma = ioc->spi_data.IocPg4_dma;
  4169. iocpage4sz = ioc->spi_data.IocPg4Sz;
  4170. }
  4171. /* Read the Page into dma memory.
  4172. */
  4173. cfg.physAddr = ioc4_dma;
  4174. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  4175. if (mpt_config(ioc, &cfg) == 0) {
  4176. ioc->spi_data.pIocPg4 = (IOCPage4_t *) pIoc4;
  4177. ioc->spi_data.IocPg4_dma = ioc4_dma;
  4178. ioc->spi_data.IocPg4Sz = iocpage4sz;
  4179. } else {
  4180. pci_free_consistent(ioc->pcidev, iocpage4sz, pIoc4, ioc4_dma);
  4181. ioc->spi_data.pIocPg4 = NULL;
  4182. }
  4183. }
  4184. static void
  4185. mpt_read_ioc_pg_1(MPT_ADAPTER *ioc)
  4186. {
  4187. IOCPage1_t *pIoc1;
  4188. CONFIGPARMS cfg;
  4189. ConfigPageHeader_t header;
  4190. dma_addr_t ioc1_dma;
  4191. int iocpage1sz = 0;
  4192. u32 tmp;
  4193. /* Check the Coalescing Timeout in IOC Page 1
  4194. */
  4195. header.PageVersion = 0;
  4196. header.PageLength = 0;
  4197. header.PageNumber = 1;
  4198. header.PageType = MPI_CONFIG_PAGETYPE_IOC;
  4199. cfg.cfghdr.hdr = &header;
  4200. cfg.physAddr = -1;
  4201. cfg.pageAddr = 0;
  4202. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  4203. cfg.dir = 0;
  4204. cfg.timeout = 0;
  4205. if (mpt_config(ioc, &cfg) != 0)
  4206. return;
  4207. if (header.PageLength == 0)
  4208. return;
  4209. /* Read Header good, alloc memory
  4210. */
  4211. iocpage1sz = header.PageLength * 4;
  4212. pIoc1 = pci_alloc_consistent(ioc->pcidev, iocpage1sz, &ioc1_dma);
  4213. if (!pIoc1)
  4214. return;
  4215. /* Read the Page and check coalescing timeout
  4216. */
  4217. cfg.physAddr = ioc1_dma;
  4218. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  4219. if (mpt_config(ioc, &cfg) == 0) {
  4220. tmp = le32_to_cpu(pIoc1->Flags) & MPI_IOCPAGE1_REPLY_COALESCING;
  4221. if (tmp == MPI_IOCPAGE1_REPLY_COALESCING) {
  4222. tmp = le32_to_cpu(pIoc1->CoalescingTimeout);
  4223. dprintk((MYIOC_s_INFO_FMT "Coalescing Enabled Timeout = %d\n",
  4224. ioc->name, tmp));
  4225. if (tmp > MPT_COALESCING_TIMEOUT) {
  4226. pIoc1->CoalescingTimeout = cpu_to_le32(MPT_COALESCING_TIMEOUT);
  4227. /* Write NVRAM and current
  4228. */
  4229. cfg.dir = 1;
  4230. cfg.action = MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT;
  4231. if (mpt_config(ioc, &cfg) == 0) {
  4232. dprintk((MYIOC_s_INFO_FMT "Reset Current Coalescing Timeout to = %d\n",
  4233. ioc->name, MPT_COALESCING_TIMEOUT));
  4234. cfg.action = MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM;
  4235. if (mpt_config(ioc, &cfg) == 0) {
  4236. dprintk((MYIOC_s_INFO_FMT "Reset NVRAM Coalescing Timeout to = %d\n",
  4237. ioc->name, MPT_COALESCING_TIMEOUT));
  4238. } else {
  4239. dprintk((MYIOC_s_INFO_FMT "Reset NVRAM Coalescing Timeout Failed\n",
  4240. ioc->name));
  4241. }
  4242. } else {
  4243. dprintk((MYIOC_s_WARN_FMT "Reset of Current Coalescing Timeout Failed!\n",
  4244. ioc->name));
  4245. }
  4246. }
  4247. } else {
  4248. dprintk((MYIOC_s_WARN_FMT "Coalescing Disabled\n", ioc->name));
  4249. }
  4250. }
  4251. pci_free_consistent(ioc->pcidev, iocpage1sz, pIoc1, ioc1_dma);
  4252. return;
  4253. }
  4254. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4255. /*
  4256. * SendEventNotification - Send EventNotification (on or off) request
  4257. * to MPT adapter.
  4258. * @ioc: Pointer to MPT_ADAPTER structure
  4259. * @EvSwitch: Event switch flags
  4260. */
  4261. static int
  4262. SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch)
  4263. {
  4264. EventNotification_t *evnp;
  4265. evnp = (EventNotification_t *) mpt_get_msg_frame(mpt_base_index, ioc);
  4266. if (evnp == NULL) {
  4267. devtprintk((MYIOC_s_WARN_FMT "Unable to allocate event request frame!\n",
  4268. ioc->name));
  4269. return 0;
  4270. }
  4271. memset(evnp, 0, sizeof(*evnp));
  4272. devtprintk((MYIOC_s_INFO_FMT "Sending EventNotification (%d) request %p\n", ioc->name, EvSwitch, evnp));
  4273. evnp->Function = MPI_FUNCTION_EVENT_NOTIFICATION;
  4274. evnp->ChainOffset = 0;
  4275. evnp->MsgFlags = 0;
  4276. evnp->Switch = EvSwitch;
  4277. mpt_put_msg_frame(mpt_base_index, ioc, (MPT_FRAME_HDR *)evnp);
  4278. return 0;
  4279. }
  4280. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4281. /**
  4282. * SendEventAck - Send EventAck request to MPT adapter.
  4283. * @ioc: Pointer to MPT_ADAPTER structure
  4284. * @evnp: Pointer to original EventNotification request
  4285. */
  4286. static int
  4287. SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp)
  4288. {
  4289. EventAck_t *pAck;
  4290. if ((pAck = (EventAck_t *) mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
  4291. printk(MYIOC_s_WARN_FMT "Unable to allocate event ACK "
  4292. "request frame for Event=%x EventContext=%x EventData=%x!\n",
  4293. ioc->name, evnp->Event, le32_to_cpu(evnp->EventContext),
  4294. le32_to_cpu(evnp->Data[0]));
  4295. return -1;
  4296. }
  4297. memset(pAck, 0, sizeof(*pAck));
  4298. dprintk((MYIOC_s_INFO_FMT "Sending EventAck\n", ioc->name));
  4299. pAck->Function = MPI_FUNCTION_EVENT_ACK;
  4300. pAck->ChainOffset = 0;
  4301. pAck->MsgFlags = 0;
  4302. pAck->Event = evnp->Event;
  4303. pAck->EventContext = evnp->EventContext;
  4304. mpt_put_msg_frame(mpt_base_index, ioc, (MPT_FRAME_HDR *)pAck);
  4305. return 0;
  4306. }
  4307. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4308. /**
  4309. * mpt_config - Generic function to issue config message
  4310. * @ioc - Pointer to an adapter structure
  4311. * @cfg - Pointer to a configuration structure. Struct contains
  4312. * action, page address, direction, physical address
  4313. * and pointer to a configuration page header
  4314. * Page header is updated.
  4315. *
  4316. * Returns 0 for success
  4317. * -EPERM if not allowed due to ISR context
  4318. * -EAGAIN if no msg frames currently available
  4319. * -EFAULT for non-successful reply or no reply (timeout)
  4320. */
  4321. int
  4322. mpt_config(MPT_ADAPTER *ioc, CONFIGPARMS *pCfg)
  4323. {
  4324. Config_t *pReq;
  4325. ConfigExtendedPageHeader_t *pExtHdr = NULL;
  4326. MPT_FRAME_HDR *mf;
  4327. unsigned long flags;
  4328. int ii, rc;
  4329. int flagsLength;
  4330. int in_isr;
  4331. /* Prevent calling wait_event() (below), if caller happens
  4332. * to be in ISR context, because that is fatal!
  4333. */
  4334. in_isr = in_interrupt();
  4335. if (in_isr) {
  4336. dcprintk((MYIOC_s_WARN_FMT "Config request not allowed in ISR context!\n",
  4337. ioc->name));
  4338. return -EPERM;
  4339. }
  4340. /* Get and Populate a free Frame
  4341. */
  4342. if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
  4343. dcprintk((MYIOC_s_WARN_FMT "mpt_config: no msg frames!\n",
  4344. ioc->name));
  4345. return -EAGAIN;
  4346. }
  4347. pReq = (Config_t *)mf;
  4348. pReq->Action = pCfg->action;
  4349. pReq->Reserved = 0;
  4350. pReq->ChainOffset = 0;
  4351. pReq->Function = MPI_FUNCTION_CONFIG;
  4352. /* Assume page type is not extended and clear "reserved" fields. */
  4353. pReq->ExtPageLength = 0;
  4354. pReq->ExtPageType = 0;
  4355. pReq->MsgFlags = 0;
  4356. for (ii=0; ii < 8; ii++)
  4357. pReq->Reserved2[ii] = 0;
  4358. pReq->Header.PageVersion = pCfg->cfghdr.hdr->PageVersion;
  4359. pReq->Header.PageLength = pCfg->cfghdr.hdr->PageLength;
  4360. pReq->Header.PageNumber = pCfg->cfghdr.hdr->PageNumber;
  4361. pReq->Header.PageType = (pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK);
  4362. if ((pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK) == MPI_CONFIG_PAGETYPE_EXTENDED) {
  4363. pExtHdr = (ConfigExtendedPageHeader_t *)pCfg->cfghdr.ehdr;
  4364. pReq->ExtPageLength = cpu_to_le16(pExtHdr->ExtPageLength);
  4365. pReq->ExtPageType = pExtHdr->ExtPageType;
  4366. pReq->Header.PageType = MPI_CONFIG_PAGETYPE_EXTENDED;
  4367. /* Page Length must be treated as a reserved field for the extended header. */
  4368. pReq->Header.PageLength = 0;
  4369. }
  4370. pReq->PageAddress = cpu_to_le32(pCfg->pageAddr);
  4371. /* Add a SGE to the config request.
  4372. */
  4373. if (pCfg->dir)
  4374. flagsLength = MPT_SGE_FLAGS_SSIMPLE_WRITE;
  4375. else
  4376. flagsLength = MPT_SGE_FLAGS_SSIMPLE_READ;
  4377. if ((pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK) == MPI_CONFIG_PAGETYPE_EXTENDED) {
  4378. flagsLength |= pExtHdr->ExtPageLength * 4;
  4379. dcprintk((MYIOC_s_INFO_FMT "Sending Config request type %d, page %d and action %d\n",
  4380. ioc->name, pReq->ExtPageType, pReq->Header.PageNumber, pReq->Action));
  4381. }
  4382. else {
  4383. flagsLength |= pCfg->cfghdr.hdr->PageLength * 4;
  4384. dcprintk((MYIOC_s_INFO_FMT "Sending Config request type %d, page %d and action %d\n",
  4385. ioc->name, pReq->Header.PageType, pReq->Header.PageNumber, pReq->Action));
  4386. }
  4387. mpt_add_sge((char *)&pReq->PageBufferSGE, flagsLength, pCfg->physAddr);
  4388. /* Append pCfg pointer to end of mf
  4389. */
  4390. *((void **) (((u8 *) mf) + (ioc->req_sz - sizeof(void *)))) = (void *) pCfg;
  4391. /* Initalize the timer
  4392. */
  4393. init_timer(&pCfg->timer);
  4394. pCfg->timer.data = (unsigned long) ioc;
  4395. pCfg->timer.function = mpt_timer_expired;
  4396. pCfg->wait_done = 0;
  4397. /* Set the timer; ensure 10 second minimum */
  4398. if (pCfg->timeout < 10)
  4399. pCfg->timer.expires = jiffies + HZ*10;
  4400. else
  4401. pCfg->timer.expires = jiffies + HZ*pCfg->timeout;
  4402. /* Add to end of Q, set timer and then issue this command */
  4403. spin_lock_irqsave(&ioc->FreeQlock, flags);
  4404. list_add_tail(&pCfg->linkage, &ioc->configQ);
  4405. spin_unlock_irqrestore(&ioc->FreeQlock, flags);
  4406. add_timer(&pCfg->timer);
  4407. mpt_put_msg_frame(mpt_base_index, ioc, mf);
  4408. wait_event(mpt_waitq, pCfg->wait_done);
  4409. /* mf has been freed - do not access */
  4410. rc = pCfg->status;
  4411. return rc;
  4412. }
  4413. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4414. /**
  4415. * mpt_toolbox - Generic function to issue toolbox message
  4416. * @ioc - Pointer to an adapter structure
  4417. * @cfg - Pointer to a toolbox structure. Struct contains
  4418. * action, page address, direction, physical address
  4419. * and pointer to a configuration page header
  4420. * Page header is updated.
  4421. *
  4422. * Returns 0 for success
  4423. * -EPERM if not allowed due to ISR context
  4424. * -EAGAIN if no msg frames currently available
  4425. * -EFAULT for non-successful reply or no reply (timeout)
  4426. */
  4427. int
  4428. mpt_toolbox(MPT_ADAPTER *ioc, CONFIGPARMS *pCfg)
  4429. {
  4430. ToolboxIstwiReadWriteRequest_t *pReq;
  4431. MPT_FRAME_HDR *mf;
  4432. struct pci_dev *pdev;
  4433. unsigned long flags;
  4434. int rc;
  4435. u32 flagsLength;
  4436. int in_isr;
  4437. /* Prevent calling wait_event() (below), if caller happens
  4438. * to be in ISR context, because that is fatal!
  4439. */
  4440. in_isr = in_interrupt();
  4441. if (in_isr) {
  4442. dcprintk((MYIOC_s_WARN_FMT "toobox request not allowed in ISR context!\n",
  4443. ioc->name));
  4444. return -EPERM;
  4445. }
  4446. /* Get and Populate a free Frame
  4447. */
  4448. if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
  4449. dcprintk((MYIOC_s_WARN_FMT "mpt_toolbox: no msg frames!\n",
  4450. ioc->name));
  4451. return -EAGAIN;
  4452. }
  4453. pReq = (ToolboxIstwiReadWriteRequest_t *)mf;
  4454. pReq->Tool = pCfg->action;
  4455. pReq->Reserved = 0;
  4456. pReq->ChainOffset = 0;
  4457. pReq->Function = MPI_FUNCTION_TOOLBOX;
  4458. pReq->Reserved1 = 0;
  4459. pReq->Reserved2 = 0;
  4460. pReq->MsgFlags = 0;
  4461. pReq->Flags = pCfg->dir;
  4462. pReq->BusNum = 0;
  4463. pReq->Reserved3 = 0;
  4464. pReq->NumAddressBytes = 0x01;
  4465. pReq->Reserved4 = 0;
  4466. pReq->DataLength = cpu_to_le16(0x04);
  4467. pdev = ioc->pcidev;
  4468. if (pdev->devfn & 1)
  4469. pReq->DeviceAddr = 0xB2;
  4470. else
  4471. pReq->DeviceAddr = 0xB0;
  4472. pReq->Addr1 = 0;
  4473. pReq->Addr2 = 0;
  4474. pReq->Addr3 = 0;
  4475. pReq->Reserved5 = 0;
  4476. /* Add a SGE to the config request.
  4477. */
  4478. flagsLength = MPT_SGE_FLAGS_SSIMPLE_READ | 4;
  4479. mpt_add_sge((char *)&pReq->SGL, flagsLength, pCfg->physAddr);
  4480. dcprintk((MYIOC_s_INFO_FMT "Sending Toolbox request, Tool=%x\n",
  4481. ioc->name, pReq->Tool));
  4482. /* Append pCfg pointer to end of mf
  4483. */
  4484. *((void **) (((u8 *) mf) + (ioc->req_sz - sizeof(void *)))) = (void *) pCfg;
  4485. /* Initalize the timer
  4486. */
  4487. init_timer(&pCfg->timer);
  4488. pCfg->timer.data = (unsigned long) ioc;
  4489. pCfg->timer.function = mpt_timer_expired;
  4490. pCfg->wait_done = 0;
  4491. /* Set the timer; ensure 10 second minimum */
  4492. if (pCfg->timeout < 10)
  4493. pCfg->timer.expires = jiffies + HZ*10;
  4494. else
  4495. pCfg->timer.expires = jiffies + HZ*pCfg->timeout;
  4496. /* Add to end of Q, set timer and then issue this command */
  4497. spin_lock_irqsave(&ioc->FreeQlock, flags);
  4498. list_add_tail(&pCfg->linkage, &ioc->configQ);
  4499. spin_unlock_irqrestore(&ioc->FreeQlock, flags);
  4500. add_timer(&pCfg->timer);
  4501. mpt_put_msg_frame(mpt_base_index, ioc, mf);
  4502. wait_event(mpt_waitq, pCfg->wait_done);
  4503. /* mf has been freed - do not access */
  4504. rc = pCfg->status;
  4505. return rc;
  4506. }
  4507. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4508. /*
  4509. * mpt_timer_expired - Call back for timer process.
  4510. * Used only internal config functionality.
  4511. * @data: Pointer to MPT_SCSI_HOST recast as an unsigned long
  4512. */
  4513. static void
  4514. mpt_timer_expired(unsigned long data)
  4515. {
  4516. MPT_ADAPTER *ioc = (MPT_ADAPTER *) data;
  4517. dcprintk((MYIOC_s_WARN_FMT "mpt_timer_expired! \n", ioc->name));
  4518. /* Perform a FW reload */
  4519. if (mpt_HardResetHandler(ioc, NO_SLEEP) < 0)
  4520. printk(MYIOC_s_WARN_FMT "Firmware Reload FAILED!\n", ioc->name);
  4521. /* No more processing.
  4522. * Hard reset clean-up will wake up
  4523. * process and free all resources.
  4524. */
  4525. dcprintk((MYIOC_s_WARN_FMT "mpt_timer_expired complete!\n", ioc->name));
  4526. return;
  4527. }
  4528. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4529. /*
  4530. * mpt_ioc_reset - Base cleanup for hard reset
  4531. * @ioc: Pointer to the adapter structure
  4532. * @reset_phase: Indicates pre- or post-reset functionality
  4533. *
  4534. * Remark: Free's resources with internally generated commands.
  4535. */
  4536. static int
  4537. mpt_ioc_reset(MPT_ADAPTER *ioc, int reset_phase)
  4538. {
  4539. CONFIGPARMS *pCfg;
  4540. unsigned long flags;
  4541. dprintk((KERN_WARNING MYNAM
  4542. ": IOC %s_reset routed to MPT base driver!\n",
  4543. reset_phase==MPT_IOC_SETUP_RESET ? "setup" : (
  4544. reset_phase==MPT_IOC_PRE_RESET ? "pre" : "post")));
  4545. if (reset_phase == MPT_IOC_SETUP_RESET) {
  4546. ;
  4547. } else if (reset_phase == MPT_IOC_PRE_RESET) {
  4548. /* If the internal config Q is not empty -
  4549. * delete timer. MF resources will be freed when
  4550. * the FIFO's are primed.
  4551. */
  4552. spin_lock_irqsave(&ioc->FreeQlock, flags);
  4553. list_for_each_entry(pCfg, &ioc->configQ, linkage)
  4554. del_timer(&pCfg->timer);
  4555. spin_unlock_irqrestore(&ioc->FreeQlock, flags);
  4556. } else {
  4557. CONFIGPARMS *pNext;
  4558. /* Search the configQ for internal commands.
  4559. * Flush the Q, and wake up all suspended threads.
  4560. */
  4561. spin_lock_irqsave(&ioc->FreeQlock, flags);
  4562. list_for_each_entry_safe(pCfg, pNext, &ioc->configQ, linkage) {
  4563. list_del(&pCfg->linkage);
  4564. pCfg->status = MPT_CONFIG_ERROR;
  4565. pCfg->wait_done = 1;
  4566. wake_up(&mpt_waitq);
  4567. }
  4568. spin_unlock_irqrestore(&ioc->FreeQlock, flags);
  4569. }
  4570. return 1; /* currently means nothing really */
  4571. }
  4572. #ifdef CONFIG_PROC_FS /* { */
  4573. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4574. /*
  4575. * procfs (%MPT_PROCFS_MPTBASEDIR/...) support stuff...
  4576. */
  4577. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4578. /*
  4579. * procmpt_create - Create %MPT_PROCFS_MPTBASEDIR entries.
  4580. *
  4581. * Returns 0 for success, non-zero for failure.
  4582. */
  4583. static int
  4584. procmpt_create(void)
  4585. {
  4586. struct proc_dir_entry *ent;
  4587. mpt_proc_root_dir = proc_mkdir(MPT_PROCFS_MPTBASEDIR, NULL);
  4588. if (mpt_proc_root_dir == NULL)
  4589. return -ENOTDIR;
  4590. ent = create_proc_entry("summary", S_IFREG|S_IRUGO, mpt_proc_root_dir);
  4591. if (ent)
  4592. ent->read_proc = procmpt_summary_read;
  4593. ent = create_proc_entry("version", S_IFREG|S_IRUGO, mpt_proc_root_dir);
  4594. if (ent)
  4595. ent->read_proc = procmpt_version_read;
  4596. return 0;
  4597. }
  4598. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4599. /*
  4600. * procmpt_destroy - Tear down %MPT_PROCFS_MPTBASEDIR entries.
  4601. *
  4602. * Returns 0 for success, non-zero for failure.
  4603. */
  4604. static void
  4605. procmpt_destroy(void)
  4606. {
  4607. remove_proc_entry("version", mpt_proc_root_dir);
  4608. remove_proc_entry("summary", mpt_proc_root_dir);
  4609. remove_proc_entry(MPT_PROCFS_MPTBASEDIR, NULL);
  4610. }
  4611. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4612. /*
  4613. * procmpt_summary_read - Handle read request from /proc/mpt/summary
  4614. * or from /proc/mpt/iocN/summary.
  4615. * @buf: Pointer to area to write information
  4616. * @start: Pointer to start pointer
  4617. * @offset: Offset to start writing
  4618. * @request:
  4619. * @eof: Pointer to EOF integer
  4620. * @data: Pointer
  4621. *
  4622. * Returns number of characters written to process performing the read.
  4623. */
  4624. static int
  4625. procmpt_summary_read(char *buf, char **start, off_t offset, int request, int *eof, void *data)
  4626. {
  4627. MPT_ADAPTER *ioc;
  4628. char *out = buf;
  4629. int len;
  4630. if (data) {
  4631. int more = 0;
  4632. ioc = data;
  4633. mpt_print_ioc_summary(ioc, out, &more, 0, 1);
  4634. out += more;
  4635. } else {
  4636. list_for_each_entry(ioc, &ioc_list, list) {
  4637. int more = 0;
  4638. mpt_print_ioc_summary(ioc, out, &more, 0, 1);
  4639. out += more;
  4640. if ((out-buf) >= request)
  4641. break;
  4642. }
  4643. }
  4644. len = out - buf;
  4645. MPT_PROC_READ_RETURN(buf,start,offset,request,eof,len);
  4646. }
  4647. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4648. /*
  4649. * procmpt_version_read - Handle read request from /proc/mpt/version.
  4650. * @buf: Pointer to area to write information
  4651. * @start: Pointer to start pointer
  4652. * @offset: Offset to start writing
  4653. * @request:
  4654. * @eof: Pointer to EOF integer
  4655. * @data: Pointer
  4656. *
  4657. * Returns number of characters written to process performing the read.
  4658. */
  4659. static int
  4660. procmpt_version_read(char *buf, char **start, off_t offset, int request, int *eof, void *data)
  4661. {
  4662. int ii;
  4663. int scsi, fc, sas, lan, ctl, targ, dmp;
  4664. char *drvname;
  4665. int len;
  4666. len = sprintf(buf, "%s-%s\n", "mptlinux", MPT_LINUX_VERSION_COMMON);
  4667. len += sprintf(buf+len, " Fusion MPT base driver\n");
  4668. scsi = fc = sas = lan = ctl = targ = dmp = 0;
  4669. for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) {
  4670. drvname = NULL;
  4671. if (MptCallbacks[ii]) {
  4672. switch (MptDriverClass[ii]) {
  4673. case MPTSPI_DRIVER:
  4674. if (!scsi++) drvname = "SPI host";
  4675. break;
  4676. case MPTFC_DRIVER:
  4677. if (!fc++) drvname = "FC host";
  4678. break;
  4679. case MPTSAS_DRIVER:
  4680. if (!sas++) drvname = "SAS host";
  4681. break;
  4682. case MPTLAN_DRIVER:
  4683. if (!lan++) drvname = "LAN";
  4684. break;
  4685. case MPTSTM_DRIVER:
  4686. if (!targ++) drvname = "SCSI target";
  4687. break;
  4688. case MPTCTL_DRIVER:
  4689. if (!ctl++) drvname = "ioctl";
  4690. break;
  4691. }
  4692. if (drvname)
  4693. len += sprintf(buf+len, " Fusion MPT %s driver\n", drvname);
  4694. }
  4695. }
  4696. MPT_PROC_READ_RETURN(buf,start,offset,request,eof,len);
  4697. }
  4698. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4699. /*
  4700. * procmpt_iocinfo_read - Handle read request from /proc/mpt/iocN/info.
  4701. * @buf: Pointer to area to write information
  4702. * @start: Pointer to start pointer
  4703. * @offset: Offset to start writing
  4704. * @request:
  4705. * @eof: Pointer to EOF integer
  4706. * @data: Pointer
  4707. *
  4708. * Returns number of characters written to process performing the read.
  4709. */
  4710. static int
  4711. procmpt_iocinfo_read(char *buf, char **start, off_t offset, int request, int *eof, void *data)
  4712. {
  4713. MPT_ADAPTER *ioc = data;
  4714. int len;
  4715. char expVer[32];
  4716. int sz;
  4717. int p;
  4718. mpt_get_fw_exp_ver(expVer, ioc);
  4719. len = sprintf(buf, "%s:", ioc->name);
  4720. if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)
  4721. len += sprintf(buf+len, " (f/w download boot flag set)");
  4722. // if (ioc->facts.IOCExceptions & MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL)
  4723. // len += sprintf(buf+len, " CONFIG_CHECKSUM_FAIL!");
  4724. len += sprintf(buf+len, "\n ProductID = 0x%04x (%s)\n",
  4725. ioc->facts.ProductID,
  4726. ioc->prod_name);
  4727. len += sprintf(buf+len, " FWVersion = 0x%08x%s", ioc->facts.FWVersion.Word, expVer);
  4728. if (ioc->facts.FWImageSize)
  4729. len += sprintf(buf+len, " (fw_size=%d)", ioc->facts.FWImageSize);
  4730. len += sprintf(buf+len, "\n MsgVersion = 0x%04x\n", ioc->facts.MsgVersion);
  4731. len += sprintf(buf+len, " FirstWhoInit = 0x%02x\n", ioc->FirstWhoInit);
  4732. len += sprintf(buf+len, " EventState = 0x%02x\n", ioc->facts.EventState);
  4733. len += sprintf(buf+len, " CurrentHostMfaHighAddr = 0x%08x\n",
  4734. ioc->facts.CurrentHostMfaHighAddr);
  4735. len += sprintf(buf+len, " CurrentSenseBufferHighAddr = 0x%08x\n",
  4736. ioc->facts.CurrentSenseBufferHighAddr);
  4737. len += sprintf(buf+len, " MaxChainDepth = 0x%02x frames\n", ioc->facts.MaxChainDepth);
  4738. len += sprintf(buf+len, " MinBlockSize = 0x%02x bytes\n", 4*ioc->facts.BlockSize);
  4739. len += sprintf(buf+len, " RequestFrames @ 0x%p (Dma @ 0x%p)\n",
  4740. (void *)ioc->req_frames, (void *)(ulong)ioc->req_frames_dma);
  4741. /*
  4742. * Rounding UP to nearest 4-kB boundary here...
  4743. */
  4744. sz = (ioc->req_sz * ioc->req_depth) + 128;
  4745. sz = ((sz + 0x1000UL - 1UL) / 0x1000) * 0x1000;
  4746. len += sprintf(buf+len, " {CurReqSz=%d} x {CurReqDepth=%d} = %d bytes ^= 0x%x\n",
  4747. ioc->req_sz, ioc->req_depth, ioc->req_sz*ioc->req_depth, sz);
  4748. len += sprintf(buf+len, " {MaxReqSz=%d} {MaxReqDepth=%d}\n",
  4749. 4*ioc->facts.RequestFrameSize,
  4750. ioc->facts.GlobalCredits);
  4751. len += sprintf(buf+len, " Frames @ 0x%p (Dma @ 0x%p)\n",
  4752. (void *)ioc->alloc, (void *)(ulong)ioc->alloc_dma);
  4753. sz = (ioc->reply_sz * ioc->reply_depth) + 128;
  4754. len += sprintf(buf+len, " {CurRepSz=%d} x {CurRepDepth=%d} = %d bytes ^= 0x%x\n",
  4755. ioc->reply_sz, ioc->reply_depth, ioc->reply_sz*ioc->reply_depth, sz);
  4756. len += sprintf(buf+len, " {MaxRepSz=%d} {MaxRepDepth=%d}\n",
  4757. ioc->facts.CurReplyFrameSize,
  4758. ioc->facts.ReplyQueueDepth);
  4759. len += sprintf(buf+len, " MaxDevices = %d\n",
  4760. (ioc->facts.MaxDevices==0) ? 255 : ioc->facts.MaxDevices);
  4761. len += sprintf(buf+len, " MaxBuses = %d\n", ioc->facts.MaxBuses);
  4762. /* per-port info */
  4763. for (p=0; p < ioc->facts.NumberOfPorts; p++) {
  4764. len += sprintf(buf+len, " PortNumber = %d (of %d)\n",
  4765. p+1,
  4766. ioc->facts.NumberOfPorts);
  4767. if (ioc->bus_type == FC) {
  4768. if (ioc->pfacts[p].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) {
  4769. u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
  4770. len += sprintf(buf+len, " LanAddr = %02X:%02X:%02X:%02X:%02X:%02X\n",
  4771. a[5], a[4], a[3], a[2], a[1], a[0]);
  4772. }
  4773. len += sprintf(buf+len, " WWN = %08X%08X:%08X%08X\n",
  4774. ioc->fc_port_page0[p].WWNN.High,
  4775. ioc->fc_port_page0[p].WWNN.Low,
  4776. ioc->fc_port_page0[p].WWPN.High,
  4777. ioc->fc_port_page0[p].WWPN.Low);
  4778. }
  4779. }
  4780. MPT_PROC_READ_RETURN(buf,start,offset,request,eof,len);
  4781. }
  4782. #endif /* CONFIG_PROC_FS } */
  4783. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4784. static void
  4785. mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc)
  4786. {
  4787. buf[0] ='\0';
  4788. if ((ioc->facts.FWVersion.Word >> 24) == 0x0E) {
  4789. sprintf(buf, " (Exp %02d%02d)",
  4790. (ioc->facts.FWVersion.Word >> 16) & 0x00FF, /* Month */
  4791. (ioc->facts.FWVersion.Word >> 8) & 0x1F); /* Day */
  4792. /* insider hack! */
  4793. if ((ioc->facts.FWVersion.Word >> 8) & 0x80)
  4794. strcat(buf, " [MDBG]");
  4795. }
  4796. }
  4797. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4798. /**
  4799. * mpt_print_ioc_summary - Write ASCII summary of IOC to a buffer.
  4800. * @ioc: Pointer to MPT_ADAPTER structure
  4801. * @buffer: Pointer to buffer where IOC summary info should be written
  4802. * @size: Pointer to number of bytes we wrote (set by this routine)
  4803. * @len: Offset at which to start writing in buffer
  4804. * @showlan: Display LAN stuff?
  4805. *
  4806. * This routine writes (english readable) ASCII text, which represents
  4807. * a summary of IOC information, to a buffer.
  4808. */
  4809. void
  4810. mpt_print_ioc_summary(MPT_ADAPTER *ioc, char *buffer, int *size, int len, int showlan)
  4811. {
  4812. char expVer[32];
  4813. int y;
  4814. mpt_get_fw_exp_ver(expVer, ioc);
  4815. /*
  4816. * Shorter summary of attached ioc's...
  4817. */
  4818. y = sprintf(buffer+len, "%s: %s, %s%08xh%s, Ports=%d, MaxQ=%d",
  4819. ioc->name,
  4820. ioc->prod_name,
  4821. MPT_FW_REV_MAGIC_ID_STRING, /* "FwRev=" or somesuch */
  4822. ioc->facts.FWVersion.Word,
  4823. expVer,
  4824. ioc->facts.NumberOfPorts,
  4825. ioc->req_depth);
  4826. if (showlan && (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN)) {
  4827. u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
  4828. y += sprintf(buffer+len+y, ", LanAddr=%02X:%02X:%02X:%02X:%02X:%02X",
  4829. a[5], a[4], a[3], a[2], a[1], a[0]);
  4830. }
  4831. #ifndef __sparc__
  4832. y += sprintf(buffer+len+y, ", IRQ=%d", ioc->pci_irq);
  4833. #else
  4834. y += sprintf(buffer+len+y, ", IRQ=%s", __irq_itoa(ioc->pci_irq));
  4835. #endif
  4836. if (!ioc->active)
  4837. y += sprintf(buffer+len+y, " (disabled)");
  4838. y += sprintf(buffer+len+y, "\n");
  4839. *size = y;
  4840. }
  4841. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4842. /*
  4843. * Reset Handling
  4844. */
  4845. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4846. /**
  4847. * mpt_HardResetHandler - Generic reset handler, issue SCSI Task
  4848. * Management call based on input arg values. If TaskMgmt fails,
  4849. * return associated SCSI request.
  4850. * @ioc: Pointer to MPT_ADAPTER structure
  4851. * @sleepFlag: Indicates if sleep or schedule must be called.
  4852. *
  4853. * Remark: _HardResetHandler can be invoked from an interrupt thread (timer)
  4854. * or a non-interrupt thread. In the former, must not call schedule().
  4855. *
  4856. * Remark: A return of -1 is a FATAL error case, as it means a
  4857. * FW reload/initialization failed.
  4858. *
  4859. * Returns 0 for SUCCESS or -1 if FAILED.
  4860. */
  4861. int
  4862. mpt_HardResetHandler(MPT_ADAPTER *ioc, int sleepFlag)
  4863. {
  4864. int rc;
  4865. unsigned long flags;
  4866. dtmprintk((MYIOC_s_INFO_FMT "HardResetHandler Entered!\n", ioc->name));
  4867. #ifdef MFCNT
  4868. printk(MYIOC_s_INFO_FMT "HardResetHandler Entered!\n", ioc->name);
  4869. printk("MF count 0x%x !\n", ioc->mfcnt);
  4870. #endif
  4871. /* Reset the adapter. Prevent more than 1 call to
  4872. * mpt_do_ioc_recovery at any instant in time.
  4873. */
  4874. spin_lock_irqsave(&ioc->diagLock, flags);
  4875. if ((ioc->diagPending) || (ioc->alt_ioc && ioc->alt_ioc->diagPending)){
  4876. spin_unlock_irqrestore(&ioc->diagLock, flags);
  4877. return 0;
  4878. } else {
  4879. ioc->diagPending = 1;
  4880. }
  4881. spin_unlock_irqrestore(&ioc->diagLock, flags);
  4882. /* FIXME: If do_ioc_recovery fails, repeat....
  4883. */
  4884. /* The SCSI driver needs to adjust timeouts on all current
  4885. * commands prior to the diagnostic reset being issued.
  4886. * Prevents timeouts occuring during a diagnostic reset...very bad.
  4887. * For all other protocol drivers, this is a no-op.
  4888. */
  4889. {
  4890. int ii;
  4891. int r = 0;
  4892. for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) {
  4893. if (MptResetHandlers[ii]) {
  4894. dtmprintk((MYIOC_s_INFO_FMT "Calling IOC reset_setup handler #%d\n",
  4895. ioc->name, ii));
  4896. r += (*(MptResetHandlers[ii]))(ioc, MPT_IOC_SETUP_RESET);
  4897. if (ioc->alt_ioc) {
  4898. dtmprintk((MYIOC_s_INFO_FMT "Calling alt-%s setup reset handler #%d\n",
  4899. ioc->name, ioc->alt_ioc->name, ii));
  4900. r += (*(MptResetHandlers[ii]))(ioc->alt_ioc, MPT_IOC_SETUP_RESET);
  4901. }
  4902. }
  4903. }
  4904. }
  4905. if ((rc = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_RECOVER, sleepFlag)) != 0) {
  4906. printk(KERN_WARNING MYNAM ": WARNING - (%d) Cannot recover %s\n",
  4907. rc, ioc->name);
  4908. }
  4909. ioc->reload_fw = 0;
  4910. if (ioc->alt_ioc)
  4911. ioc->alt_ioc->reload_fw = 0;
  4912. spin_lock_irqsave(&ioc->diagLock, flags);
  4913. ioc->diagPending = 0;
  4914. if (ioc->alt_ioc)
  4915. ioc->alt_ioc->diagPending = 0;
  4916. spin_unlock_irqrestore(&ioc->diagLock, flags);
  4917. dtmprintk((MYIOC_s_INFO_FMT "HardResetHandler rc = %d!\n", ioc->name, rc));
  4918. return rc;
  4919. }
  4920. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4921. static void
  4922. EventDescriptionStr(u8 event, u32 evData0, char *evStr)
  4923. {
  4924. char *ds;
  4925. switch(event) {
  4926. case MPI_EVENT_NONE:
  4927. ds = "None";
  4928. break;
  4929. case MPI_EVENT_LOG_DATA:
  4930. ds = "Log Data";
  4931. break;
  4932. case MPI_EVENT_STATE_CHANGE:
  4933. ds = "State Change";
  4934. break;
  4935. case MPI_EVENT_UNIT_ATTENTION:
  4936. ds = "Unit Attention";
  4937. break;
  4938. case MPI_EVENT_IOC_BUS_RESET:
  4939. ds = "IOC Bus Reset";
  4940. break;
  4941. case MPI_EVENT_EXT_BUS_RESET:
  4942. ds = "External Bus Reset";
  4943. break;
  4944. case MPI_EVENT_RESCAN:
  4945. ds = "Bus Rescan Event";
  4946. /* Ok, do we need to do anything here? As far as
  4947. I can tell, this is when a new device gets added
  4948. to the loop. */
  4949. break;
  4950. case MPI_EVENT_LINK_STATUS_CHANGE:
  4951. if (evData0 == MPI_EVENT_LINK_STATUS_FAILURE)
  4952. ds = "Link Status(FAILURE) Change";
  4953. else
  4954. ds = "Link Status(ACTIVE) Change";
  4955. break;
  4956. case MPI_EVENT_LOOP_STATE_CHANGE:
  4957. if (evData0 == MPI_EVENT_LOOP_STATE_CHANGE_LIP)
  4958. ds = "Loop State(LIP) Change";
  4959. else if (evData0 == MPI_EVENT_LOOP_STATE_CHANGE_LPE)
  4960. ds = "Loop State(LPE) Change"; /* ??? */
  4961. else
  4962. ds = "Loop State(LPB) Change"; /* ??? */
  4963. break;
  4964. case MPI_EVENT_LOGOUT:
  4965. ds = "Logout";
  4966. break;
  4967. case MPI_EVENT_EVENT_CHANGE:
  4968. if (evData0)
  4969. ds = "Events(ON) Change";
  4970. else
  4971. ds = "Events(OFF) Change";
  4972. break;
  4973. case MPI_EVENT_INTEGRATED_RAID:
  4974. {
  4975. u8 ReasonCode = (u8)(evData0 >> 16);
  4976. switch (ReasonCode) {
  4977. case MPI_EVENT_RAID_RC_VOLUME_CREATED :
  4978. ds = "Integrated Raid: Volume Created";
  4979. break;
  4980. case MPI_EVENT_RAID_RC_VOLUME_DELETED :
  4981. ds = "Integrated Raid: Volume Deleted";
  4982. break;
  4983. case MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED :
  4984. ds = "Integrated Raid: Volume Settings Changed";
  4985. break;
  4986. case MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED :
  4987. ds = "Integrated Raid: Volume Status Changed";
  4988. break;
  4989. case MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED :
  4990. ds = "Integrated Raid: Volume Physdisk Changed";
  4991. break;
  4992. case MPI_EVENT_RAID_RC_PHYSDISK_CREATED :
  4993. ds = "Integrated Raid: Physdisk Created";
  4994. break;
  4995. case MPI_EVENT_RAID_RC_PHYSDISK_DELETED :
  4996. ds = "Integrated Raid: Physdisk Deleted";
  4997. break;
  4998. case MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED :
  4999. ds = "Integrated Raid: Physdisk Settings Changed";
  5000. break;
  5001. case MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED :
  5002. ds = "Integrated Raid: Physdisk Status Changed";
  5003. break;
  5004. case MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED :
  5005. ds = "Integrated Raid: Domain Validation Needed";
  5006. break;
  5007. case MPI_EVENT_RAID_RC_SMART_DATA :
  5008. ds = "Integrated Raid; Smart Data";
  5009. break;
  5010. case MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED :
  5011. ds = "Integrated Raid: Replace Action Started";
  5012. break;
  5013. default:
  5014. ds = "Integrated Raid";
  5015. break;
  5016. }
  5017. break;
  5018. }
  5019. case MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE:
  5020. ds = "SCSI Device Status Change";
  5021. break;
  5022. case MPI_EVENT_SAS_DEVICE_STATUS_CHANGE:
  5023. {
  5024. u8 ReasonCode = (u8)(evData0 >> 16);
  5025. switch (ReasonCode) {
  5026. case MPI_EVENT_SAS_DEV_STAT_RC_ADDED:
  5027. ds = "SAS Device Status Change: Added";
  5028. break;
  5029. case MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING:
  5030. ds = "SAS Device Status Change: Deleted";
  5031. break;
  5032. case MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA:
  5033. ds = "SAS Device Status Change: SMART Data";
  5034. break;
  5035. case MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED:
  5036. ds = "SAS Device Status Change: No Persistancy Added";
  5037. break;
  5038. default:
  5039. ds = "SAS Device Status Change: Unknown";
  5040. break;
  5041. }
  5042. break;
  5043. }
  5044. case MPI_EVENT_ON_BUS_TIMER_EXPIRED:
  5045. ds = "Bus Timer Expired";
  5046. break;
  5047. case MPI_EVENT_QUEUE_FULL:
  5048. ds = "Queue Full";
  5049. break;
  5050. case MPI_EVENT_SAS_SES:
  5051. ds = "SAS SES Event";
  5052. break;
  5053. case MPI_EVENT_PERSISTENT_TABLE_FULL:
  5054. ds = "Persistent Table Full";
  5055. break;
  5056. case MPI_EVENT_SAS_PHY_LINK_STATUS:
  5057. ds = "SAS PHY Link Status";
  5058. break;
  5059. case MPI_EVENT_SAS_DISCOVERY_ERROR:
  5060. ds = "SAS Discovery Error";
  5061. break;
  5062. /*
  5063. * MPT base "custom" events may be added here...
  5064. */
  5065. default:
  5066. ds = "Unknown";
  5067. break;
  5068. }
  5069. strcpy(evStr,ds);
  5070. }
  5071. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  5072. /*
  5073. * ProcessEventNotification - Route a received EventNotificationReply to
  5074. * all currently regeistered event handlers.
  5075. * @ioc: Pointer to MPT_ADAPTER structure
  5076. * @pEventReply: Pointer to EventNotification reply frame
  5077. * @evHandlers: Pointer to integer, number of event handlers
  5078. *
  5079. * Returns sum of event handlers return values.
  5080. */
  5081. static int
  5082. ProcessEventNotification(MPT_ADAPTER *ioc, EventNotificationReply_t *pEventReply, int *evHandlers)
  5083. {
  5084. u16 evDataLen;
  5085. u32 evData0 = 0;
  5086. // u32 evCtx;
  5087. int ii;
  5088. int r = 0;
  5089. int handlers = 0;
  5090. char evStr[100];
  5091. u8 event;
  5092. /*
  5093. * Do platform normalization of values
  5094. */
  5095. event = le32_to_cpu(pEventReply->Event) & 0xFF;
  5096. // evCtx = le32_to_cpu(pEventReply->EventContext);
  5097. evDataLen = le16_to_cpu(pEventReply->EventDataLength);
  5098. if (evDataLen) {
  5099. evData0 = le32_to_cpu(pEventReply->Data[0]);
  5100. }
  5101. EventDescriptionStr(event, evData0, evStr);
  5102. devtprintk((MYIOC_s_INFO_FMT "MPT event (%s=%02Xh) detected!\n",
  5103. ioc->name,
  5104. evStr,
  5105. event));
  5106. #if defined(MPT_DEBUG) || defined(MPT_DEBUG_EVENTS)
  5107. printk(KERN_INFO MYNAM ": Event data:\n" KERN_INFO);
  5108. for (ii = 0; ii < evDataLen; ii++)
  5109. printk(" %08x", le32_to_cpu(pEventReply->Data[ii]));
  5110. printk("\n");
  5111. #endif
  5112. /*
  5113. * Do general / base driver event processing
  5114. */
  5115. switch(event) {
  5116. case MPI_EVENT_EVENT_CHANGE: /* 0A */
  5117. if (evDataLen) {
  5118. u8 evState = evData0 & 0xFF;
  5119. /* CHECKME! What if evState unexpectedly says OFF (0)? */
  5120. /* Update EventState field in cached IocFacts */
  5121. if (ioc->facts.Function) {
  5122. ioc->facts.EventState = evState;
  5123. }
  5124. }
  5125. break;
  5126. default:
  5127. break;
  5128. }
  5129. /*
  5130. * Should this event be logged? Events are written sequentially.
  5131. * When buffer is full, start again at the top.
  5132. */
  5133. if (ioc->events && (ioc->eventTypes & ( 1 << event))) {
  5134. int idx;
  5135. idx = ioc->eventContext % ioc->eventLogSize;
  5136. ioc->events[idx].event = event;
  5137. ioc->events[idx].eventContext = ioc->eventContext;
  5138. for (ii = 0; ii < 2; ii++) {
  5139. if (ii < evDataLen)
  5140. ioc->events[idx].data[ii] = le32_to_cpu(pEventReply->Data[ii]);
  5141. else
  5142. ioc->events[idx].data[ii] = 0;
  5143. }
  5144. ioc->eventContext++;
  5145. }
  5146. /*
  5147. * Call each currently registered protocol event handler.
  5148. */
  5149. for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) {
  5150. if (MptEvHandlers[ii]) {
  5151. devtprintk((MYIOC_s_INFO_FMT "Routing Event to event handler #%d\n",
  5152. ioc->name, ii));
  5153. r += (*(MptEvHandlers[ii]))(ioc, pEventReply);
  5154. handlers++;
  5155. }
  5156. }
  5157. /* FIXME? Examine results here? */
  5158. /*
  5159. * If needed, send (a single) EventAck.
  5160. */
  5161. if (pEventReply->AckRequired == MPI_EVENT_NOTIFICATION_ACK_REQUIRED) {
  5162. devtprintk((MYIOC_s_WARN_FMT
  5163. "EventAck required\n",ioc->name));
  5164. if ((ii = SendEventAck(ioc, pEventReply)) != 0) {
  5165. devtprintk((MYIOC_s_WARN_FMT "SendEventAck returned %d\n",
  5166. ioc->name, ii));
  5167. }
  5168. }
  5169. *evHandlers = handlers;
  5170. return r;
  5171. }
  5172. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  5173. /*
  5174. * mpt_fc_log_info - Log information returned from Fibre Channel IOC.
  5175. * @ioc: Pointer to MPT_ADAPTER structure
  5176. * @log_info: U32 LogInfo reply word from the IOC
  5177. *
  5178. * Refer to lsi/fc_log.h.
  5179. */
  5180. static void
  5181. mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info)
  5182. {
  5183. static char *subcl_str[8] = {
  5184. "FCP Initiator", "FCP Target", "LAN", "MPI Message Layer",
  5185. "FC Link", "Context Manager", "Invalid Field Offset", "State Change Info"
  5186. };
  5187. u8 subcl = (log_info >> 24) & 0x7;
  5188. printk(MYIOC_s_INFO_FMT "LogInfo(0x%08x): SubCl={%s}\n",
  5189. ioc->name, log_info, subcl_str[subcl]);
  5190. }
  5191. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  5192. /*
  5193. * mpt_sp_log_info - Log information returned from SCSI Parallel IOC.
  5194. * @ioc: Pointer to MPT_ADAPTER structure
  5195. * @mr: Pointer to MPT reply frame
  5196. * @log_info: U32 LogInfo word from the IOC
  5197. *
  5198. * Refer to lsi/sp_log.h.
  5199. */
  5200. static void
  5201. mpt_sp_log_info(MPT_ADAPTER *ioc, u32 log_info)
  5202. {
  5203. u32 info = log_info & 0x00FF0000;
  5204. char *desc = "unknown";
  5205. switch (info) {
  5206. case 0x00010000:
  5207. desc = "bug! MID not found";
  5208. if (ioc->reload_fw == 0)
  5209. ioc->reload_fw++;
  5210. break;
  5211. case 0x00020000:
  5212. desc = "Parity Error";
  5213. break;
  5214. case 0x00030000:
  5215. desc = "ASYNC Outbound Overrun";
  5216. break;
  5217. case 0x00040000:
  5218. desc = "SYNC Offset Error";
  5219. break;
  5220. case 0x00050000:
  5221. desc = "BM Change";
  5222. break;
  5223. case 0x00060000:
  5224. desc = "Msg In Overflow";
  5225. break;
  5226. case 0x00070000:
  5227. desc = "DMA Error";
  5228. break;
  5229. case 0x00080000:
  5230. desc = "Outbound DMA Overrun";
  5231. break;
  5232. case 0x00090000:
  5233. desc = "Task Management";
  5234. break;
  5235. case 0x000A0000:
  5236. desc = "Device Problem";
  5237. break;
  5238. case 0x000B0000:
  5239. desc = "Invalid Phase Change";
  5240. break;
  5241. case 0x000C0000:
  5242. desc = "Untagged Table Size";
  5243. break;
  5244. }
  5245. printk(MYIOC_s_INFO_FMT "LogInfo(0x%08x): F/W: %s\n", ioc->name, log_info, desc);
  5246. }
  5247. /* strings for sas loginfo */
  5248. static char *originator_str[] = {
  5249. "IOP", /* 00h */
  5250. "PL", /* 01h */
  5251. "IR" /* 02h */
  5252. };
  5253. static char *iop_code_str[] = {
  5254. NULL, /* 00h */
  5255. "Invalid SAS Address", /* 01h */
  5256. NULL, /* 02h */
  5257. "Invalid Page", /* 03h */
  5258. NULL, /* 04h */
  5259. "Task Terminated" /* 05h */
  5260. };
  5261. static char *pl_code_str[] = {
  5262. NULL, /* 00h */
  5263. "Open Failure", /* 01h */
  5264. "Invalid Scatter Gather List", /* 02h */
  5265. "Wrong Relative Offset or Frame Length", /* 03h */
  5266. "Frame Transfer Error", /* 04h */
  5267. "Transmit Frame Connected Low", /* 05h */
  5268. "SATA Non-NCQ RW Error Bit Set", /* 06h */
  5269. "SATA Read Log Receive Data Error", /* 07h */
  5270. "SATA NCQ Fail All Commands After Error", /* 08h */
  5271. "SATA Error in Receive Set Device Bit FIS", /* 09h */
  5272. "Receive Frame Invalid Message", /* 0Ah */
  5273. "Receive Context Message Valid Error", /* 0Bh */
  5274. "Receive Frame Current Frame Error", /* 0Ch */
  5275. "SATA Link Down", /* 0Dh */
  5276. "Discovery SATA Init W IOS", /* 0Eh */
  5277. "Config Invalid Page", /* 0Fh */
  5278. "Discovery SATA Init Timeout", /* 10h */
  5279. "Reset", /* 11h */
  5280. "Abort", /* 12h */
  5281. "IO Not Yet Executed", /* 13h */
  5282. "IO Executed", /* 14h */
  5283. NULL, /* 15h */
  5284. NULL, /* 16h */
  5285. NULL, /* 17h */
  5286. NULL, /* 18h */
  5287. NULL, /* 19h */
  5288. NULL, /* 1Ah */
  5289. NULL, /* 1Bh */
  5290. NULL, /* 1Ch */
  5291. NULL, /* 1Dh */
  5292. NULL, /* 1Eh */
  5293. NULL, /* 1Fh */
  5294. "Enclosure Management" /* 20h */
  5295. };
  5296. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  5297. /*
  5298. * mpt_sas_log_info - Log information returned from SAS IOC.
  5299. * @ioc: Pointer to MPT_ADAPTER structure
  5300. * @log_info: U32 LogInfo reply word from the IOC
  5301. *
  5302. * Refer to lsi/mpi_log_sas.h.
  5303. */
  5304. static void
  5305. mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info)
  5306. {
  5307. union loginfo_type {
  5308. u32 loginfo;
  5309. struct {
  5310. u32 subcode:16;
  5311. u32 code:8;
  5312. u32 originator:4;
  5313. u32 bus_type:4;
  5314. }dw;
  5315. };
  5316. union loginfo_type sas_loginfo;
  5317. char *code_desc = NULL;
  5318. sas_loginfo.loginfo = log_info;
  5319. if ((sas_loginfo.dw.bus_type != 3 /*SAS*/) &&
  5320. (sas_loginfo.dw.originator < sizeof(originator_str)/sizeof(char*)))
  5321. return;
  5322. if ((sas_loginfo.dw.originator == 0 /*IOP*/) &&
  5323. (sas_loginfo.dw.code < sizeof(iop_code_str)/sizeof(char*))) {
  5324. code_desc = iop_code_str[sas_loginfo.dw.code];
  5325. }else if ((sas_loginfo.dw.originator == 1 /*PL*/) &&
  5326. (sas_loginfo.dw.code < sizeof(pl_code_str)/sizeof(char*) )) {
  5327. code_desc = pl_code_str[sas_loginfo.dw.code];
  5328. }
  5329. if (code_desc != NULL)
  5330. printk(MYIOC_s_INFO_FMT
  5331. "LogInfo(0x%08x): Originator={%s}, Code={%s},"
  5332. " SubCode(0x%04x)\n",
  5333. ioc->name,
  5334. log_info,
  5335. originator_str[sas_loginfo.dw.originator],
  5336. code_desc,
  5337. sas_loginfo.dw.subcode);
  5338. else
  5339. printk(MYIOC_s_INFO_FMT
  5340. "LogInfo(0x%08x): Originator={%s}, Code=(0x%02x),"
  5341. " SubCode(0x%04x)\n",
  5342. ioc->name,
  5343. log_info,
  5344. originator_str[sas_loginfo.dw.originator],
  5345. sas_loginfo.dw.code,
  5346. sas_loginfo.dw.subcode);
  5347. }
  5348. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  5349. /*
  5350. * mpt_sp_ioc_info - IOC information returned from SCSI Parallel IOC.
  5351. * @ioc: Pointer to MPT_ADAPTER structure
  5352. * @ioc_status: U32 IOCStatus word from IOC
  5353. * @mf: Pointer to MPT request frame
  5354. *
  5355. * Refer to lsi/mpi.h.
  5356. */
  5357. static void
  5358. mpt_sp_ioc_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf)
  5359. {
  5360. u32 status = ioc_status & MPI_IOCSTATUS_MASK;
  5361. char *desc = "";
  5362. switch (status) {
  5363. case MPI_IOCSTATUS_INVALID_FUNCTION: /* 0x0001 */
  5364. desc = "Invalid Function";
  5365. break;
  5366. case MPI_IOCSTATUS_BUSY: /* 0x0002 */
  5367. desc = "Busy";
  5368. break;
  5369. case MPI_IOCSTATUS_INVALID_SGL: /* 0x0003 */
  5370. desc = "Invalid SGL";
  5371. break;
  5372. case MPI_IOCSTATUS_INTERNAL_ERROR: /* 0x0004 */
  5373. desc = "Internal Error";
  5374. break;
  5375. case MPI_IOCSTATUS_RESERVED: /* 0x0005 */
  5376. desc = "Reserved";
  5377. break;
  5378. case MPI_IOCSTATUS_INSUFFICIENT_RESOURCES: /* 0x0006 */
  5379. desc = "Insufficient Resources";
  5380. break;
  5381. case MPI_IOCSTATUS_INVALID_FIELD: /* 0x0007 */
  5382. desc = "Invalid Field";
  5383. break;
  5384. case MPI_IOCSTATUS_INVALID_STATE: /* 0x0008 */
  5385. desc = "Invalid State";
  5386. break;
  5387. case MPI_IOCSTATUS_CONFIG_INVALID_ACTION: /* 0x0020 */
  5388. case MPI_IOCSTATUS_CONFIG_INVALID_TYPE: /* 0x0021 */
  5389. case MPI_IOCSTATUS_CONFIG_INVALID_PAGE: /* 0x0022 */
  5390. case MPI_IOCSTATUS_CONFIG_INVALID_DATA: /* 0x0023 */
  5391. case MPI_IOCSTATUS_CONFIG_NO_DEFAULTS: /* 0x0024 */
  5392. case MPI_IOCSTATUS_CONFIG_CANT_COMMIT: /* 0x0025 */
  5393. /* No message for Config IOCStatus values */
  5394. break;
  5395. case MPI_IOCSTATUS_SCSI_RECOVERED_ERROR: /* 0x0040 */
  5396. /* No message for recovered error
  5397. desc = "SCSI Recovered Error";
  5398. */
  5399. break;
  5400. case MPI_IOCSTATUS_SCSI_INVALID_BUS: /* 0x0041 */
  5401. desc = "SCSI Invalid Bus";
  5402. break;
  5403. case MPI_IOCSTATUS_SCSI_INVALID_TARGETID: /* 0x0042 */
  5404. desc = "SCSI Invalid TargetID";
  5405. break;
  5406. case MPI_IOCSTATUS_SCSI_DEVICE_NOT_THERE: /* 0x0043 */
  5407. {
  5408. SCSIIORequest_t *pScsiReq = (SCSIIORequest_t *) mf;
  5409. U8 cdb = pScsiReq->CDB[0];
  5410. if (cdb != 0x12) { /* Inquiry is issued for device scanning */
  5411. desc = "SCSI Device Not There";
  5412. }
  5413. break;
  5414. }
  5415. case MPI_IOCSTATUS_SCSI_DATA_OVERRUN: /* 0x0044 */
  5416. desc = "SCSI Data Overrun";
  5417. break;
  5418. case MPI_IOCSTATUS_SCSI_DATA_UNDERRUN: /* 0x0045 */
  5419. /* This error is checked in scsi_io_done(). Skip.
  5420. desc = "SCSI Data Underrun";
  5421. */
  5422. break;
  5423. case MPI_IOCSTATUS_SCSI_IO_DATA_ERROR: /* 0x0046 */
  5424. desc = "SCSI I/O Data Error";
  5425. break;
  5426. case MPI_IOCSTATUS_SCSI_PROTOCOL_ERROR: /* 0x0047 */
  5427. desc = "SCSI Protocol Error";
  5428. break;
  5429. case MPI_IOCSTATUS_SCSI_TASK_TERMINATED: /* 0x0048 */
  5430. desc = "SCSI Task Terminated";
  5431. break;
  5432. case MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH: /* 0x0049 */
  5433. desc = "SCSI Residual Mismatch";
  5434. break;
  5435. case MPI_IOCSTATUS_SCSI_TASK_MGMT_FAILED: /* 0x004A */
  5436. desc = "SCSI Task Management Failed";
  5437. break;
  5438. case MPI_IOCSTATUS_SCSI_IOC_TERMINATED: /* 0x004B */
  5439. desc = "SCSI IOC Terminated";
  5440. break;
  5441. case MPI_IOCSTATUS_SCSI_EXT_TERMINATED: /* 0x004C */
  5442. desc = "SCSI Ext Terminated";
  5443. break;
  5444. default:
  5445. desc = "Others";
  5446. break;
  5447. }
  5448. if (desc != "")
  5449. printk(MYIOC_s_INFO_FMT "IOCStatus(0x%04x): %s\n", ioc->name, status, desc);
  5450. }
  5451. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  5452. EXPORT_SYMBOL(mpt_attach);
  5453. EXPORT_SYMBOL(mpt_detach);
  5454. #ifdef CONFIG_PM
  5455. EXPORT_SYMBOL(mpt_resume);
  5456. EXPORT_SYMBOL(mpt_suspend);
  5457. #endif
  5458. EXPORT_SYMBOL(ioc_list);
  5459. EXPORT_SYMBOL(mpt_proc_root_dir);
  5460. EXPORT_SYMBOL(mpt_register);
  5461. EXPORT_SYMBOL(mpt_deregister);
  5462. EXPORT_SYMBOL(mpt_event_register);
  5463. EXPORT_SYMBOL(mpt_event_deregister);
  5464. EXPORT_SYMBOL(mpt_reset_register);
  5465. EXPORT_SYMBOL(mpt_reset_deregister);
  5466. EXPORT_SYMBOL(mpt_device_driver_register);
  5467. EXPORT_SYMBOL(mpt_device_driver_deregister);
  5468. EXPORT_SYMBOL(mpt_get_msg_frame);
  5469. EXPORT_SYMBOL(mpt_put_msg_frame);
  5470. EXPORT_SYMBOL(mpt_free_msg_frame);
  5471. EXPORT_SYMBOL(mpt_add_sge);
  5472. EXPORT_SYMBOL(mpt_send_handshake_request);
  5473. EXPORT_SYMBOL(mpt_verify_adapter);
  5474. EXPORT_SYMBOL(mpt_GetIocState);
  5475. EXPORT_SYMBOL(mpt_print_ioc_summary);
  5476. EXPORT_SYMBOL(mpt_lan_index);
  5477. EXPORT_SYMBOL(mpt_stm_index);
  5478. EXPORT_SYMBOL(mpt_HardResetHandler);
  5479. EXPORT_SYMBOL(mpt_config);
  5480. EXPORT_SYMBOL(mpt_toolbox);
  5481. EXPORT_SYMBOL(mpt_findImVolumes);
  5482. EXPORT_SYMBOL(mpt_read_ioc_pg_3);
  5483. EXPORT_SYMBOL(mpt_alloc_fw_memory);
  5484. EXPORT_SYMBOL(mpt_free_fw_memory);
  5485. EXPORT_SYMBOL(mptbase_sas_persist_operation);
  5486. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  5487. /*
  5488. * fusion_init - Fusion MPT base driver initialization routine.
  5489. *
  5490. * Returns 0 for success, non-zero for failure.
  5491. */
  5492. static int __init
  5493. fusion_init(void)
  5494. {
  5495. int i;
  5496. show_mptmod_ver(my_NAME, my_VERSION);
  5497. printk(KERN_INFO COPYRIGHT "\n");
  5498. for (i = 0; i < MPT_MAX_PROTOCOL_DRIVERS; i++) {
  5499. MptCallbacks[i] = NULL;
  5500. MptDriverClass[i] = MPTUNKNOWN_DRIVER;
  5501. MptEvHandlers[i] = NULL;
  5502. MptResetHandlers[i] = NULL;
  5503. }
  5504. /* Register ourselves (mptbase) in order to facilitate
  5505. * EventNotification handling.
  5506. */
  5507. mpt_base_index = mpt_register(mpt_base_reply, MPTBASE_DRIVER);
  5508. /* Register for hard reset handling callbacks.
  5509. */
  5510. if (mpt_reset_register(mpt_base_index, mpt_ioc_reset) == 0) {
  5511. dprintk((KERN_INFO MYNAM ": Register for IOC reset notification\n"));
  5512. } else {
  5513. /* FIXME! */
  5514. }
  5515. #ifdef CONFIG_PROC_FS
  5516. (void) procmpt_create();
  5517. #endif
  5518. return 0;
  5519. }
  5520. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  5521. /*
  5522. * fusion_exit - Perform driver unload cleanup.
  5523. *
  5524. * This routine frees all resources associated with each MPT adapter
  5525. * and removes all %MPT_PROCFS_MPTBASEDIR entries.
  5526. */
  5527. static void __exit
  5528. fusion_exit(void)
  5529. {
  5530. dexitprintk((KERN_INFO MYNAM ": fusion_exit() called!\n"));
  5531. mpt_reset_deregister(mpt_base_index);
  5532. #ifdef CONFIG_PROC_FS
  5533. procmpt_destroy();
  5534. #endif
  5535. }
  5536. module_init(fusion_init);
  5537. module_exit(fusion_exit);