time.c 16 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594
  1. /* $Id: time.c,v 1.60 2002/01/23 14:33:55 davem Exp $
  2. * linux/arch/sparc/kernel/time.c
  3. *
  4. * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
  5. * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
  6. *
  7. * Chris Davis (cdavis@cois.on.ca) 03/27/1998
  8. * Added support for the intersil on the sun4/4200
  9. *
  10. * Gleb Raiko (rajko@mech.math.msu.su) 08/18/1998
  11. * Support for MicroSPARC-IIep, PCI CPU.
  12. *
  13. * This file handles the Sparc specific time handling details.
  14. *
  15. * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
  16. * "A Kernel Model for Precision Timekeeping" by Dave Mills
  17. */
  18. #include <linux/errno.h>
  19. #include <linux/module.h>
  20. #include <linux/sched.h>
  21. #include <linux/kernel.h>
  22. #include <linux/param.h>
  23. #include <linux/string.h>
  24. #include <linux/mm.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/time.h>
  27. #include <linux/timex.h>
  28. #include <linux/init.h>
  29. #include <linux/pci.h>
  30. #include <linux/ioport.h>
  31. #include <linux/profile.h>
  32. #include <asm/oplib.h>
  33. #include <asm/timer.h>
  34. #include <asm/mostek.h>
  35. #include <asm/system.h>
  36. #include <asm/irq.h>
  37. #include <asm/io.h>
  38. #include <asm/idprom.h>
  39. #include <asm/machines.h>
  40. #include <asm/sun4paddr.h>
  41. #include <asm/page.h>
  42. #include <asm/pcic.h>
  43. #include <asm/of_device.h>
  44. #include <asm/irq_regs.h>
  45. #include "irq.h"
  46. DEFINE_SPINLOCK(rtc_lock);
  47. enum sparc_clock_type sp_clock_typ;
  48. DEFINE_SPINLOCK(mostek_lock);
  49. void __iomem *mstk48t02_regs = NULL;
  50. static struct mostek48t08 __iomem *mstk48t08_regs = NULL;
  51. static int set_rtc_mmss(unsigned long);
  52. static int sbus_do_settimeofday(struct timespec *tv);
  53. #ifdef CONFIG_SUN4
  54. struct intersil *intersil_clock;
  55. #define intersil_cmd(intersil_reg, intsil_cmd) intersil_reg->int_cmd_reg = \
  56. (intsil_cmd)
  57. #define intersil_intr(intersil_reg, intsil_cmd) intersil_reg->int_intr_reg = \
  58. (intsil_cmd)
  59. #define intersil_start(intersil_reg) intersil_cmd(intersil_reg, \
  60. ( INTERSIL_START | INTERSIL_32K | INTERSIL_NORMAL | INTERSIL_24H |\
  61. INTERSIL_INTR_ENABLE))
  62. #define intersil_stop(intersil_reg) intersil_cmd(intersil_reg, \
  63. ( INTERSIL_STOP | INTERSIL_32K | INTERSIL_NORMAL | INTERSIL_24H |\
  64. INTERSIL_INTR_ENABLE))
  65. #define intersil_read_intr(intersil_reg, towhere) towhere = \
  66. intersil_reg->int_intr_reg
  67. #endif
  68. unsigned long profile_pc(struct pt_regs *regs)
  69. {
  70. extern char __copy_user_begin[], __copy_user_end[];
  71. extern char __atomic_begin[], __atomic_end[];
  72. extern char __bzero_begin[], __bzero_end[];
  73. unsigned long pc = regs->pc;
  74. if (in_lock_functions(pc) ||
  75. (pc >= (unsigned long) __copy_user_begin &&
  76. pc < (unsigned long) __copy_user_end) ||
  77. (pc >= (unsigned long) __atomic_begin &&
  78. pc < (unsigned long) __atomic_end) ||
  79. (pc >= (unsigned long) __bzero_begin &&
  80. pc < (unsigned long) __bzero_end))
  81. pc = regs->u_regs[UREG_RETPC];
  82. return pc;
  83. }
  84. EXPORT_SYMBOL(profile_pc);
  85. __volatile__ unsigned int *master_l10_counter;
  86. __volatile__ unsigned int *master_l10_limit;
  87. /*
  88. * timer_interrupt() needs to keep up the real-time clock,
  89. * as well as call the "do_timer()" routine every clocktick
  90. */
  91. #define TICK_SIZE (tick_nsec / 1000)
  92. irqreturn_t timer_interrupt(int irq, void *dev_id)
  93. {
  94. /* last time the cmos clock got updated */
  95. static long last_rtc_update;
  96. #ifndef CONFIG_SMP
  97. profile_tick(CPU_PROFILING);
  98. #endif
  99. /* Protect counter clear so that do_gettimeoffset works */
  100. write_seqlock(&xtime_lock);
  101. #ifdef CONFIG_SUN4
  102. if((idprom->id_machtype == (SM_SUN4 | SM_4_260)) ||
  103. (idprom->id_machtype == (SM_SUN4 | SM_4_110))) {
  104. int temp;
  105. intersil_read_intr(intersil_clock, temp);
  106. /* re-enable the irq */
  107. enable_pil_irq(10);
  108. }
  109. #endif
  110. clear_clock_irq();
  111. do_timer(1);
  112. #ifndef CONFIG_SMP
  113. update_process_times(user_mode(get_irq_regs()));
  114. #endif
  115. /* Determine when to update the Mostek clock. */
  116. if (ntp_synced() &&
  117. xtime.tv_sec > last_rtc_update + 660 &&
  118. (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
  119. (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
  120. if (set_rtc_mmss(xtime.tv_sec) == 0)
  121. last_rtc_update = xtime.tv_sec;
  122. else
  123. last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */
  124. }
  125. write_sequnlock(&xtime_lock);
  126. return IRQ_HANDLED;
  127. }
  128. /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
  129. static void __devinit kick_start_clock(void)
  130. {
  131. struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
  132. unsigned char sec;
  133. int i, count;
  134. prom_printf("CLOCK: Clock was stopped. Kick start ");
  135. spin_lock_irq(&mostek_lock);
  136. /* Turn on the kick start bit to start the oscillator. */
  137. regs->creg |= MSTK_CREG_WRITE;
  138. regs->sec &= ~MSTK_STOP;
  139. regs->hour |= MSTK_KICK_START;
  140. regs->creg &= ~MSTK_CREG_WRITE;
  141. spin_unlock_irq(&mostek_lock);
  142. /* Delay to allow the clock oscillator to start. */
  143. sec = MSTK_REG_SEC(regs);
  144. for (i = 0; i < 3; i++) {
  145. while (sec == MSTK_REG_SEC(regs))
  146. for (count = 0; count < 100000; count++)
  147. /* nothing */ ;
  148. prom_printf(".");
  149. sec = regs->sec;
  150. }
  151. prom_printf("\n");
  152. spin_lock_irq(&mostek_lock);
  153. /* Turn off kick start and set a "valid" time and date. */
  154. regs->creg |= MSTK_CREG_WRITE;
  155. regs->hour &= ~MSTK_KICK_START;
  156. MSTK_SET_REG_SEC(regs,0);
  157. MSTK_SET_REG_MIN(regs,0);
  158. MSTK_SET_REG_HOUR(regs,0);
  159. MSTK_SET_REG_DOW(regs,5);
  160. MSTK_SET_REG_DOM(regs,1);
  161. MSTK_SET_REG_MONTH(regs,8);
  162. MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
  163. regs->creg &= ~MSTK_CREG_WRITE;
  164. spin_unlock_irq(&mostek_lock);
  165. /* Ensure the kick start bit is off. If it isn't, turn it off. */
  166. while (regs->hour & MSTK_KICK_START) {
  167. prom_printf("CLOCK: Kick start still on!\n");
  168. spin_lock_irq(&mostek_lock);
  169. regs->creg |= MSTK_CREG_WRITE;
  170. regs->hour &= ~MSTK_KICK_START;
  171. regs->creg &= ~MSTK_CREG_WRITE;
  172. spin_unlock_irq(&mostek_lock);
  173. }
  174. prom_printf("CLOCK: Kick start procedure successful.\n");
  175. }
  176. /* Return nonzero if the clock chip battery is low. */
  177. static __inline__ int has_low_battery(void)
  178. {
  179. struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
  180. unsigned char data1, data2;
  181. spin_lock_irq(&mostek_lock);
  182. data1 = regs->eeprom[0]; /* Read some data. */
  183. regs->eeprom[0] = ~data1; /* Write back the complement. */
  184. data2 = regs->eeprom[0]; /* Read back the complement. */
  185. regs->eeprom[0] = data1; /* Restore the original value. */
  186. spin_unlock_irq(&mostek_lock);
  187. return (data1 == data2); /* Was the write blocked? */
  188. }
  189. static void __devinit mostek_set_system_time(void)
  190. {
  191. unsigned int year, mon, day, hour, min, sec;
  192. struct mostek48t02 *mregs;
  193. mregs = (struct mostek48t02 *)mstk48t02_regs;
  194. if(!mregs) {
  195. prom_printf("Something wrong, clock regs not mapped yet.\n");
  196. prom_halt();
  197. }
  198. spin_lock_irq(&mostek_lock);
  199. mregs->creg |= MSTK_CREG_READ;
  200. sec = MSTK_REG_SEC(mregs);
  201. min = MSTK_REG_MIN(mregs);
  202. hour = MSTK_REG_HOUR(mregs);
  203. day = MSTK_REG_DOM(mregs);
  204. mon = MSTK_REG_MONTH(mregs);
  205. year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
  206. xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
  207. xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
  208. set_normalized_timespec(&wall_to_monotonic,
  209. -xtime.tv_sec, -xtime.tv_nsec);
  210. mregs->creg &= ~MSTK_CREG_READ;
  211. spin_unlock_irq(&mostek_lock);
  212. }
  213. /* Probe for the real time clock chip on Sun4 */
  214. static __inline__ void sun4_clock_probe(void)
  215. {
  216. #ifdef CONFIG_SUN4
  217. int temp;
  218. struct resource r;
  219. memset(&r, 0, sizeof(r));
  220. if( idprom->id_machtype == (SM_SUN4 | SM_4_330) ) {
  221. sp_clock_typ = MSTK48T02;
  222. r.start = sun4_clock_physaddr;
  223. mstk48t02_regs = sbus_ioremap(&r, 0,
  224. sizeof(struct mostek48t02), NULL);
  225. mstk48t08_regs = NULL; /* To catch weirdness */
  226. intersil_clock = NULL; /* just in case */
  227. /* Kick start the clock if it is completely stopped. */
  228. if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
  229. kick_start_clock();
  230. } else if( idprom->id_machtype == (SM_SUN4 | SM_4_260)) {
  231. /* intersil setup code */
  232. printk("Clock: INTERSIL at %8x ",sun4_clock_physaddr);
  233. sp_clock_typ = INTERSIL;
  234. r.start = sun4_clock_physaddr;
  235. intersil_clock = (struct intersil *)
  236. sbus_ioremap(&r, 0, sizeof(*intersil_clock), "intersil");
  237. mstk48t02_regs = 0; /* just be sure */
  238. mstk48t08_regs = NULL; /* ditto */
  239. /* initialise the clock */
  240. intersil_intr(intersil_clock,INTERSIL_INT_100HZ);
  241. intersil_start(intersil_clock);
  242. intersil_read_intr(intersil_clock, temp);
  243. while (!(temp & 0x80))
  244. intersil_read_intr(intersil_clock, temp);
  245. intersil_read_intr(intersil_clock, temp);
  246. while (!(temp & 0x80))
  247. intersil_read_intr(intersil_clock, temp);
  248. intersil_stop(intersil_clock);
  249. }
  250. #endif
  251. }
  252. #ifndef CONFIG_SUN4
  253. static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match)
  254. {
  255. struct device_node *dp = op->node;
  256. const char *model = of_get_property(dp, "model", NULL);
  257. if (!model)
  258. return -ENODEV;
  259. if (!strcmp(model, "mk48t02")) {
  260. sp_clock_typ = MSTK48T02;
  261. /* Map the clock register io area read-only */
  262. mstk48t02_regs = of_ioremap(&op->resource[0], 0,
  263. sizeof(struct mostek48t02),
  264. "mk48t02");
  265. mstk48t08_regs = NULL; /* To catch weirdness */
  266. } else if (!strcmp(model, "mk48t08")) {
  267. sp_clock_typ = MSTK48T08;
  268. mstk48t08_regs = of_ioremap(&op->resource[0], 0,
  269. sizeof(struct mostek48t08),
  270. "mk48t08");
  271. mstk48t02_regs = &mstk48t08_regs->regs;
  272. } else
  273. return -ENODEV;
  274. /* Report a low battery voltage condition. */
  275. if (has_low_battery())
  276. printk(KERN_CRIT "NVRAM: Low battery voltage!\n");
  277. /* Kick start the clock if it is completely stopped. */
  278. if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
  279. kick_start_clock();
  280. mostek_set_system_time();
  281. return 0;
  282. }
  283. static struct of_device_id clock_match[] = {
  284. {
  285. .name = "eeprom",
  286. },
  287. {},
  288. };
  289. static struct of_platform_driver clock_driver = {
  290. .name = "clock",
  291. .match_table = clock_match,
  292. .probe = clock_probe,
  293. };
  294. /* Probe for the mostek real time clock chip. */
  295. static int __init clock_init(void)
  296. {
  297. return of_register_driver(&clock_driver, &of_platform_bus_type);
  298. }
  299. /* Must be after subsys_initcall() so that busses are probed. Must
  300. * be before device_initcall() because things like the RTC driver
  301. * need to see the clock registers.
  302. */
  303. fs_initcall(clock_init);
  304. #endif /* !CONFIG_SUN4 */
  305. void __init sbus_time_init(void)
  306. {
  307. BTFIXUPSET_CALL(bus_do_settimeofday, sbus_do_settimeofday, BTFIXUPCALL_NORM);
  308. btfixup();
  309. if (ARCH_SUN4)
  310. sun4_clock_probe();
  311. sparc_init_timers(timer_interrupt);
  312. #ifdef CONFIG_SUN4
  313. if(idprom->id_machtype == (SM_SUN4 | SM_4_330)) {
  314. mostek_set_system_time();
  315. } else if(idprom->id_machtype == (SM_SUN4 | SM_4_260) ) {
  316. /* initialise the intersil on sun4 */
  317. unsigned int year, mon, day, hour, min, sec;
  318. int temp;
  319. struct intersil *iregs;
  320. iregs=intersil_clock;
  321. if(!iregs) {
  322. prom_printf("Something wrong, clock regs not mapped yet.\n");
  323. prom_halt();
  324. }
  325. intersil_intr(intersil_clock,INTERSIL_INT_100HZ);
  326. disable_pil_irq(10);
  327. intersil_stop(iregs);
  328. intersil_read_intr(intersil_clock, temp);
  329. temp = iregs->clk.int_csec;
  330. sec = iregs->clk.int_sec;
  331. min = iregs->clk.int_min;
  332. hour = iregs->clk.int_hour;
  333. day = iregs->clk.int_day;
  334. mon = iregs->clk.int_month;
  335. year = MSTK_CVT_YEAR(iregs->clk.int_year);
  336. enable_pil_irq(10);
  337. intersil_start(iregs);
  338. xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
  339. xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
  340. set_normalized_timespec(&wall_to_monotonic,
  341. -xtime.tv_sec, -xtime.tv_nsec);
  342. printk("%u/%u/%u %u:%u:%u\n",day,mon,year,hour,min,sec);
  343. }
  344. #endif
  345. /* Now that OBP ticker has been silenced, it is safe to enable IRQ. */
  346. local_irq_enable();
  347. }
  348. void __init time_init(void)
  349. {
  350. #ifdef CONFIG_PCI
  351. extern void pci_time_init(void);
  352. if (pcic_present()) {
  353. pci_time_init();
  354. return;
  355. }
  356. #endif
  357. sbus_time_init();
  358. }
  359. static inline unsigned long do_gettimeoffset(void)
  360. {
  361. return (*master_l10_counter >> 10) & 0x1fffff;
  362. }
  363. /* Ok, my cute asm atomicity trick doesn't work anymore.
  364. * There are just too many variables that need to be protected
  365. * now (both members of xtime, et al.)
  366. */
  367. void do_gettimeofday(struct timeval *tv)
  368. {
  369. unsigned long flags;
  370. unsigned long seq;
  371. unsigned long usec, sec;
  372. unsigned long max_ntp_tick = tick_usec - tickadj;
  373. do {
  374. seq = read_seqbegin_irqsave(&xtime_lock, flags);
  375. usec = do_gettimeoffset();
  376. /*
  377. * If time_adjust is negative then NTP is slowing the clock
  378. * so make sure not to go into next possible interval.
  379. * Better to lose some accuracy than have time go backwards..
  380. */
  381. if (unlikely(time_adjust < 0))
  382. usec = min(usec, max_ntp_tick);
  383. sec = xtime.tv_sec;
  384. usec += (xtime.tv_nsec / 1000);
  385. } while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
  386. while (usec >= 1000000) {
  387. usec -= 1000000;
  388. sec++;
  389. }
  390. tv->tv_sec = sec;
  391. tv->tv_usec = usec;
  392. }
  393. EXPORT_SYMBOL(do_gettimeofday);
  394. int do_settimeofday(struct timespec *tv)
  395. {
  396. int ret;
  397. write_seqlock_irq(&xtime_lock);
  398. ret = bus_do_settimeofday(tv);
  399. write_sequnlock_irq(&xtime_lock);
  400. clock_was_set();
  401. return ret;
  402. }
  403. EXPORT_SYMBOL(do_settimeofday);
  404. static int sbus_do_settimeofday(struct timespec *tv)
  405. {
  406. time_t wtm_sec, sec = tv->tv_sec;
  407. long wtm_nsec, nsec = tv->tv_nsec;
  408. if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
  409. return -EINVAL;
  410. /*
  411. * This is revolting. We need to set "xtime" correctly. However, the
  412. * value in this location is the value at the most recent update of
  413. * wall time. Discover what correction gettimeofday() would have
  414. * made, and then undo it!
  415. */
  416. nsec -= 1000 * do_gettimeoffset();
  417. wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
  418. wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
  419. set_normalized_timespec(&xtime, sec, nsec);
  420. set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
  421. ntp_clear();
  422. return 0;
  423. }
  424. /*
  425. * BUG: This routine does not handle hour overflow properly; it just
  426. * sets the minutes. Usually you won't notice until after reboot!
  427. */
  428. static int set_rtc_mmss(unsigned long nowtime)
  429. {
  430. int real_seconds, real_minutes, mostek_minutes;
  431. struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
  432. unsigned long flags;
  433. #ifdef CONFIG_SUN4
  434. struct intersil *iregs = intersil_clock;
  435. int temp;
  436. #endif
  437. /* Not having a register set can lead to trouble. */
  438. if (!regs) {
  439. #ifdef CONFIG_SUN4
  440. if(!iregs)
  441. return -1;
  442. else {
  443. temp = iregs->clk.int_csec;
  444. mostek_minutes = iregs->clk.int_min;
  445. real_seconds = nowtime % 60;
  446. real_minutes = nowtime / 60;
  447. if (((abs(real_minutes - mostek_minutes) + 15)/30) & 1)
  448. real_minutes += 30; /* correct for half hour time zone */
  449. real_minutes %= 60;
  450. if (abs(real_minutes - mostek_minutes) < 30) {
  451. intersil_stop(iregs);
  452. iregs->clk.int_sec=real_seconds;
  453. iregs->clk.int_min=real_minutes;
  454. intersil_start(iregs);
  455. } else {
  456. printk(KERN_WARNING
  457. "set_rtc_mmss: can't update from %d to %d\n",
  458. mostek_minutes, real_minutes);
  459. return -1;
  460. }
  461. return 0;
  462. }
  463. #endif
  464. }
  465. spin_lock_irqsave(&mostek_lock, flags);
  466. /* Read the current RTC minutes. */
  467. regs->creg |= MSTK_CREG_READ;
  468. mostek_minutes = MSTK_REG_MIN(regs);
  469. regs->creg &= ~MSTK_CREG_READ;
  470. /*
  471. * since we're only adjusting minutes and seconds,
  472. * don't interfere with hour overflow. This avoids
  473. * messing with unknown time zones but requires your
  474. * RTC not to be off by more than 15 minutes
  475. */
  476. real_seconds = nowtime % 60;
  477. real_minutes = nowtime / 60;
  478. if (((abs(real_minutes - mostek_minutes) + 15)/30) & 1)
  479. real_minutes += 30; /* correct for half hour time zone */
  480. real_minutes %= 60;
  481. if (abs(real_minutes - mostek_minutes) < 30) {
  482. regs->creg |= MSTK_CREG_WRITE;
  483. MSTK_SET_REG_SEC(regs,real_seconds);
  484. MSTK_SET_REG_MIN(regs,real_minutes);
  485. regs->creg &= ~MSTK_CREG_WRITE;
  486. spin_unlock_irqrestore(&mostek_lock, flags);
  487. return 0;
  488. } else {
  489. spin_unlock_irqrestore(&mostek_lock, flags);
  490. return -1;
  491. }
  492. }