common.c 11 KB

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  1. /*
  2. * Low-Level PCI Support for PC
  3. *
  4. * (c) 1999--2000 Martin Mares <mj@ucw.cz>
  5. */
  6. #include <linux/sched.h>
  7. #include <linux/pci.h>
  8. #include <linux/ioport.h>
  9. #include <linux/init.h>
  10. #include <linux/dmi.h>
  11. #include <asm/acpi.h>
  12. #include <asm/segment.h>
  13. #include <asm/io.h>
  14. #include <asm/smp.h>
  15. #include "pci.h"
  16. unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
  17. PCI_PROBE_MMCONF;
  18. static int pci_bf_sort;
  19. int pci_routeirq;
  20. int pcibios_last_bus = -1;
  21. unsigned long pirq_table_addr;
  22. struct pci_bus *pci_root_bus;
  23. struct pci_raw_ops *raw_pci_ops;
  24. static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
  25. {
  26. return raw_pci_ops->read(0, bus->number, devfn, where, size, value);
  27. }
  28. static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
  29. {
  30. return raw_pci_ops->write(0, bus->number, devfn, where, size, value);
  31. }
  32. struct pci_ops pci_root_ops = {
  33. .read = pci_read,
  34. .write = pci_write,
  35. };
  36. /*
  37. * legacy, numa, and acpi all want to call pcibios_scan_root
  38. * from their initcalls. This flag prevents that.
  39. */
  40. int pcibios_scanned;
  41. /*
  42. * This interrupt-safe spinlock protects all accesses to PCI
  43. * configuration space.
  44. */
  45. DEFINE_SPINLOCK(pci_config_lock);
  46. /*
  47. * Several buggy motherboards address only 16 devices and mirror
  48. * them to next 16 IDs. We try to detect this `feature' on all
  49. * primary buses (those containing host bridges as they are
  50. * expected to be unique) and remove the ghost devices.
  51. */
  52. static void __devinit pcibios_fixup_ghosts(struct pci_bus *b)
  53. {
  54. struct list_head *ln, *mn;
  55. struct pci_dev *d, *e;
  56. int mirror = PCI_DEVFN(16,0);
  57. int seen_host_bridge = 0;
  58. int i;
  59. DBG("PCI: Scanning for ghost devices on bus %d\n", b->number);
  60. list_for_each(ln, &b->devices) {
  61. d = pci_dev_b(ln);
  62. if ((d->class >> 8) == PCI_CLASS_BRIDGE_HOST)
  63. seen_host_bridge++;
  64. for (mn=ln->next; mn != &b->devices; mn=mn->next) {
  65. e = pci_dev_b(mn);
  66. if (e->devfn != d->devfn + mirror ||
  67. e->vendor != d->vendor ||
  68. e->device != d->device ||
  69. e->class != d->class)
  70. continue;
  71. for(i=0; i<PCI_NUM_RESOURCES; i++)
  72. if (e->resource[i].start != d->resource[i].start ||
  73. e->resource[i].end != d->resource[i].end ||
  74. e->resource[i].flags != d->resource[i].flags)
  75. continue;
  76. break;
  77. }
  78. if (mn == &b->devices)
  79. return;
  80. }
  81. if (!seen_host_bridge)
  82. return;
  83. printk(KERN_WARNING "PCI: Ignoring ghost devices on bus %02x\n", b->number);
  84. ln = &b->devices;
  85. while (ln->next != &b->devices) {
  86. d = pci_dev_b(ln->next);
  87. if (d->devfn >= mirror) {
  88. list_del(&d->global_list);
  89. list_del(&d->bus_list);
  90. kfree(d);
  91. } else
  92. ln = ln->next;
  93. }
  94. }
  95. /*
  96. * Called after each bus is probed, but before its children
  97. * are examined.
  98. */
  99. void __devinit pcibios_fixup_bus(struct pci_bus *b)
  100. {
  101. pcibios_fixup_ghosts(b);
  102. pci_read_bridge_bases(b);
  103. }
  104. /*
  105. * Only use DMI information to set this if nothing was passed
  106. * on the kernel command line (which was parsed earlier).
  107. */
  108. static int __devinit set_bf_sort(struct dmi_system_id *d)
  109. {
  110. if (pci_bf_sort == pci_bf_sort_default) {
  111. pci_bf_sort = pci_dmi_bf;
  112. printk(KERN_INFO "PCI: %s detected, enabling pci=bfsort.\n", d->ident);
  113. }
  114. return 0;
  115. }
  116. /*
  117. * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
  118. */
  119. #ifdef __i386__
  120. static int __devinit assign_all_busses(struct dmi_system_id *d)
  121. {
  122. pci_probe |= PCI_ASSIGN_ALL_BUSSES;
  123. printk(KERN_INFO "%s detected: enabling PCI bus# renumbering"
  124. " (pci=assign-busses)\n", d->ident);
  125. return 0;
  126. }
  127. #endif
  128. static struct dmi_system_id __devinitdata pciprobe_dmi_table[] = {
  129. #ifdef __i386__
  130. /*
  131. * Laptops which need pci=assign-busses to see Cardbus cards
  132. */
  133. {
  134. .callback = assign_all_busses,
  135. .ident = "Samsung X20 Laptop",
  136. .matches = {
  137. DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
  138. DMI_MATCH(DMI_PRODUCT_NAME, "SX20S"),
  139. },
  140. },
  141. #endif /* __i386__ */
  142. {
  143. .callback = set_bf_sort,
  144. .ident = "Dell PowerEdge 1950",
  145. .matches = {
  146. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  147. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1950"),
  148. },
  149. },
  150. {
  151. .callback = set_bf_sort,
  152. .ident = "Dell PowerEdge 1955",
  153. .matches = {
  154. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  155. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1955"),
  156. },
  157. },
  158. {
  159. .callback = set_bf_sort,
  160. .ident = "Dell PowerEdge 2900",
  161. .matches = {
  162. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  163. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2900"),
  164. },
  165. },
  166. {
  167. .callback = set_bf_sort,
  168. .ident = "Dell PowerEdge 2950",
  169. .matches = {
  170. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  171. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2950"),
  172. },
  173. },
  174. {
  175. .callback = set_bf_sort,
  176. .ident = "Dell PowerEdge R900",
  177. .matches = {
  178. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  179. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R900"),
  180. },
  181. },
  182. {
  183. .callback = set_bf_sort,
  184. .ident = "HP ProLiant BL20p G3",
  185. .matches = {
  186. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  187. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G3"),
  188. },
  189. },
  190. {
  191. .callback = set_bf_sort,
  192. .ident = "HP ProLiant BL20p G4",
  193. .matches = {
  194. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  195. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G4"),
  196. },
  197. },
  198. {
  199. .callback = set_bf_sort,
  200. .ident = "HP ProLiant BL30p G1",
  201. .matches = {
  202. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  203. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL30p G1"),
  204. },
  205. },
  206. {
  207. .callback = set_bf_sort,
  208. .ident = "HP ProLiant BL25p G1",
  209. .matches = {
  210. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  211. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL25p G1"),
  212. },
  213. },
  214. {
  215. .callback = set_bf_sort,
  216. .ident = "HP ProLiant BL35p G1",
  217. .matches = {
  218. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  219. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL35p G1"),
  220. },
  221. },
  222. {
  223. .callback = set_bf_sort,
  224. .ident = "HP ProLiant BL45p G1",
  225. .matches = {
  226. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  227. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G1"),
  228. },
  229. },
  230. {
  231. .callback = set_bf_sort,
  232. .ident = "HP ProLiant BL45p G2",
  233. .matches = {
  234. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  235. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G2"),
  236. },
  237. },
  238. {
  239. .callback = set_bf_sort,
  240. .ident = "HP ProLiant BL460c G1",
  241. .matches = {
  242. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  243. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL460c G1"),
  244. },
  245. },
  246. {
  247. .callback = set_bf_sort,
  248. .ident = "HP ProLiant BL465c G1",
  249. .matches = {
  250. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  251. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL465c G1"),
  252. },
  253. },
  254. {
  255. .callback = set_bf_sort,
  256. .ident = "HP ProLiant BL480c G1",
  257. .matches = {
  258. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  259. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL480c G1"),
  260. },
  261. },
  262. {
  263. .callback = set_bf_sort,
  264. .ident = "HP ProLiant BL685c G1",
  265. .matches = {
  266. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  267. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"),
  268. },
  269. },
  270. {}
  271. };
  272. struct pci_bus * __devinit pcibios_scan_root(int busnum)
  273. {
  274. struct pci_bus *bus = NULL;
  275. struct pci_sysdata *sd;
  276. dmi_check_system(pciprobe_dmi_table);
  277. while ((bus = pci_find_next_bus(bus)) != NULL) {
  278. if (bus->number == busnum) {
  279. /* Already scanned */
  280. return bus;
  281. }
  282. }
  283. /* Allocate per-root-bus (not per bus) arch-specific data.
  284. * TODO: leak; this memory is never freed.
  285. * It's arguable whether it's worth the trouble to care.
  286. */
  287. sd = kzalloc(sizeof(*sd), GFP_KERNEL);
  288. if (!sd) {
  289. printk(KERN_ERR "PCI: OOM, not probing PCI bus %02x\n", busnum);
  290. return NULL;
  291. }
  292. printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum);
  293. return pci_scan_bus_parented(NULL, busnum, &pci_root_ops, sd);
  294. }
  295. extern u8 pci_cache_line_size;
  296. static int __init pcibios_init(void)
  297. {
  298. struct cpuinfo_x86 *c = &boot_cpu_data;
  299. if (!raw_pci_ops) {
  300. printk(KERN_WARNING "PCI: System does not support PCI\n");
  301. return 0;
  302. }
  303. /*
  304. * Assume PCI cacheline size of 32 bytes for all x86s except K7/K8
  305. * and P4. It's also good for 386/486s (which actually have 16)
  306. * as quite a few PCI devices do not support smaller values.
  307. */
  308. pci_cache_line_size = 32 >> 2;
  309. if (c->x86 >= 6 && c->x86_vendor == X86_VENDOR_AMD)
  310. pci_cache_line_size = 64 >> 2; /* K7 & K8 */
  311. else if (c->x86 > 6 && c->x86_vendor == X86_VENDOR_INTEL)
  312. pci_cache_line_size = 128 >> 2; /* P4 */
  313. pcibios_resource_survey();
  314. if (pci_bf_sort >= pci_force_bf)
  315. pci_sort_breadthfirst();
  316. #ifdef CONFIG_PCI_BIOS
  317. if ((pci_probe & PCI_BIOS_SORT) && !(pci_probe & PCI_NO_SORT))
  318. pcibios_sort();
  319. #endif
  320. return 0;
  321. }
  322. subsys_initcall(pcibios_init);
  323. char * __devinit pcibios_setup(char *str)
  324. {
  325. if (!strcmp(str, "off")) {
  326. pci_probe = 0;
  327. return NULL;
  328. } else if (!strcmp(str, "bfsort")) {
  329. pci_bf_sort = pci_force_bf;
  330. return NULL;
  331. } else if (!strcmp(str, "nobfsort")) {
  332. pci_bf_sort = pci_force_nobf;
  333. return NULL;
  334. }
  335. #ifdef CONFIG_PCI_BIOS
  336. else if (!strcmp(str, "bios")) {
  337. pci_probe = PCI_PROBE_BIOS;
  338. return NULL;
  339. } else if (!strcmp(str, "nobios")) {
  340. pci_probe &= ~PCI_PROBE_BIOS;
  341. return NULL;
  342. } else if (!strcmp(str, "nosort")) {
  343. pci_probe |= PCI_NO_SORT;
  344. return NULL;
  345. } else if (!strcmp(str, "biosirq")) {
  346. pci_probe |= PCI_BIOS_IRQ_SCAN;
  347. return NULL;
  348. } else if (!strncmp(str, "pirqaddr=", 9)) {
  349. pirq_table_addr = simple_strtoul(str+9, NULL, 0);
  350. return NULL;
  351. }
  352. #endif
  353. #ifdef CONFIG_PCI_DIRECT
  354. else if (!strcmp(str, "conf1")) {
  355. pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS;
  356. return NULL;
  357. }
  358. else if (!strcmp(str, "conf2")) {
  359. pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS;
  360. return NULL;
  361. }
  362. #endif
  363. #ifdef CONFIG_PCI_MMCONFIG
  364. else if (!strcmp(str, "nommconf")) {
  365. pci_probe &= ~PCI_PROBE_MMCONF;
  366. return NULL;
  367. }
  368. #endif
  369. else if (!strcmp(str, "noacpi")) {
  370. acpi_noirq_set();
  371. return NULL;
  372. }
  373. else if (!strcmp(str, "noearly")) {
  374. pci_probe |= PCI_PROBE_NOEARLY;
  375. return NULL;
  376. }
  377. #ifndef CONFIG_X86_VISWS
  378. else if (!strcmp(str, "usepirqmask")) {
  379. pci_probe |= PCI_USE_PIRQ_MASK;
  380. return NULL;
  381. } else if (!strncmp(str, "irqmask=", 8)) {
  382. pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
  383. return NULL;
  384. } else if (!strncmp(str, "lastbus=", 8)) {
  385. pcibios_last_bus = simple_strtol(str+8, NULL, 0);
  386. return NULL;
  387. }
  388. #endif
  389. else if (!strcmp(str, "rom")) {
  390. pci_probe |= PCI_ASSIGN_ROMS;
  391. return NULL;
  392. } else if (!strcmp(str, "assign-busses")) {
  393. pci_probe |= PCI_ASSIGN_ALL_BUSSES;
  394. return NULL;
  395. } else if (!strcmp(str, "routeirq")) {
  396. pci_routeirq = 1;
  397. return NULL;
  398. }
  399. return str;
  400. }
  401. unsigned int pcibios_assign_all_busses(void)
  402. {
  403. return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
  404. }
  405. int pcibios_enable_device(struct pci_dev *dev, int mask)
  406. {
  407. int err;
  408. if ((err = pcibios_enable_resources(dev, mask)) < 0)
  409. return err;
  410. if (!dev->msi_enabled)
  411. return pcibios_enable_irq(dev);
  412. return 0;
  413. }
  414. void pcibios_disable_device (struct pci_dev *dev)
  415. {
  416. if (!dev->msi_enabled && pcibios_disable_irq)
  417. pcibios_disable_irq(dev);
  418. }
  419. struct pci_bus *pci_scan_bus_with_sysdata(int busno)
  420. {
  421. struct pci_bus *bus = NULL;
  422. struct pci_sysdata *sd;
  423. /*
  424. * Allocate per-root-bus (not per bus) arch-specific data.
  425. * TODO: leak; this memory is never freed.
  426. * It's arguable whether it's worth the trouble to care.
  427. */
  428. sd = kzalloc(sizeof(*sd), GFP_KERNEL);
  429. if (!sd) {
  430. printk(KERN_ERR "PCI: OOM, skipping PCI bus %02x\n", busno);
  431. return NULL;
  432. }
  433. sd->node = -1;
  434. bus = pci_scan_bus(busno, &pci_root_ops, sd);
  435. if (!bus)
  436. kfree(sd);
  437. return bus;
  438. }