cm_bf561.c 7.8 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf533/boards/cm_bf561.c
  3. * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au> Copyright 2005
  5. *
  6. * Created: 2006
  7. * Description: Board description file
  8. *
  9. * Modified:
  10. * Copyright 2004-2006 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. #include <linux/device.h>
  30. #include <linux/platform_device.h>
  31. #include <linux/mtd/mtd.h>
  32. #include <linux/mtd/partitions.h>
  33. #include <linux/spi/spi.h>
  34. #include <linux/spi/flash.h>
  35. #include <linux/usb_isp1362.h>
  36. #include <linux/irq.h>
  37. #include <asm/bfin5xx_spi.h>
  38. /*
  39. * Name the Board for the /proc/cpuinfo
  40. */
  41. char *bfin_board_name = "Bluetechnix CM BF561";
  42. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  43. /* all SPI peripherals info goes here */
  44. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  45. static struct mtd_partition bfin_spi_flash_partitions[] = {
  46. {
  47. .name = "bootloader",
  48. .size = 0x00020000,
  49. .offset = 0,
  50. .mask_flags = MTD_CAP_ROM
  51. }, {
  52. .name = "kernel",
  53. .size = 0xe0000,
  54. .offset = 0x20000
  55. }, {
  56. .name = "file system",
  57. .size = 0x700000,
  58. .offset = 0x00100000,
  59. }
  60. };
  61. static struct flash_platform_data bfin_spi_flash_data = {
  62. .name = "m25p80",
  63. .parts = bfin_spi_flash_partitions,
  64. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  65. .type = "m25p64",
  66. };
  67. /* SPI flash chip (m25p64) */
  68. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  69. .enable_dma = 0, /* use dma transfer with this chip*/
  70. .bits_per_word = 8,
  71. };
  72. #endif
  73. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  74. /* SPI ADC chip */
  75. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  76. .enable_dma = 1, /* use dma transfer with this chip*/
  77. .bits_per_word = 16,
  78. };
  79. #endif
  80. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  81. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  82. .enable_dma = 0,
  83. .bits_per_word = 16,
  84. };
  85. #endif
  86. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  87. static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
  88. .enable_dma = 0,
  89. .bits_per_word = 16,
  90. };
  91. #endif
  92. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  93. static struct bfin5xx_spi_chip spi_mmc_chip_info = {
  94. .enable_dma = 1,
  95. .bits_per_word = 8,
  96. };
  97. #endif
  98. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  99. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  100. {
  101. /* the modalias must be the same as spi device driver name */
  102. .modalias = "m25p80", /* Name of spi_driver for this device */
  103. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  104. .bus_num = 1, /* Framework bus number */
  105. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  106. .platform_data = &bfin_spi_flash_data,
  107. .controller_data = &spi_flash_chip_info,
  108. .mode = SPI_MODE_3,
  109. },
  110. #endif
  111. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  112. {
  113. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  114. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  115. .bus_num = 1, /* Framework bus number */
  116. .chip_select = 1, /* Framework chip select. */
  117. .platform_data = NULL, /* No spi_driver specific config */
  118. .controller_data = &spi_adc_chip_info,
  119. },
  120. #endif
  121. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  122. {
  123. .modalias = "ad1836-spi",
  124. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  125. .bus_num = 1,
  126. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  127. .controller_data = &ad1836_spi_chip_info,
  128. },
  129. #endif
  130. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  131. {
  132. .modalias = "ad9960-spi",
  133. .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
  134. .bus_num = 1,
  135. .chip_select = 1,
  136. .controller_data = &ad9960_spi_chip_info,
  137. },
  138. #endif
  139. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  140. {
  141. .modalias = "spi_mmc",
  142. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  143. .bus_num = 1,
  144. .chip_select = CONFIG_SPI_MMC_CS_CHAN,
  145. .platform_data = NULL,
  146. .controller_data = &spi_mmc_chip_info,
  147. .mode = SPI_MODE_3,
  148. },
  149. #endif
  150. };
  151. /* SPI controller data */
  152. static struct bfin5xx_spi_master spi_bfin_master_info = {
  153. .num_chipselect = 8,
  154. .enable_dma = 1, /* master has the ability to do dma transfer */
  155. };
  156. static struct platform_device spi_bfin_master_device = {
  157. .name = "bfin-spi-master",
  158. .id = 1, /* Bus number */
  159. .dev = {
  160. .platform_data = &spi_bfin_master_info, /* Passed to driver */
  161. },
  162. };
  163. #endif /* spi master and devices */
  164. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  165. static struct resource smc91x_resources[] = {
  166. {
  167. .name = "smc91x-regs",
  168. .start = 0x28000300,
  169. .end = 0x28000300 + 16,
  170. .flags = IORESOURCE_MEM,
  171. }, {
  172. .start = IRQ_PF0,
  173. .end = IRQ_PF0,
  174. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  175. },
  176. };
  177. static struct platform_device smc91x_device = {
  178. .name = "smc91x",
  179. .id = 0,
  180. .num_resources = ARRAY_SIZE(smc91x_resources),
  181. .resource = smc91x_resources,
  182. };
  183. #endif
  184. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  185. static struct resource isp1362_hcd_resources[] = {
  186. {
  187. .start = 0x24008000,
  188. .end = 0x24008000,
  189. .flags = IORESOURCE_MEM,
  190. }, {
  191. .start = 0x24008004,
  192. .end = 0x24008004,
  193. .flags = IORESOURCE_MEM,
  194. }, {
  195. .start = IRQ_PF47,
  196. .end = IRQ_PF47,
  197. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  198. },
  199. };
  200. static struct isp1362_platform_data isp1362_priv = {
  201. .sel15Kres = 1,
  202. .clknotstop = 0,
  203. .oc_enable = 0,
  204. .int_act_high = 0,
  205. .int_edge_triggered = 0,
  206. .remote_wakeup_connected = 0,
  207. .no_power_switching = 1,
  208. .power_switching_mode = 0,
  209. };
  210. static struct platform_device isp1362_hcd_device = {
  211. .name = "isp1362-hcd",
  212. .id = 0,
  213. .dev = {
  214. .platform_data = &isp1362_priv,
  215. },
  216. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  217. .resource = isp1362_hcd_resources,
  218. };
  219. #endif
  220. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  221. static struct resource bfin_uart_resources[] = {
  222. {
  223. .start = 0xFFC00400,
  224. .end = 0xFFC004FF,
  225. .flags = IORESOURCE_MEM,
  226. },
  227. };
  228. static struct platform_device bfin_uart_device = {
  229. .name = "bfin-uart",
  230. .id = 1,
  231. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  232. .resource = bfin_uart_resources,
  233. };
  234. #endif
  235. static struct platform_device *cm_bf561_devices[] __initdata = {
  236. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  237. &bfin_uart_device,
  238. #endif
  239. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  240. &isp1362_hcd_device,
  241. #endif
  242. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  243. &smc91x_device,
  244. #endif
  245. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  246. &spi_bfin_master_device,
  247. #endif
  248. };
  249. static int __init cm_bf561_init(void)
  250. {
  251. printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
  252. platform_add_devices(cm_bf561_devices, ARRAY_SIZE(cm_bf561_devices));
  253. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  254. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  255. #endif
  256. return 0;
  257. }
  258. arch_initcall(cm_bf561_init);