cm_bf537.c 9.6 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf537/boards/cm_bf537.c
  3. * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Created: 2005
  7. * Description: Board description file
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2006 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/mtd/mtd.h>
  33. #include <linux/mtd/partitions.h>
  34. #include <linux/spi/spi.h>
  35. #include <linux/spi/flash.h>
  36. #include <linux/usb_isp1362.h>
  37. #include <linux/irq.h>
  38. #include <asm/bfin5xx_spi.h>
  39. /*
  40. * Name the Board for the /proc/cpuinfo
  41. */
  42. char *bfin_board_name = "Bluetechnix CM BF537";
  43. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  44. /* all SPI peripherals info goes here */
  45. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  46. static struct mtd_partition bfin_spi_flash_partitions[] = {
  47. {
  48. .name = "bootloader",
  49. .size = 0x00020000,
  50. .offset = 0,
  51. .mask_flags = MTD_CAP_ROM
  52. }, {
  53. .name = "kernel",
  54. .size = 0xe0000,
  55. .offset = 0x20000
  56. }, {
  57. .name = "file system",
  58. .size = 0x700000,
  59. .offset = 0x00100000,
  60. }
  61. };
  62. static struct flash_platform_data bfin_spi_flash_data = {
  63. .name = "m25p80",
  64. .parts = bfin_spi_flash_partitions,
  65. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  66. .type = "m25p64",
  67. };
  68. /* SPI flash chip (m25p64) */
  69. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  70. .enable_dma = 0, /* use dma transfer with this chip*/
  71. .bits_per_word = 8,
  72. };
  73. #endif
  74. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  75. /* SPI ADC chip */
  76. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  77. .enable_dma = 1, /* use dma transfer with this chip*/
  78. .bits_per_word = 16,
  79. };
  80. #endif
  81. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  82. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  83. .enable_dma = 0,
  84. .bits_per_word = 16,
  85. };
  86. #endif
  87. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  88. static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
  89. .enable_dma = 0,
  90. .bits_per_word = 16,
  91. };
  92. #endif
  93. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  94. static struct bfin5xx_spi_chip spi_mmc_chip_info = {
  95. .enable_dma = 1,
  96. .bits_per_word = 8,
  97. };
  98. #endif
  99. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  100. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  101. {
  102. /* the modalias must be the same as spi device driver name */
  103. .modalias = "m25p80", /* Name of spi_driver for this device */
  104. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  105. .bus_num = 1, /* Framework bus number */
  106. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  107. .platform_data = &bfin_spi_flash_data,
  108. .controller_data = &spi_flash_chip_info,
  109. .mode = SPI_MODE_3,
  110. },
  111. #endif
  112. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  113. {
  114. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  115. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  116. .bus_num = 1, /* Framework bus number */
  117. .chip_select = 1, /* Framework chip select. */
  118. .platform_data = NULL, /* No spi_driver specific config */
  119. .controller_data = &spi_adc_chip_info,
  120. },
  121. #endif
  122. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  123. {
  124. .modalias = "ad1836-spi",
  125. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  126. .bus_num = 1,
  127. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  128. .controller_data = &ad1836_spi_chip_info,
  129. },
  130. #endif
  131. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  132. {
  133. .modalias = "ad9960-spi",
  134. .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
  135. .bus_num = 1,
  136. .chip_select = 1,
  137. .controller_data = &ad9960_spi_chip_info,
  138. },
  139. #endif
  140. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  141. {
  142. .modalias = "spi_mmc_dummy",
  143. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  144. .bus_num = 1,
  145. .chip_select = 7,
  146. .platform_data = NULL,
  147. .controller_data = &spi_mmc_chip_info,
  148. .mode = SPI_MODE_3,
  149. },
  150. {
  151. .modalias = "spi_mmc",
  152. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  153. .bus_num = 1,
  154. .chip_select = CONFIG_SPI_MMC_CS_CHAN,
  155. .platform_data = NULL,
  156. .controller_data = &spi_mmc_chip_info,
  157. .mode = SPI_MODE_3,
  158. },
  159. #endif
  160. };
  161. /* SPI controller data */
  162. static struct bfin5xx_spi_master spi_bfin_master_info = {
  163. .num_chipselect = 8,
  164. .enable_dma = 1, /* master has the ability to do dma transfer */
  165. };
  166. static struct platform_device spi_bfin_master_device = {
  167. .name = "bfin-spi-master",
  168. .id = 1, /* Bus number */
  169. .dev = {
  170. .platform_data = &spi_bfin_master_info, /* Passed to driver */
  171. },
  172. };
  173. #endif /* spi master and devices */
  174. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  175. static struct platform_device rtc_device = {
  176. .name = "rtc-bfin",
  177. .id = -1,
  178. };
  179. #endif
  180. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  181. static struct resource smc91x_resources[] = {
  182. {
  183. .start = 0x20200300,
  184. .end = 0x20200300 + 16,
  185. .flags = IORESOURCE_MEM,
  186. }, {
  187. .start = IRQ_PF14,
  188. .end = IRQ_PF14,
  189. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  190. },
  191. };
  192. static struct platform_device smc91x_device = {
  193. .name = "smc91x",
  194. .id = 0,
  195. .num_resources = ARRAY_SIZE(smc91x_resources),
  196. .resource = smc91x_resources,
  197. };
  198. #endif
  199. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  200. static struct resource isp1362_hcd_resources[] = {
  201. {
  202. .start = 0x20308000,
  203. .end = 0x20308000,
  204. .flags = IORESOURCE_MEM,
  205. }, {
  206. .start = 0x20308004,
  207. .end = 0x20308004,
  208. .flags = IORESOURCE_MEM,
  209. }, {
  210. .start = IRQ_PG15,
  211. .end = IRQ_PG15,
  212. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  213. },
  214. };
  215. static struct isp1362_platform_data isp1362_priv = {
  216. .sel15Kres = 1,
  217. .clknotstop = 0,
  218. .oc_enable = 0,
  219. .int_act_high = 0,
  220. .int_edge_triggered = 0,
  221. .remote_wakeup_connected = 0,
  222. .no_power_switching = 1,
  223. .power_switching_mode = 0,
  224. };
  225. static struct platform_device isp1362_hcd_device = {
  226. .name = "isp1362-hcd",
  227. .id = 0,
  228. .dev = {
  229. .platform_data = &isp1362_priv,
  230. },
  231. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  232. .resource = isp1362_hcd_resources,
  233. };
  234. #endif
  235. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  236. static struct resource net2272_bfin_resources[] = {
  237. {
  238. .start = 0x20200000,
  239. .end = 0x20200000 + 0x100,
  240. .flags = IORESOURCE_MEM,
  241. }, {
  242. .start = IRQ_PF7,
  243. .end = IRQ_PF7,
  244. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  245. },
  246. };
  247. static struct platform_device net2272_bfin_device = {
  248. .name = "net2272",
  249. .id = -1,
  250. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  251. .resource = net2272_bfin_resources,
  252. };
  253. #endif
  254. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  255. static struct resource bfin_uart_resources[] = {
  256. {
  257. .start = 0xFFC00400,
  258. .end = 0xFFC004FF,
  259. .flags = IORESOURCE_MEM,
  260. }, {
  261. .start = 0xFFC02000,
  262. .end = 0xFFC020FF,
  263. .flags = IORESOURCE_MEM,
  264. },
  265. };
  266. static struct platform_device bfin_uart_device = {
  267. .name = "bfin-uart",
  268. .id = 1,
  269. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  270. .resource = bfin_uart_resources,
  271. };
  272. #endif
  273. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  274. static struct platform_device bfin_sport0_uart_device = {
  275. .name = "bfin-sport-uart",
  276. .id = 0,
  277. };
  278. static struct platform_device bfin_sport1_uart_device = {
  279. .name = "bfin-sport-uart",
  280. .id = 1,
  281. };
  282. #endif
  283. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  284. static struct platform_device bfin_mac_device = {
  285. .name = "bfin_mac",
  286. };
  287. #endif
  288. static struct platform_device *cm_bf537_devices[] __initdata = {
  289. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  290. &rtc_device,
  291. #endif
  292. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  293. &bfin_uart_device,
  294. #endif
  295. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  296. &bfin_sport0_uart_device,
  297. &bfin_sport1_uart_device,
  298. #endif
  299. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  300. &isp1362_hcd_device,
  301. #endif
  302. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  303. &smc91x_device,
  304. #endif
  305. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  306. &bfin_mac_device,
  307. #endif
  308. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  309. &net2272_bfin_device,
  310. #endif
  311. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  312. &spi_bfin_master_device,
  313. #endif
  314. };
  315. static int __init cm_bf537_init(void)
  316. {
  317. printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
  318. platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
  319. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  320. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  321. #endif
  322. return 0;
  323. }
  324. arch_initcall(cm_bf537_init);