stamp.c 9.6 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf533/stamp.c
  3. * Based on: arch/blackfin/mach-bf533/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Created: 2005
  7. * Description: Board Info File for the BF533-STAMP
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2006 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/mtd/mtd.h>
  33. #include <linux/mtd/partitions.h>
  34. #include <linux/spi/spi.h>
  35. #include <linux/spi/flash.h>
  36. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  37. #include <linux/usb_isp1362.h>
  38. #endif
  39. #include <linux/irq.h>
  40. #include <asm/bfin5xx_spi.h>
  41. /*
  42. * Name the Board for the /proc/cpuinfo
  43. */
  44. char *bfin_board_name = "ADDS-BF533-STAMP";
  45. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  46. static struct platform_device rtc_device = {
  47. .name = "rtc-bfin",
  48. .id = -1,
  49. };
  50. #endif
  51. /*
  52. * Driver needs to know address, irq and flag pin.
  53. */
  54. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  55. static struct resource smc91x_resources[] = {
  56. {
  57. .name = "smc91x-regs",
  58. .start = 0x20300300,
  59. .end = 0x20300300 + 16,
  60. .flags = IORESOURCE_MEM,
  61. }, {
  62. .start = IRQ_PF7,
  63. .end = IRQ_PF7,
  64. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  65. },
  66. };
  67. static struct platform_device smc91x_device = {
  68. .name = "smc91x",
  69. .id = 0,
  70. .num_resources = ARRAY_SIZE(smc91x_resources),
  71. .resource = smc91x_resources,
  72. };
  73. #endif
  74. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  75. static struct resource net2272_bfin_resources[] = {
  76. {
  77. .start = 0x20300000,
  78. .end = 0x20300000 + 0x100,
  79. .flags = IORESOURCE_MEM,
  80. }, {
  81. .start = IRQ_PF10,
  82. .end = IRQ_PF10,
  83. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  84. },
  85. };
  86. static struct platform_device net2272_bfin_device = {
  87. .name = "net2272",
  88. .id = -1,
  89. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  90. .resource = net2272_bfin_resources,
  91. };
  92. #endif
  93. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  94. /* all SPI peripherals info goes here */
  95. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  96. static struct mtd_partition bfin_spi_flash_partitions[] = {
  97. {
  98. .name = "bootloader",
  99. .size = 0x00020000,
  100. .offset = 0,
  101. .mask_flags = MTD_CAP_ROM
  102. }, {
  103. .name = "kernel",
  104. .size = 0xe0000,
  105. .offset = 0x20000
  106. }, {
  107. .name = "file system",
  108. .size = 0x700000,
  109. .offset = 0x00100000,
  110. }
  111. };
  112. static struct flash_platform_data bfin_spi_flash_data = {
  113. .name = "m25p80",
  114. .parts = bfin_spi_flash_partitions,
  115. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  116. .type = "m25p64",
  117. };
  118. /* SPI flash chip (m25p64) */
  119. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  120. .enable_dma = 0, /* use dma transfer with this chip*/
  121. .bits_per_word = 8,
  122. };
  123. #endif
  124. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  125. /* SPI ADC chip */
  126. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  127. .enable_dma = 1, /* use dma transfer with this chip*/
  128. .bits_per_word = 16,
  129. };
  130. #endif
  131. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  132. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  133. .enable_dma = 0,
  134. .bits_per_word = 16,
  135. };
  136. #endif
  137. #if defined(CONFIG_PBX)
  138. static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
  139. .ctl_reg = 0x4, /* send zero */
  140. .enable_dma = 0,
  141. .bits_per_word = 8,
  142. .cs_change_per_word = 1,
  143. };
  144. #endif
  145. #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
  146. static struct bfin5xx_spi_chip ad5304_chip_info = {
  147. .enable_dma = 0,
  148. .bits_per_word = 16,
  149. };
  150. #endif
  151. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  152. static struct bfin5xx_spi_chip spi_mmc_chip_info = {
  153. .enable_dma = 1,
  154. .bits_per_word = 8,
  155. };
  156. #endif
  157. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  158. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  159. {
  160. /* the modalias must be the same as spi device driver name */
  161. .modalias = "m25p80", /* Name of spi_driver for this device */
  162. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  163. .bus_num = 1, /* Framework bus number */
  164. .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
  165. .platform_data = &bfin_spi_flash_data,
  166. .controller_data = &spi_flash_chip_info,
  167. .mode = SPI_MODE_3,
  168. },
  169. #endif
  170. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  171. {
  172. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  173. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  174. .bus_num = 1, /* Framework bus number */
  175. .chip_select = 1, /* Framework chip select. */
  176. .platform_data = NULL, /* No spi_driver specific config */
  177. .controller_data = &spi_adc_chip_info,
  178. },
  179. #endif
  180. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  181. {
  182. .modalias = "ad1836-spi",
  183. .max_speed_hz = 31250000, /* max spi clock (SCK) speed in HZ */
  184. .bus_num = 1,
  185. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  186. .controller_data = &ad1836_spi_chip_info,
  187. },
  188. #endif
  189. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  190. {
  191. .modalias = "spi_mmc_dummy",
  192. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  193. .bus_num = 1,
  194. .chip_select = 0,
  195. .platform_data = NULL,
  196. .controller_data = &spi_mmc_chip_info,
  197. .mode = SPI_MODE_3,
  198. },
  199. {
  200. .modalias = "spi_mmc",
  201. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  202. .bus_num = 1,
  203. .chip_select = CONFIG_SPI_MMC_CS_CHAN,
  204. .platform_data = NULL,
  205. .controller_data = &spi_mmc_chip_info,
  206. .mode = SPI_MODE_3,
  207. },
  208. #endif
  209. #if defined(CONFIG_PBX)
  210. {
  211. .modalias = "fxs-spi",
  212. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  213. .bus_num = 1,
  214. .chip_select = 3,
  215. .controller_data = &spi_si3xxx_chip_info,
  216. .mode = SPI_MODE_3,
  217. },
  218. {
  219. .modalias = "fxo-spi",
  220. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  221. .bus_num = 1,
  222. .chip_select = 2,
  223. .controller_data = &spi_si3xxx_chip_info,
  224. .mode = SPI_MODE_3,
  225. },
  226. #endif
  227. #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
  228. {
  229. .modalias = "ad5304_spi",
  230. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  231. .bus_num = 1,
  232. .chip_select = 2,
  233. .platform_data = NULL,
  234. .controller_data = &ad5304_chip_info,
  235. .mode = SPI_MODE_2,
  236. },
  237. #endif
  238. };
  239. /* SPI controller data */
  240. static struct bfin5xx_spi_master spi_bfin_master_info = {
  241. .num_chipselect = 8,
  242. .enable_dma = 1, /* master has the ability to do dma transfer */
  243. };
  244. static struct platform_device spi_bfin_master_device = {
  245. .name = "bfin-spi-master",
  246. .id = 1, /* Bus number */
  247. .dev = {
  248. .platform_data = &spi_bfin_master_info, /* Passed to driver */
  249. },
  250. };
  251. #endif /* spi master and devices */
  252. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  253. static struct platform_device bfin_fb_device = {
  254. .name = "bf537-fb",
  255. };
  256. #endif
  257. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  258. static struct resource bfin_uart_resources[] = {
  259. {
  260. .start = 0xFFC00400,
  261. .end = 0xFFC004FF,
  262. .flags = IORESOURCE_MEM,
  263. },
  264. };
  265. static struct platform_device bfin_uart_device = {
  266. .name = "bfin-uart",
  267. .id = 1,
  268. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  269. .resource = bfin_uart_resources,
  270. };
  271. #endif
  272. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  273. static struct platform_device bfin_sport0_uart_device = {
  274. .name = "bfin-sport-uart",
  275. .id = 0,
  276. };
  277. static struct platform_device bfin_sport1_uart_device = {
  278. .name = "bfin-sport-uart",
  279. .id = 1,
  280. };
  281. #endif
  282. static struct platform_device *stamp_devices[] __initdata = {
  283. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  284. &rtc_device,
  285. #endif
  286. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  287. &smc91x_device,
  288. #endif
  289. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  290. &net2272_bfin_device,
  291. #endif
  292. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  293. &spi_bfin_master_device,
  294. #endif
  295. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  296. &bfin_uart_device,
  297. #endif
  298. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  299. &bfin_sport0_uart_device,
  300. &bfin_sport1_uart_device,
  301. #endif
  302. };
  303. static int __init stamp_init(void)
  304. {
  305. int ret;
  306. printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
  307. ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  308. if (ret < 0)
  309. return ret;
  310. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  311. # if defined(CONFIG_BFIN_SHARED_FLASH_ENET)
  312. /* setup BF533_STAMP CPLD to route AMS3 to Ethernet MAC */
  313. bfin_write_FIO_DIR(bfin_read_FIO_DIR() | (1 << CONFIG_ENET_FLASH_PIN));
  314. bfin_write_FIO_FLAG_S(1 << CONFIG_ENET_FLASH_PIN);
  315. SSYNC();
  316. # endif
  317. #endif
  318. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  319. return spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  320. #endif
  321. }
  322. arch_initcall(stamp_init);